JPS623751Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a battery life display for a digital electronic watch, and more particularly to a battery life display that can clearly inform the user that the battery life has come to an end. Conventional battery life display methods for digital electronic watches include a flashing method in which a colon or the entire display flashes. However, the blinking method causes the eyes to flicker,
There were drawbacks such as difficulty in viewing. Another method is to erase the second digit, etc. to notify that the battery life has come to an end. Although this erasing method also clearly informs the user of the battery life,
The disadvantage was that it was inconvenient to be unable to check the second time. As described above, conventional battery life display methods are often difficult to see and inconvenient. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a digital electronic timepiece that eliminates the difficulty of viewing the time display and the inconvenience caused by the conventional battery life display. The present invention will be explained in detail below based on the drawings.
In FIG. 1, 1 to 1 show the display section of the digital electronic timepiece according to the present invention, 1 to 2 show the normal state, and 1 to 1 show the battery life display state.
As can be seen from Figures 1 to 1, when displayed on the hour display section 2 and minute display section 4, the minutes do not change even in the battery life display state compared to the normal state. However, the second time displayed on the second display section 6 is displayed in addition as 58 seconds, 59 seconds, 0, 1 second, etc. under normal conditions.
In the battery life display state, 3 seconds, 1 second, 0 seconds, 59 seconds...
will be displayed as a subtraction. What's more, the minute carry occurs at the same time as the normal state, so the time does not go out of order, and you can read it visually even when the minute is carried. FIG. 2 is a block diagram based on an embodiment of the present invention, and FIG. 3 is a time chart thereof. In FIG. 2, a time reference signal from an oscillator 10 is frequency-divided by a frequency divider 12 to 1 Hz. The 1Hz signal from this frequency divider 12 is
input to one of the input terminals of 6. The output signals 15 and 17 of the AND gates 14 and 16 are input to the down count input and up count input of the seconds up/down counter 18, respectively. The second up/down counter 18 counts the time unit of seconds by subtracting the 1 Hz signal when it is input to the down count input, and adding it when the 1 Hz signal is input to the up count input. The output signal 19 is then input to the drive circuit 22 via the decoder 20 and displayed on the seconds display section 6. Further, the carry signal 23 and the carry down signal 25 of the counter 18 are inputted to a minute counter 26 via an OR gate 24 to count time units of minutes. Seconds up/down counter 1 like this
Even when the number 8 is subtracting, the carry signal 23 is used as a carry signal for the minutes, so the time does not go out of order. The carry signal from the minute counter 26 is then input to the hour counter 28 to count the time units of the hour.
The output signals of the minute counter 26 and hour counter 28 are input to drive circuits 34 and 36 via decoders 30 and 32, respectively, and the hours and minutes are displayed on the minute display section 4 and the hour display section 2. On the other hand, the power supply battery 38 includes a battery voltage detection circuit 40,
Input to initial reset circuit 46. The initial reset circuit 46 is input to the reset terminals of the flip-flops 42 and 44, and also input to the battery voltage detection circuit 4.
0 is input as the clock signal of flip-flop 42. This flip-flop 42 constitutes a latch circuit 43, the output Q1 of which is input to the input J1 of the flip-flop 42, and the output Q1 is input to the input J2 of the flip-flop 44. The carry signal 23 of the seconds up/down counter 18 is input to the clock input of the flip-flop 44. The output Q of this flip-flop 44
2 and Q2 are input to the other input terminals of AND gates 14 and 16, respectively. This flip-flop 44 and AND gates 14 and 16 constitute a count direction switching circuit 45. Next, the operation of this circuit will be explained using the time chart shown in FIG. In this embodiment, when the clock signal falls from H level to L level, the flip-flop outputs QQ.
shall be reversed. Under normal conditions, the voltage of the battery 38 does not drop, so the output signal 4 of the battery voltage detection circuit 40
1 maintains the H level state as shown in FIG.
Therefore, the output Q1 of the flip-flop 42 is at L level, and even if a carry pulse as shown in FIG.
The outputs Q2 and Q2 of Q2 do not change. This closes the AND gate 14 and opens the AND gate 16.
The 1 Hz signal from frequency divider 12 is input to the up count input of second up down counter 18 as shown in FIG. As a result, the seconds up/down counter 18 performs addition, and the seconds display section 6 displays the addition of seconds. When the voltage of the battery 38 decreases, the output signal 41 of the battery voltage detection circuit 40 as shown in FIG.
falls from H level to L level. The signal 4
1, the output Q1 of the flip-flop 42 becomes the third
As shown in the figure, the signal is inverted to H level, and the input J2 of flip-flop 44 also becomes H level. Furthermore, the output Q1 of the flip-flop 42 is inverted to L level, and its input J1 is set to L level, so the battery 3
Even if the voltage of 8 changes due to temperature or the like, it will not affect the operation of this circuit. Next, as shown in FIG. 3, a carry pulse is generated in the carry signal 23 from the second up-down counter 18 and inputted to the clock input of the flip-flop 44, the output Q2 goes to H level and the output Q
2 is inverted to L level. This opens AND gate 14 and closes AND gate 16, so
The 1 Hz signal from frequency divider 12 is input to the down count input of second up down counter 18 as shown in FIG. As a result, the seconds up/down counter 18 performs subtraction, and the seconds display section 6 displays a subtracted second. By the way, when the battery 38 is replaced with a new one in this state, the flip-flops 42 and 44 are reset by the initial reset circuit 46, and the reset is canceled after a certain period of time has passed, so this circuit returns to its normal state again, and within seconds. Addition display is performed. In this manner, the user can know that the battery life has come to an end when the seconds are subtracted and displayed. As described above, according to the present invention, it is possible to know when the battery life has reached the end of the battery life by displaying the subtraction of seconds, and the hour, minute, and second time displays do not blink or erase, making it easy to check the time. Not only is it easy to read, but you can also tell how many seconds have passed.

[Brief explanation of the drawing]

Figures 1 to 1 show the display section of the digital electronic watch according to the present invention. Figures 1 to 2 show the normal state, Figure 1 ho to 1 show the battery life display state, and Figure 2 shows the display section of the digital electronic watch according to the present invention. This is a block diagram based on an embodiment of the invention, and FIG. 3 is a time chart thereof. 6...Second display section, 18...Up-down counter, 38...Battery, 40...Battery voltage detection circuit,
42, 44...flip flop.

Claims (1)

[Scope of utility model registration request] an oscillator, a frequency divider connected to the oscillator,
a second counter connected to the frequency divider, a minute counter connected to the second counter, an hour counter connected to the minute counter, and a second display section that displays a second time value from the second counter; A digital electronic watch having a minute display section for displaying a minute time value from the minute counter and an hour display section for displaying an hour time value from the hour counter, wherein the second counter is an up-down counter capable of adding and subtracting. The battery voltage detection circuit detects the voltage of the power supply battery and outputs a drop signal when the voltage drops below a predetermined voltage, and the latch is connected to the battery voltage detection circuit and stores and retains the drop signal. circuit and
A counting direction switch that receives a memory decrease signal from the latch circuit and a carry signal from the up-down counter, and outputs a signal to the up-down counter that causes the up-down counter to count down at the first carry, subject to the presence of the memory decrease signal. A digital electronic clock characterized by displaying battery life by providing a circuit.