JPS623449B2 - - Google Patents

Info

Publication number
JPS623449B2
JPS623449B2 JP9821678A JP9821678A JPS623449B2 JP S623449 B2 JPS623449 B2 JP S623449B2 JP 9821678 A JP9821678 A JP 9821678A JP 9821678 A JP9821678 A JP 9821678A JP S623449 B2 JPS623449 B2 JP S623449B2
Authority
JP
Japan
Prior art keywords
signal
load
thyristor
circuit
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9821678A
Other languages
Japanese (ja)
Other versions
JPS5525154A (en
Inventor
Koji Harita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshin Kogyo Co Ltd
Original Assignee
Toshin Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshin Kogyo Co Ltd filed Critical Toshin Kogyo Co Ltd
Priority to JP9821678A priority Critical patent/JPS5525154A/en
Publication of JPS5525154A publication Critical patent/JPS5525154A/en
Publication of JPS623449B2 publication Critical patent/JPS623449B2/ja
Granted legal-status Critical Current

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  • Control Of Voltage And Current In General (AREA)
  • Control Of Electrical Variables (AREA)

Description

【発明の詳細な説明】 本発明はサイリスタ位相制御装置に関する。[Detailed description of the invention] The present invention relates to a thyristor phase control device.

周知のように、サイリスタは電力制御用のスイ
ツチとして広く用いられ、このサイリスタを導通
制御するゲート回路に諸種のものがある。
As is well known, thyristors are widely used as switches for power control, and there are various types of gate circuits that control conduction of these thyristors.

従来、一般的なゲート回路を第1図に示す。こ
の回路についてみると、入力端子10に与えられ
た直流入力電圧によりトランジスタ11は導通さ
れてユニジヤンクシヨントトランジスタ(以下
UJTと略す)12及びコンデンサー13で形成
された弛張発振回路へ電流を加える。UJT12
よりパルス電圧を得てこれをパルストランス14
を介して逆並列に接続したサイリスタ15,16
を点弧している。
A conventional, common gate circuit is shown in FIG. Regarding this circuit, a transistor 11 is made conductive by a DC input voltage applied to an input terminal 10, and a unijunction transistor (hereinafter referred to as
A current is applied to a relaxation oscillation circuit formed by a UJT (abbreviated as UJT) 12 and a capacitor 13. UJT12
Obtain a pulse voltage and transfer it to the pulse transformer 14
Thyristors 15 and 16 connected in antiparallel through
is ignited.

この回路は直流入力電圧の変化対サイリスタ制
御負荷18電圧の変化が直線関係で無く精密な調
節には不適当である。この直線性を改善する為に
サイリスタで制御された負荷電圧を増幅器の入力
へ負帰還させて直線性を改善させることが出来
る。
In this circuit, there is no linear relationship between the change in the DC input voltage and the change in the thyristor-controlled load 18 voltage, making it unsuitable for precise adjustment. In order to improve this linearity, the load voltage controlled by the thyristor can be negatively fed back to the input of the amplifier to improve the linearity.

第2図はその原理を示したもので、負荷抵抗2
8の両端に変圧器30を設け、整流器31、抵抗
32、平滑コンデンサー33を通して帰還電圧を
得ている。帰還電圧は直流でなければならないの
で抵抗32及びコンデンサー33で脈動を充分に
取る必要があり、その為に平滑回路の時定数が大
きくなる。入力端子20の入力電圧が増加した場
合に時定数の為に帰還電圧の遅れが出て負荷28
の電圧が一時的に過電圧になるので入力電圧変化
速度に制限が出る。又、トランジスタ21の増幅
度を上げるとその傾向が一段と大きくなるので増
幅度を下げるか入力電圧の変化速度を遅くしなけ
ればならない。増幅度を低げた場合は直線性の改
善精度が悪くなる。
Figure 2 shows the principle, and the load resistance 2
A transformer 30 is provided at both ends of the 8, and a feedback voltage is obtained through a rectifier 31, a resistor 32, and a smoothing capacitor 33. Since the feedback voltage must be direct current, it is necessary to sufficiently eliminate pulsations with the resistor 32 and capacitor 33, which increases the time constant of the smoothing circuit. When the input voltage at the input terminal 20 increases, there is a delay in the feedback voltage due to the time constant, and the load 28
Since the voltage temporarily becomes overvoltage, there is a limit to the speed of input voltage change. Furthermore, as the amplification degree of the transistor 21 is increased, this tendency becomes even greater, so it is necessary to lower the amplification degree or to slow down the rate of change of the input voltage. When the degree of amplification is lowered, the accuracy of improving linearity deteriorates.

本発明は入力電圧対出力電圧の直線性を改善す
ると共に応答特性を改善した高精度のサイリスタ
位相制御装置を提供することにある。
An object of the present invention is to provide a highly accurate thyristor phase control device that improves the linearity of input voltage versus output voltage and also improves response characteristics.

以下、本発明を図面に示した実施例について説
明する。
Embodiments of the present invention shown in the drawings will be described below.

第3図は本発明の装置の一実施例を示す回路図
である。第3図において、入力端子40は差動演
算増幅器41の非反転入力端子に接続されてい
る。この入力端子40には制御用の直流入力信号
が印加され、信号レベルに応じて負荷に接続され
たサイリスタを位相制御しようとするものであ
る。
FIG. 3 is a circuit diagram showing an embodiment of the device of the present invention. In FIG. 3, input terminal 40 is connected to a non-inverting input terminal of differential operational amplifier 41. In FIG. A DC input signal for control is applied to this input terminal 40, and the phase of the thyristor connected to the load is controlled according to the signal level.

入力端子40に接続された差動演算増幅器41
は後に述べるように積分コンデンサー56と共に
積分器を構成し、入力抵抗39と積分コンデンサ
ーの積に比例した積分電圧をその出力に発生す
る。差動演算増幅器41で増幅された出力は電流
検出用のトランジスタ42及び43を経て弛張発
振用UJT45及びコンデンサー44に加えられ
る。
Differential operational amplifier 41 connected to input terminal 40
As will be described later, the integrator constitutes an integrator together with the integrating capacitor 56, and generates at its output an integrated voltage proportional to the product of the input resistor 39 and the integrating capacitor. The output amplified by the differential operational amplifier 41 is applied to a UJT 45 for relaxation oscillation and a capacitor 44 via transistors 42 and 43 for current detection.

UJT45によつて得られるパルスはパルスト
ランス57を経てサイリスタ46及び47に加え
られ交流電源49よりの電流はサイリスタ46,
47で制御されて負荷48へ加えられる。
The pulses obtained by the UJT 45 are applied to the thyristors 46 and 47 via a pulse transformer 57, and the current from the AC power source 49 is applied to the thyristors 46 and 47.
47 and is applied to the load 48.

本発明においては負荷に供給される信号と相似
な波形を有する信号を負帰還するための帰還回路
が設けられる。実施例においては帰還信号は次の
ようにして得られる。即ち、交流電源49より得
た電圧を降圧トランス50により低電圧に変換し
て整流器51,52で両波整流して発光ダイオー
ドと受光サイリスタを光学結合したフオトカツプ
ラ53に加える。このカツプラのサイリスタはパ
ルストランス57よりのパルス電圧で発光ダイオ
ードより加えられるのでサイリスタ46,47と
同じタイミングで点弧される。したがつて負荷抵
抗54に加えられる波形は負荷48と同じにな
る。即ち、負荷48より負荷制御信号が帰還され
たことになる。
In the present invention, a feedback circuit is provided for negatively feeding back a signal having a waveform similar to the signal supplied to the load. In the embodiment, the feedback signal is obtained as follows. That is, a voltage obtained from an AC power source 49 is converted to a low voltage by a step-down transformer 50, double-wave rectified by rectifiers 51 and 52, and applied to a photocoupler 53 optically coupled to a light emitting diode and a light receiving thyristor. The thyristor of this coupler is ignited at the same timing as the thyristors 46 and 47 because the pulse voltage from the pulse transformer 57 is applied from the light emitting diode. Therefore, the waveform applied to load resistor 54 is the same as load 48. In other words, the load control signal is fed back from the load 48.

この帰還信号は積分抵抗55を通して差動演算
増幅器41の反転入力58に加えられる。反転入
力58と出力の間に積分コンデンサー56を設け
差動演算増幅器41、積分抵抗55、積分コンデ
ンサー56とで積分回路を構成している。したが
つて定数を適当に選定することにより差動演算増
幅器41の出力電圧には脈動が無くなる。又、非
反転入力端子に加えられる直流入力電圧は出力か
ら積分コンデンサー56を介して反転入力端子に
負帰還されているので過渡的に負荷48に過電圧
が加わらないから増幅器41のゲインを非常に大
きく取ることが出来る。
This feedback signal is applied through an integrating resistor 55 to an inverting input 58 of the differential operational amplifier 41. An integrating capacitor 56 is provided between the inverting input 58 and the output, and the differential operational amplifier 41, the integrating resistor 55, and the integrating capacitor 56 constitute an integrating circuit. Therefore, by appropriately selecting constants, the output voltage of the differential operational amplifier 41 will be free from pulsations. Also, since the DC input voltage applied to the non-inverting input terminal is negatively fed back from the output to the inverting input terminal via the integrating capacitor 56, no overvoltage is transiently applied to the load 48, so the gain of the amplifier 41 is made very large. You can take it.

演算増幅回路の開ループ増幅度は10万倍以上に
あるので多量の負帰還がかゝり入力端子40の入
力電圧と負荷48の平均値電圧の変化に対しての
直線性は非常に良くなる。同時に交流電源49の
電圧の変動に対しても増幅器の入力電圧と帰還電
圧は常に等しくなるよう帰還され、かつ帰還電圧
と負荷48の負荷電圧は比例関係にあるので入力
電圧が一定の場合は負荷電圧48は変化しない結
果になり電源電圧変動に対しても安定であり高精
度になる。
Since the open loop amplification degree of the operational amplifier circuit is 100,000 times or more, there is a large amount of negative feedback, so the linearity with respect to changes in the input voltage at the input terminal 40 and the average value voltage of the load 48 is very good. . At the same time, even if the voltage of the AC power supply 49 changes, the input voltage of the amplifier and the feedback voltage are always fed back to be equal, and since the feedback voltage and the load voltage of the load 48 are in a proportional relationship, when the input voltage is constant, the The result is that the voltage 48 does not change, resulting in stability and high accuracy even with power supply voltage fluctuations.

以上、本発明の装置を一実施例について説明し
たが、本発明の装置を例えば電気炉に用いると、
高精度で安定な温度制御を行うことができる。
The apparatus of the present invention has been described above with respect to one embodiment, but when the apparatus of the present invention is used in an electric furnace, for example,
Highly accurate and stable temperature control can be performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のサイリスタ位相制御装置の一例
を示す回路図、第2図は第1図の装置を改良した
従来の装置の一例を示す回路図、第3図は本発明
のサイリスタ位相制御装置の一実施例を示す回路
図である。 主要部分の符号の説明、41,55,56……
積分増幅回路、44,45……パルス発生回路、
46,47……サイリスタ、48……負荷、5
0,51,52,53,54……帰還回路。
Fig. 1 is a circuit diagram showing an example of a conventional thyristor phase control device, Fig. 2 is a circuit diagram showing an example of a conventional device improved from the device in Fig. 1, and Fig. 3 is a thyristor phase control device of the present invention. FIG. 2 is a circuit diagram showing one embodiment of the present invention. Explanation of symbols of main parts, 41, 55, 56...
Integral amplifier circuit, 44, 45...pulse generation circuit,
46, 47...Thyristor, 48...Load, 5
0, 51, 52, 53, 54...Feedback circuit.

Claims (1)

【特許請求の範囲】 1 直流制御信号を入力する積分増幅回路と、 該積分増幅回路の出力に応じて位相が異なるパ
ルスを発生するパルス発生回路と、 該パルス発生回路の出力パルスによつて導通制
御されるサイリスタと、 該サイリスタを介して交流電源に接続された負
荷と、 該負荷に供給される信号と相似な波形を有する
信号を前記積分増幅回路の入力に負帰還する負帰
還回路とを備えたことを特徴とするサイリスタ位
相制御装置。 2 特許請求の範囲第1項に記載の装置におい
て、 積分増幅回路は差動増幅器よりなる積分器であ
り、直流制御信号を非反転入力端子に印加し、負
帰還回路を通して帰還した前記負荷に供給される
信号と相似な波形を有する信号を反転入力端子に
印加することを特徴とするサイリスタ位相制御装
置。 3 特許請求の範囲第1項又は第2項に記載の装
置において、 前記負帰還回路は、1次側コイル及び2次側コ
イルを有し該1次側コイルに前記負荷に給電する
ための交流電源が発生する電圧を入力するトラン
スと、該トランスの2次側コイルに発生した信号
を整流する整流器と、及び該整流器の整流出力を
位相制御するホトカプラーからなることを特徴と
するサイリスタ位相制御装置。
[Scope of Claims] 1. An integral amplifier circuit into which a DC control signal is input; a pulse generating circuit that generates pulses with different phases according to the output of the integral amplifier circuit; and conduction by the output pulse of the pulse generating circuit. A thyristor to be controlled, a load connected to an AC power supply via the thyristor, and a negative feedback circuit that negatively feeds back a signal having a waveform similar to the signal supplied to the load to the input of the integral amplifier circuit. A thyristor phase control device comprising: 2. In the device according to claim 1, the integral amplifier circuit is an integrator made of a differential amplifier, and applies a DC control signal to a non-inverting input terminal, and supplies the DC control signal to the load fed back through a negative feedback circuit. A thyristor phase control device characterized in that a signal having a waveform similar to that of a signal applied to an inverting input terminal is applied to an inverting input terminal. 3. In the device according to claim 1 or 2, the negative feedback circuit includes a primary coil and a secondary coil, and the primary coil is connected to an alternating current for supplying power to the load. A thyristor phase control device comprising a transformer that inputs the voltage generated by a power source, a rectifier that rectifies the signal generated in the secondary coil of the transformer, and a photocoupler that controls the phase of the rectified output of the rectifier. .
JP9821678A 1978-08-14 1978-08-14 Thyristor phase controller Granted JPS5525154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9821678A JPS5525154A (en) 1978-08-14 1978-08-14 Thyristor phase controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9821678A JPS5525154A (en) 1978-08-14 1978-08-14 Thyristor phase controller

Publications (2)

Publication Number Publication Date
JPS5525154A JPS5525154A (en) 1980-02-22
JPS623449B2 true JPS623449B2 (en) 1987-01-24

Family

ID=14213770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9821678A Granted JPS5525154A (en) 1978-08-14 1978-08-14 Thyristor phase controller

Country Status (1)

Country Link
JP (1) JPS5525154A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113796344B (en) * 2021-09-16 2022-11-25 深圳市翌卡本智能科技有限公司 Novel variable-frequency intelligent aerator speed regulation control system

Also Published As

Publication number Publication date
JPS5525154A (en) 1980-02-22

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