JPS6234416A - Signal selecting circuit - Google Patents

Abstract

PURPOSE:To realize a wide-band, stable signal selecting circuit which has excellent output linearity by composing circuits of transistors (TR), current sources, and resistances. CONSTITUTION:For example, input signals to circuit blocks S1 and S2 have voltage values so that V1>V2. The collector voltage of an output TR Q13 drops and a clamp TR Q14 is turned on; and a feedback TR Q12, on the other hand, is biased reversely to turn off. Therefore, an input TR Q11 is held on and the base voltage of an output TR Q13 does not vary. The collector voltage of an output TR Q23, on the other hand, is high, a clamp TR Q24 is biased reversely to turn off, and a feedback TR Q23 is turned on and enters a balanced state when the base voltages of output TRs Q13 and Q23 are nearly equal to each other. Consequently, an input TR Q21 is turned off and only an input signal V1 appears at an output terminal O. Similarly, only the input signal V1 which has a maximum value eventually is outputted to the output terminal O.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a signal selection circuit, and more particularly to a signal selection circuit that selects and outputs the maximum or minimum signal from a plurality of input signals.

2. Description of the Related Art Conventionally, in the field of various analog signal processing, signal selection circuits have been used as signal amplitude limiting circuits, magnitude detection circuits between two signals, and maximum or minimum value detection circuits of a plurality of signals.

FIGS. 3A and 3B show respective circuit diagrams of conventional signal selection circuits. This Figure 3 (A).

The circuits shown in (B) both accept multiple input signals V+
, V2, . . . , Vn, and outputs the selected signal.

In the circuit shown in FIG. 3(A), the output signal Vou
As is well known, t is governed by the forward non-linear input/output characteristics of the diodes D1 to DTI, so the input signal V1 to
When the voltage difference between η becomes small, the output impedance of the diode becomes high and the linearity of the output signal Out becomes poor.

The circuit shown in FIG. 3(B) solves the above-mentioned drawbacks, and the operational amplifiers 5A+ to A1 are newly provided to the above circuit, and the diodes DI-DTI are connected to the operational amplifiers A1 to A1.
It is configured to be placed in the return path of η. As a result, operational amplifiers A1 to ATL and diodes 01 to D1
operates equivalently as an ideal diode, and the nonlinearity of the input/output characteristics of the diodes D1 to DTl is improved.

Therefore, this improvement effect is dominated by the characteristics of the operational amplifiers A1 to ATL.

Problems to be Solved by the Invention However, as is well known, the operational amplifier A+''-Aη does not have sufficient frequency characteristics, so even if it can be used for low frequency signals, for example, it may cause oscillation or phase H at the video signal frequency. [The operation of the circuit becomes unstable due to the shift, etc., and it is not possible to obtain a sufficient effect of improving the nonlinearity of the input/output characteristics of the diode.

Furthermore, when the above selection circuit is implemented using a monolithic integrated circuit, for example, the operational amplifiers A1 to Δ1 have a complex circuit configuration as is well known, so the circuit configuration of the entire signal selection circuit will have to be adjusted to accommodate a large number of input signals. There were problems such as complication.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a signal selection circuit that solves the above problems by configuring the circuit with transistors, current sources, and Ilk piles.

Means for Solving the Problems The signal selection circuit according to the present invention includes a first transistor whose base is connected to one input terminal, and a second transistor whose emitters are commonly connected to each other. , a third transistor whose collector and base are connected between the base and emitter of the second transistor, and whose collector and base are connected in common to the emitters of the first and second transistors and the base of the third transistor. a first current source, a fourth transistor whose base is connected to the base of the first transistor, and whose emitter is connected to the base of the second transistor and the collector of the third transistor, respectively; A circuit consisting of a current detection resistor connected between the collector and emitter of transistor No. 4 is called n(
However, n is an integer of 2 to E) systems are provided, and each transistor is composed of a second current source and one output terminal commonly connected to the emitters of the third transistors of the n systems.

Operation The first and third transistors constitute a so-called emitter follower circuit. Therefore, the output signal sent to the output terminal via the first and third transistors has good linearity regardless of the magnitude of the signal supplied to the base of the first transistor.

On the other hand, the second transistor acts as a feedback transistor, feeding back changes in the collector voltage of the third transistor to its base to control its collector current. Further, the fourth transistor acts as a clamp transistor, and prevents the collector voltage of the third transistor from falling below a certain value, thereby preventing saturation of the third transistor.

Furthermore, since the emitters of the first and second transistors are each commonly connected to the first current source, when the second transistor is turned on in response to the collector voltage of the third transistor, the emitters of the first and second transistors are connected in common to the first current source. The emitter current of the transistor is limited to iil and turned off.

Furthermore, since the emitters of the n third transistors are each commonly connected to the second current source, nl! The collector voltage of the third transistor 1 becomes maximum or minimum in proportion or inverse proportion to the voltage values of the n input signals supplied to the n input terminals.

Therefore, the second transistor of the circuit to which the maximum or minimum input signal among the n input signals is supplied is turned off, and the input signal is applied to the bases of the first and third transistors. - Output to the output terminal via the respective emitters. On the other hand, the second transistor of the other (n-1> system circuit) is turned on, and the first transistor is turned off.

As a result, the output transmission paths of the (n-1) input signals supplied to the circuits of the (n-1) systems are cut off, so that the maximum or minimum outputs are not affected.

Embodiment FIG. 1 shows a circuit diagram of a first embodiment of a signal selection circuit according to the present invention. The circuit shown in FIG. 1 is composed of n circuit blocks 81 to ST+ corresponding to n (where n is an integer of 2 or more) input signals 1 to VTI, respectively, and a common current source I2. This circuit selects and outputs the maximum value from the input signals v1 to VT+.

Qll-QTIIt in the circuit block 81 to STI
Input 1 transistor, Qt2 to QT12 are feedback transistors, Q13 to QT13 are output transistors, Q14
~QT14 indicates a clamp transistor, and these are all NPN transistors. Further, In to lT11 indicate current sources, and R+ to RTI indicate current detection resistors, respectively. Since the circuit blocks S+ to Sη have the same configuration, the configuration of the circuit block S1 will be described below.

In the circuit block S1, the emitters of an input transistor Qn whose base is an input terminal and a feedback transistor Q12 are connected in common, and a current source I n is connected to the connection point. Output 1 and the collector and base of transistor QI3 are connected between the base and emitter of feedback transistor Q12. The base of clamp transistor QM is connected to the base of input transistor Qn, and the emitter of Q14 is connected to the base of Q10 and the collector of Qo, respectively.

Further, a current detection resistor R+ is connected to the emitter and collector terminals of the clamp transistor Q14.

In addition, the output transistor Q+ of the circuit blocks 81 to Sn
The emitters of QT3 to QT13 are connected in common, and the current source I2 and the output terminal 0 are connected to the connection point.

First, to explain the operation of the circuit block S1, the collector current of the output transistor QI3 flows through the current detection resistor R1, and changes the collector voltage of the output transistor QI3. This change in collector voltage is fed back to the base of the output transistor Q+a by the feedback transistor Q12 to control the collector current of the output transistor QO. On the other hand, since the emitters of the input transistor Qn and the feedback transistor Q12 are commonly connected to the current source 1u, the emitter current of the input transistor Q11 is controlled by the emitter current of the feedback transistor Q12. Further, the clamp transistor QH has a collector voltage of the output transistor Q13 (Vl −Ve
(However, ■1 indicates the voltage value of the input signal, and VBF indicates the forward base-emitter voltage of the clamp transistor QI4.) It is clamped to prevent the output transistor QI3 from becoming saturated. .

Next, the operation of the circuit that selects the maximum value of the input signal will be explained using the interaction between the circuit blocks S1 and 82 as an example. Here, it is assumed that the voltage values of the input signals of the circuit blocks S+ and Sz are, for example, Vl>V2. This input signal "t V + +v2 is transmitted to the bases of output transistors Q13 and Q23 via the bases and emitters of input transistors Qu and Q21, respectively,
As mentioned above, the output transistor QI3. Since the emitters of Q23 are each commonly connected to the current source 2, the emitter current of the output transistor QI3 is larger than the emitter current of the output transistor Q23.

Therefore, the collector voltage of the output transistor QI3 decreases, the clamp transistor Q14 is turned on, and the feedback transistor Q+? is reverse biased and turned off.

Therefore, the input transistor Qn is maintained in the on state,
The base voltage of output transistor Q13 does not change.

On the other hand, the collector voltage of output transistor Q23 is high;
Clamp transistor Q24 is reverse biased and turned off, and feedback transistor Q22 is turned on to feed back the collector voltage to output transistor Q23, thereby increasing its base voltage.

The above operation is performed by output transistor Q13. An equilibrium state occurs when the base voltages of Q23 are approximately equal.

As a result, the input transistor Q2+ is turned off, and the input (No. 3)2 is no longer transmitted to the output I- transistor Q23, and therefore is not transmitted to the output terminal 0 either.

In this way, only the input signal V1 is outputted to the output terminal O via the base-emitter of the input transistor Qn and the output transistor QI3, and the output voltage vout is the same as that of the transistor Qn.

When the base-emitter voltage of Q10 is both Veε, Vout = V+ −2Ve E (1
).

Here, if the input signal V+ is the maximum value among the input signals 1 to VT+, the same interaction as above will work between the circuit block S1 and the other circuit blocks 82 to STI, and eventually Only the input signal ■1 having the maximum value is output to the output terminal 0.

Next, in the case where the voltage difference between the input signals 1 to VTI is small, the circuit block S+ is processed in the same manner as described above.

This will be explained by taking S2 as an example. Here again, Vl>V2
It is assumed that there is a relationship between In this case, as described above, input transistor Q2+ is not necessarily completely off, and current may flow through input transistor Q21.

However, since the base voltage of the output transistor Q23 follows the input signal v2 due to the feedback action of the feedback transistor Q22, the output impedance of the emitter of the feedback transistor Q22 is extremely low and acts as a constant voltage source within the equipolar range. Input transistor Q by input signal ■2
The current flowing through 2+ is absorbed by the feedback transistor Q22 and does not affect the output.

On the other hand, input transistor Qn and output transistor QI3
both operate as an emitter follower circuit, and the input signal v
1 is transmitted to the output terminal O, the output has good linearity.

Furthermore, the circuit shown in FIG. 1 does not have an operational amplifier unlike the circuit shown in FIG. , the circuit shown in FIG. 1 operates stably even at video signal frequencies.

FIG. 2 shows a circuit diagram of a second embodiment of the signal selection circuit according to the present invention. The circuit shown in FIG. 2 has a configuration in which all the NPN transistors used in the circuit shown in FIG. This is a circuit that selects and outputs the minimum value from 1 to η.

Here, similarly to the above, circuit blocks S+' to ST+'
have the same circuit configuration, and 011' to Qn + '
are input transistors, QI2' to Qη2' are feedback transistors IQ+3' to Q13' are output transistors, and Q
ζ'~014' is the clamp transistor +1++'~1
Reference numeral 11' indicates an M current source, and R1' to R, l indicate current detection resistors, respectively. Further, the emitters of the output transistors 013' to QTI3' of the circuit blocks S+' to Sn' are commonly connected to the current source 12' and the output terminal O', respectively.

The operation of the circuit shown in FIG. 2 will be explained by taking the circuit blocks SI' and S2' as an example and assuming that Vl<V2. Here, since Vl<V2, the emitter current of the output transistor Qt1' is larger than the emitter current of the output transistor 023'.

Therefore, the collector voltage of the output transistor 013' increases and the collector voltage of the output transistor Qn' decreases, so the feedback transistor 012' is turned off and the -
Force feedback transistor Q22' is turned on. For this reason,
The input signal 1 is transmitted to the output terminal 0', and the -universal signal 2 is not output because the input transistor 021' is turned off.The output voltage vout' at this time is the base-emitter voltage of the transistor Qn'+Q+3'. If the voltage between them is VIE, Vout' = V+ +2Ve E ■
It is expressed as

In addition, the clamp transistor QM' is turned on, and the collector voltage of the output transistor Q+a' increases to 8ε'.
) (However, V[lE' is the clamp transistor QI4'
The output transistor 013' is clamped to prevent the output transistor 013' from becoming saturated.

In this manner, the circuit shown in FIG. 2 selects and outputs the minimum value among the plurality of input signals to the output terminal 0'.

Effects of the Invention As mentioned above, since the circuit of the present invention is configured with a transistor, an M current source, and a resistor, it has good output linearity due to the five-channel circuit configuration, and is stable over a wide band. Since a signal selection circuit can be realized, it has the advantage of being applicable to, for example, video signal processing.

[Brief explanation of the drawing]

1 and 2 are circuit diagrams showing the first and second embodiments of the signal selection circuit according to the present invention, respectively, and FIGS. 3(A) and 3(B)
2A and 2B are circuit diagrams showing respective conventional signal selection circuits. In' lt++,, in'-1*+',
I2゜12'...Current source, 0,0'...Output terminal, Qu~QTl+, Qn=QTl+'...Input transistor, Q10~(h+2, Q12'~Q
y+ 2' - feedback transistor, QI3 to QT13
．． QI3' to Q13'...output transistor, QI4
~QT14. QI4'~Q14'...Clamp transistor, R1~RTl l R+'~RT+'...
・Current detection resistor, 81~Sn, S+'~ST+'
...Circuit block.

Claims (1)

[Claims] a first transistor whose base is connected to one input terminal; a second transistor whose emitters are commonly connected to the first transistor; and a collector and base connected between the base and emitter of the second transistor. a first current source commonly connected to the emitters of the first and second transistors and the base of the third transistor; A fourth transistor is connected between the collector and emitter of the fourth transistor, the base of which is connected, and the emitter of which is connected to the base of the second transistor and the collector of the third transistor, respectively. n systems (where n is an integer of 2 or more) of circuits each consisting of a current detection resistor, a second current source and an output terminal commonly connected to the emitters of the third transistors of the n systems, respectively; A signal characterized in that it is configured such that one input signal having a maximum value or a minimum value from a maximum of n input signals supplied to said input terminals of n systems is selectively outputted to said one output terminal. selection circuit.