JPS6232799B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in speech recognition devices, and particularly contributes to improving input speed.

Speech recognition devices are effective as means for inputting data or control commands from humans to machines. In recent years, it has come to be used as an automatic sorting device control command input means. ``Pages 153 to 156 of the literature entitled ``Pattern Recognition and Its Applications,'' edited by Kazuo Nakata, published by Corona Publishing, September 1978,'' states that there are a wide range of other application fields. ing.

Speech recognition devices can be broadly classified into discrete input type and continuous input type. In the former case, it is necessary to insert a pause section (silent section) between input words. The start and end of a word are determined using this pause section, a word section is detected, and recognition processing is performed. However, in a voice such as the number "6" (roku), a pause section occurs immediately before k. In this way, the length of pauses that occur during words can sometimes reach 200 ms or more. Therefore, the length of the pause section between words is required to be approximately 300 ms or more. Therefore, in conventional discrete input type speech recognition devices, there is a
It was necessary to input words with pauses of 300ms or more, and the input speed was slow.

On the other hand, continuous input type speech recognition devices can perform recognition operations without inserting pauses between words, and can achieve high input speed. Japanese Patent Application No. 50-29891 discloses the structure of a continuous word recognition device, and its principle has been put to practical use in the DP-100 voice input device manufactured by NEC Corporation. However, in such continuous word recognition methods, since the boundaries between words are unknown, it is necessary to repeat the comparison calculation many times by assuming each point in the speech as a word boundary, which increases the amount of calculation required and the equipment The disadvantage was that it was large and expensive.

The present invention does not recognize completely continuous word strings, but as long as there are pauses between words, even if they are extremely short, the present invention can perform accurate recognition without being affected by pauses in words. This realizes an input type device.

That is, an object of the present invention is to realize and provide a speech recognition device that is much faster than the conventional discrete input type, and significantly smaller and cheaper than the continuous input type.

The high-speed speech recognition device according to the present invention includes an analysis section for analyzing an input speech waveform and converting it into an input pattern expressed as a vector sequence, a standard pattern memory for storing a standard pattern, and a standard pattern memory for testing the amplitude of the input speech. means for determining a resting point in an input pattern by using a pattern matching unit for calculating a distance between a partial pattern defined as an interval between the resting point and another resting point and the standard pattern; , a minimum value detection unit for comparing distances calculated for each standard pattern and calculating a partial distance as the minimum value and a partial judgment as a word name giving the minimum value, and each pause in the input pattern. Means for determining a group of partial patterns that are divided by points, do not overlap, and cover the entire input pattern so that the sum of the partial distances corresponding to each partial pattern is minimized, and each partial pattern determined thereby. and a determination unit for determining and outputting the partial determination corresponding to the recognition result as a recognition result.

According to such a configuration, calculation of partial distances and partial judgments only needs to be performed for resting points, so it is not necessary to calculate the partial distances and partial determinations using only the resting points.
-Voice recognition becomes possible with a much smaller amount of calculation than the configuration of No. 29891. On the other hand, when using this device, it is necessary to utter a pause between each word, but this pause can be as short or shorter than the pause within a word. Faster speeds can be achieved compared to conventional discrete input type speech recognition devices that require a sufficiently long pause interval.

Words to be recognized by the speech recognition device according to the present invention are not particularly limited, but in the following, numbers 0 to 9 will be recognized as a string. Generally, numbers are indicated by n.

n = 0, 1, 2, ..., 9 (1) For each number n, a standard pattern B ⁿ =〓 ₁ ⁿ , 〓 ₂ ⁿ , ..., 〓 _j ⁿ , ..., 〓 ⁿ _J n (2) is prepared. ing. Now, the input pattern (unknown) is expressed as A=〓 ₁ , 〓 ₂ , ..., 〓 _i , ..., 〓 _I (3). Here, the vectors 〓 _j ⁿ , 〓 _i in (2) and (3)
etc. are vectors indicating the characteristics of the voice at times j and i, respectively.

Input pattern A has multiple patterns (in special cases, 1 pattern)
Contains digit sounds. It is assumed that a pause section is necessarily included between the numbers, as shown in FIG. 1a. In the case of numbers "1", "6", "8", etc., there is also a pause section in the word. However, as a matter of course, it is unclear whether each pause section is a pause section between words or a pause section within a word.

Since there is no particularly useful information in the pause section other than information on whether it exists or not, its length can be compressed to 1. That is, it is assumed that the data is compressed as shown in FIG. 1b. It is assumed that input pattern A is compressed in this way. It is assumed that a 0 vector exists as the vector 〓 _i corresponding to the pause section. That is, in the pause section, 〓 _i = (0, 0, ..., 0) (4). It is assumed that the last vector 〓 ⁿ _J n of each standard pattern is also a 0 vector so that the comparison with input patterns including 0 vectors can be performed with high accuracy.

〓 ⁿ _J n=(0, 0,..., 0) (5) The principle of the recognition operation performed between the input pattern and the standard pattern described above will be explained below. 1st
The point where the 0 vector is inserted as shown in figure b is called the rest point. The first word, that is, the beginning of the word string, is set to 0, and the numbers are sequentially numbered thereafter, and the numbers k=0, 1, 2, . . . , L (6) are made to correspond to each pause section. Some of these pause sections are word boundaries, and others are simply pause sections within words. However, these distinctions are not known at the stage when an unknown input pattern A is given. Now, assume that the time i of the k-th rest point is given by i=p(k) (7). Define subpatterns A(x, y)=〓 _l+1 , 〓 _l+2 , . . . , 〓 _n (8) for input pattern A. Here, l=p(x), m=p(y) (9) That is, starting immediately after the x-th resting point and ending at the y-th resting point (including the 0 vector of the y-th resting point)
Define the vector sequence as a partial pattern A(x,y). This partial pattern may include a rest point inside. That is, the terminal end y of the partial pattern does not need to be a rest section immediately after the starting end x. In general, x<y (10) Now, assuming that this subinterval A(x, y) is a true word, this part can be recognized by a known pattern matching method. That is, now, when the distance between the vectors 〓 _i and 〓 _j is denoted by d (i, j), the relationship between the above partial pattern and the above speech pattern B (subscript n is omitted for generality) The distance between them is defined as follows.

This is synonymous with the definition of distance in equation (4) in, for example, Japanese Patent Application No. 1983-66589. Function j(i) is a monotonically increasing function and satisfies the following boundary conditions: j(l+1)=1, j(m)=j (12). According to the gist of the above specification or Japanese Patent Application No. 50-132003, the minimization problem of equation (11) is calculated by the following dynamic programming method (DP).

Initial condition g (m, j) = d (m, j) (13) Recurrence formula Distance D(A(x,y),B)=g(l+1,1)
(15) The above distance definition and calculation method is widely known as the DP-matching method, as described, for example, in "Speech Recognition" by Yasunaga Niimi (published by Kyoritsu Publishing Co., Ltd. on October 10, 1971), page 108. This is what is being done.

Distance D (A(x, y), B ⁿ ) obtained by substituting B ⁿ as the standard pattern and executing the above procedure
is abbreviated as D(x, y, n). When this distance is found for all of the numerical words n=0, 1, . . . , 9, this partial pattern A(x, y) can be recognized by finding its minimum value. Partial judgment of the result partial distance shall be. Here, the symbol argmin means to select the parameter n that gives the minimum value in [ ].

The above partial judgment N^(x, y) and partial distance D^
Let us find (x, y) for all pairs of resting points (x, y). The above is called first stage processing.

Next, the sum of the partial distances D^(x, y) is calculated for the entire input pattern A, and a partial pattern sequence that minimizes the sum is determined. However, as shown in Figure 2, these partial pattern rows do not overlap with each other;
Moreover, it is assumed that the input pattern A is entirely covered.
This requirement means that there are no overlapping parts between words in the continuously uttered word string, and there are no extra parts that do not belong to any word.
Furthermore, the boundary between each partial pattern in this partial pattern sequence must coincide with one of the above-mentioned rest points. The above can be expressed mathematically as follows.

That is, the number of words M and the word boundaries x(0), x
By optimally selecting (1), . . . , x(k), . . . , x(M), the sum of partial distances corresponding to these word boundaries is minimized.

Calculate the minimization problem of equation (16) and find the optimal parameters K=M and x(k)=x^(k), k=0, 1, 2,...
M^ (However, since x(0) is the starting point of the entire word string, x(0) = 0, and x(M) is the end point of the entire word string, so it is obvious that x(M) = I). When calculated, by referring to the partial determination N^(x, y) above, n^(k)=N^(x^(k-1), x^(k)), k=1, 2 , ..., M^ (17) and the recognition result is finalized.

Although the calculation of the minimization problem of equation (16) is possible, for example, by a dynamic programming method as shown in equation (24) in the specification of Japanese Patent Application No. 50-132003, in the case of the present application, The scale of the problem is small because it is only necessary to determine word boundaries at rest points.
This is also possible using the so-called brute force method. In other words, in the case of Figure 2, since there are five resting points excluding the start and end of the word string as a whole, the partial It is performed by calculating the sum of a group of distances and finding the minimum value. The total number of combinations in this case is only 2 ⁵ (there are 5 independent events of whether it is a resting point or not, that is, whether it is 1 or 0), that is, 32 ways. The resting point
Even if there are 10 items, there are only 1024 ways, and even if it takes 100 μs to calculate the total sum once, the total calculation will be completed within 102.4 ms.

The minimization of these equations (16) is called second stage processing.
Also, the calculation of equation (17) is called determination processing.

FIG. 3 is a block diagram showing an example of the configuration of a high-speed speech recognition device that operates based on the above principle.
The audio signal input through the signal line IS is subjected to frequency analysis and time multiplexing by a frequency analysis means 20 as shown in "Figure 2 on page 929 of Electronics magazine published by Ohmsha in September 1974". The input pattern buffer 4 is an example of the time series of vectors expressed in equation (3), which are
Sent to 0. On the other hand, the level detector 30 measures the amplitude level of the input audio signal and sends it as a level signal L to the audio detector 50. voice detector 50
Then, based on the input level signal L, signals q ₁ , q ₂ , bg, and en as shown in FIG. 4 are generated. That is, a start detection pulse bg is generated at the start of the voice (the start of the entire word string), and an end detection pulse en is generated at the end of the voice (the end of the entire word string). Further, a rest period detection pulse q ₁ is generated at the start point of the rest period, and a rest period continuation signal q ₂ is generated during the rest period.

The output m ₁ of the frame counter built in the control unit 10 and the output k ₁ of the rest point counter are respectively m ₁ at the time when the start edge detection pulse bg is generated.
=1, k ₁ =1. Also, after all the contents of the rest point table are reset to -1, 0 is written at address 0. Thereafter, each time one input pattern vector 〓 _n (time i=m) is sent from the frequency analysis section 20, the frame counter signal is incremented by one. The address is specified by this frame counter signal, and the rest point counter signal _{k1 is} written in the m _{- th} address of the rest point table. It can be done. When the rest period detection pulse q ₁ is generated at the beginning of the rest period, 1 is written in the m _-th address of the rest point table, and the input pattern buffer is filled with 0 as the vector 〓 _n , as shown in equation (4).
A vector is written. Also, the rest point counter signal _k1 is incremented by one. Thereafter, while the pause period continuation signal q ₂ is being generated, the frame counter signal m is inhibited from increasing. With such control, even if a voice with pauses as shown in FIG. 1a is input, an input pattern with the pauses compressed as shown in FIG. 1b can be obtained.

Assume that a pause period starts when the frame counter signal m ₁ =m and the pause point counter signal k ₁ =y.
When the pause section detection signal q ₁ is sent to the pattern matching section 70, the first stage processing described above is started. Therefore, the word designation signal _n1 from the control section is changed to 0, 1, 2, . . . , 9 as shown in the time chart in FIG.
The standard patterns B ⁿ within are sequentially specified. Now, the operation of the pattern matching section 70 when the word designation signal is generally n ₁ =n will be explained. generally n ₁
=n, calculations of equations (13) and (14) are performed. In particular, the calculation of equation (14) is
As stated in No. 132003, j+m-J ⁿ -γ≠≦i≦j+m-J ⁿ +γ
(18), and as a result, the recurrence formula value g
(i, 1) is found in the range 1+m-J ⁿ -γ≦i≦1+m-J ⁿ +γ (19). Therefore, the distance D(x, y,
n) is m-J ⁿ -γ≦l≦m-J ⁿ +γ, that is, P(x)-J ⁿ -γ≦P(y)≦P(x)-J ⁿ +γ
(20) It is calculated for the partial pattern whose starting point is the resting point x that satisfies the condition. When there are multiple x's that satisfy the condition (20), the distance D(x, y, n) is calculated for each of the partial patterns A(x, y) starting from these x's. Such a pattern matching section 70 is disclosed in Japanese Patent Application No. 50-29891, which is also referred to in the specification of Japanese Patent Application No. 132003/1983.
This can be realized by a configuration similar to that shown in FIG. 6 of the specification.

The distance D (x, y, n) thus calculated is sent to the minimum value detection section 80 via the signal line _D1 . The feature of this paper is that only resting points can be word boundaries. For this reason, the address signal
An address is specified in the rest point table 60 within the range of equation (19) by m ₂ =i, and the content of address i is c(i)
is read out via signal line c. c(i) is -1
In this case, the corresponding recurrence formula value g(i, 1) is not output. When c(i) is a non-negative number x, since x is a rest point number, the recurrence formula value g(i, 1) is output as the distance D(x, y, n). This rest point number c(i) is also sent to the partial distance memory 90 and the partial determination memory 100 via the signal line _k2 . The above operations are repeated while the word designation signal n changes from 0 to 9.

The minimum value detection section 80 compares the distances D (x, y, n) outputted from the pattern matching section 70 via the signal line _D1 . As a result, for the same resting point pair (x, y), calculate the minimum value of the distance D(x, y, n) with respect to word n and use it as the partial distance D^(x, y) of equation (17). , and the word that gives the minimum value is determined by partial judgment N^ of equation (16).
Let it be (x, y). These are the signals D^ and N^, respectively.
are entered into the partial distance memory 90 and partial determination memory 100, respectively. In this case, the address is designated by the rest point number x given by the rest point count signal _k1 from the control section 10 and the rest point number y given from the pattern matching section 70 through the signal line _k2 . It will be done. The overall configuration of the minimum value detection section 70, partial determination memory 100, and partial distance table 90 that are involved in this operation is, for example, the first comparison circuit shown in FIG. 16, the partial determination result table 18, and the partial similarity table 17 may have the same configuration and connection.

The above procedure is repeated every time the input pattern vector 〓 _n is input and a pause section is found (that is, every time the pause section detection pulse q ₁ is generated). The rest point count signal k ₁ at the time when the last end detection pulse en is generated is (K+2)
Suppose that it is. At this time, the number of the last resting point (that is, the end of the word string) is (K+1)
It becomes. Therefore, for a combination of resting points x and y within the range 0≦x<y≦K+1 (21), the partial judgment N^(x, y) and the partial distance D^(x, y) are as follows. are written in the partial determination memory 100 and the partial distance memory 90.

The end detection pulse e _o is sent to the second stage processing section 11.
When set to 0, calculation of equation (16) begins. This second stage processing section is composed of a well-known microprocessor, and performs the following operations.
In order to calculate equation (16) using the brute force method, we calculate all the cases where each of the K resting points (excluding the start and end of the entire word string) is a true word boundary and when it is not. I need to check the combination. Therefore, using the concept shown in Figure 6, the resting point (x, y)
generate a combination of In other words, assume a K-bit counter 1101, and set this counter to an initial value of 1.
, and then increment by 1. The address table 1102 is masked by the K-bit output γ, and only the addresses to which the bit with γ=1 is input are output. The address table starts from 0 (K+
Integers up to 1) are recorded, and address 0 and address (K+1) are always output. This corresponds to the fact that the start and end points of a word string are treated as a pause section. These addresses are scanned in pairs by a scanner, with the low address x=x(k-1) and the high address y=x
(k) is sent to the partial distance memory 90 as an address pair k ₃ =(x,y). As a result, the partial distance D^(x(k-1), x(k)) is read out through the signal line D^ ₁ . The total sum of partial distances is calculated while performing the scanning shown in FIG. 6 while continuing such address designation and reading. Next is the counter 110
The contents of 1 are incremented by 1 and the same procedure as above is performed to calculate the sum. Thus counter 11
The sum is calculated repeatedly until the contents of 01 become all 1. In parallel with this calculation of the sum group, find their minimum value. When this minimum value is obtained, the address group (addresses for which γ = 1 is specified in the address table in Figure 6) is x^(k), k from the lower address.
=0, 1, 2,..., M^ (where M^ is the total number of addresses for which γ=1). Thus, the minimization of equation (16) is completed. In other words, the second stage processing has ended.

After the optimal parameter (pause point number corresponding to the word boundary) n^(x) of equation (16) is determined, the judgment process is performed by executing equation (17) by the judgment unit 120. That is, x^=x^(k-1),
Send address signal k ₄ consisting of a pair of y=x^(k) to partial judgment memory 100 and send N(x^, y^) to signal N ₁
The procedure of reading out as k=1, 2,...
It is executed by repeating M^. These determination results n^(k) are output to the outside via the signal line n^. Since this determination process is simple, the determination unit 12
0 may be the same common microprocessor as the second stage processing section 110 described above.

Although the configuration of the present invention has been described above based on examples, these descriptions do not limit the scope of the present invention. In particular, the structure and operation of the second stage processing section are disclosed in Japanese Patent Application No. 50-29891, Japanese Patent Application No. 132003-1973,
The configuration and operation described in Japanese Patent Application No. 132004 and Japanese Patent Application No. 51-18346 may also be used. Further, in this application, the distance between vectors is used as a measure of similarity, but the inner product between vectors may be used as in the case of Japanese Patent Application No. 132003/1983. In this case, all minimum value detection operations in the present application must be replaced with maximum value detection operations.

[Brief explanation of the drawing]

Figures 1a, 1b, and 2 are diagrams for explaining the operating principle of the present invention, Figure 3 is a block diagram showing an embodiment of the present invention, Figures 4 and 5 are time charts, FIG. 6 is a block diagram for explaining a part of the configuration of the block diagram of FIG. 3. In the figure, 10 is a control section, 20 is an analysis section, 3
0 is a level detector, 40 is an input pattern buffer,
50 is a voice detector, 60 is a rest point table, 70
is a pattern matching section, 80 is a minimum value detection section, 9
0 is a partial distance memory, 100 is a partial judgment memory, 110 is a second stage processing section, 120 is a judgment section, 1
30 is a standard pattern memory, 1101 is a counter, and 1102 is an address table.

Claims (1)

[Claims] 1 an analysis unit for analyzing an input audio waveform and converting it into an input pattern expressed as a vector sequence;
a standard pattern memory for storing standard patterns; a means for testing the amplitude of input audio to determine resting points within said input pattern; and defined as an interval between each resting point and another resting point. a pattern matching unit for calculating the distance between the partial pattern and the standard pattern; and a word that compares the distances calculated for each standard pattern and gives the minimum value of the partial distance and the minimum value. A minimum value detection unit for calculating a famous partial judgment, and a partial distance corresponding to each partial pattern, which is divided by each rest point in the input pattern, and detects a group of partial patterns that do not overlap and cover the entire input pattern. A high-speed speech recognition system comprising: a means for determining the sum of the sums thereof to be a minimum; and a determining unit for determining and outputting the partial determination corresponding to each partial pattern determined by this as a recognition result. Device.