JPS6232712B2 - - Google Patents

Info

Publication number
JPS6232712B2
JPS6232712B2 JP56017638A JP1763881A JPS6232712B2 JP S6232712 B2 JPS6232712 B2 JP S6232712B2 JP 56017638 A JP56017638 A JP 56017638A JP 1763881 A JP1763881 A JP 1763881A JP S6232712 B2 JPS6232712 B2 JP S6232712B2
Authority
JP
Japan
Prior art keywords
transistors
voltage
base
winding
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56017638A
Other languages
Japanese (ja)
Other versions
JPS57132776A (en
Inventor
Takahiro Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Life Solutions Ikeda Electric Co Ltd
Original Assignee
Ikeda Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ikeda Electric Co Ltd filed Critical Ikeda Electric Co Ltd
Priority to JP56017638A priority Critical patent/JPS57132776A/en
Publication of JPS57132776A publication Critical patent/JPS57132776A/en
Publication of JPS6232712B2 publication Critical patent/JPS6232712B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/338Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement
    • H02M3/3382Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement in a push-pull circuit arrangement
    • H02M3/3384Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement in a push-pull circuit arrangement of the parallel type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)
  • Inverter Devices (AREA)

Description

【発明の詳細な説明】 本発明はトランジスタのスイツチング時におけ
る電力損失を軽減したトランジスタインバータに
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor inverter that reduces power loss during switching of transistors.

従来のトランジスタインバータとして第1図に
示すものがある。同図において、1は直流電源、
2,3はトランジスタ、4はトランスである。こ
のトランス4は入力巻線4a、出力巻線4b及び
帰還巻線4cを有する。5,6はバイアス抵抗、
7は負荷、8は定電流インダクタ、9は共振コン
デンサである。このインバータはプツシユプル形
のインバータであり、帰還巻線4cによりトラン
ジスタ2,3をバイアスしてスイツチングさせ
る。しかしながら、トランジスタ2,3がオンか
らオフに移行する時トランジスタ2,3のベース
に不所望なバイアス電圧VBETが印加されること
がある。即ち、一方のトランジスタ2又は3に着
目して各部の電圧、電流波形図を示すと第2図a
〜dのようになる。aはコレクタ・エミツタ間電
圧、bはコレクタ電流、cはベース電流、dはベ
ース・エミツタ間電圧である。上記のように不所
望なバイアス電圧VBET(第2図d)を印加され
ることによつて、トランジスタ2,3はオフすべ
きときに一時的にオンしたり、オンすべきときに
オフするということがあつた。特に、オフすべき
ときに一時的にベース電流IBT(第2図c)が流
れてオンすると、トランジスタ2,3にはコレク
タ電流ICT(第2図b)が過度的に流れ、この結
果、コレクタ・エミツタ間電圧とコレクタ電流と
の積が電力損いわゆるスイツチングロスとなるも
ので、この電力損を生じることによつて、発熱
し、さらにはトランジスタ2,3が破壊されると
いう問題があつた。このような問題は、トランジ
スタ2,3の温度が高いときベース・エミツタ間
の順バイアス電圧が低下することによつて特に起
こりやすいものである。なお、不所望なバイアス
電圧VBETができる原因を考察すると、周知の通
り第1図及び第3図のインバータの動作は以下の
通りである。即ち、トランジスタ2,3のベース
電流は、コンデンサ9と入力巻線4aとの共振電
圧と同相で極性が変化する帰還巻線4cの極性に
従つて流れ、トランジスタ2,3は交互にオン・
オフする。つまり直流電源1よりバイアス抵抗
5,6を介してトランジスタ2,3にベース電流
が流れようとするが、第4図に示すように帰還巻
線4cの極性によりトランジスタ2,3のうちど
ちらかしか電流が流れない。例えば帰還巻線4c
の極性が第4図に示す通りで電圧が0.1Vの場
合、トランジスタ2がオンし、そのベース電圧が
0.6Vになり、トランジスタ3のベース電圧は
0.5V(0.6−0.1)となり、トランジスタ3のベー
スには電流が流れ込まず、バイアス抵抗5,6及
び帰還巻線4cを介して第4図に矢印で示すルー
プでトランジスタ2へベース電流が流れる。トラ
ンジスタ2,3のコレクタ電流はインダクタ8に
よりリツプルが抑えられ、オン期間中の電流は略
一定となる(オンからオフ、オフからオンに移行
するときをのぞいて)。帰還巻線4cの極性が変
化しベース電流が流れなくなつてもオンしていた
トランジスタ2,3はストレージ時間の間オンを
つづけ、その後オフする。帰還巻線4cの電圧の
極性により、トランジスタ2,3のどちらかがオ
ンすることを決定しているのであるが、帰還巻線
4cの電圧が低い期間ではオフすべきトランジス
タのベース・エミツタ間電圧は0.6Vよりあまり
低くならず、確実にはオフしにくい。ストレージ
時間を短くするには逆ベース電流を流すと短くな
る。第1図及び第3図の回路は逆ベース電流を流
す機能をもつており、以下の様な動作で逆ベース
電流がオンからオフへ移行するときに流れる。例
えばトランジスタ2がオフしトランジスタ3がオ
ンした状態からトランジスタ2がオン、トランジ
スタ3がオフに移動する時の動作が次のようにな
ることによる。コンデンサ9の容量と入力巻線4
a、出力巻線4bのインダクタンスとは共振して
おり、第2図の時点Aにおいてコンデンサ9の電
圧は0になり、その後極性がかわろうとし、オフ
していたトランジスタ2のエミツタ、コレクタ間
には逆方向の電圧が印加され、トランジスタ2は
逆方向にオンし、トランジスタ3,2が同時にオ
ンする状態が生じる。このとき、第3図に示す如
くコレクタ電流ICP、ベース電流IB2、ベース電
流IB3が流れ、ベース電流IB3の逆電流によりト
ランジスタ3のキヤリヤは消滅し、トランジスタ
3はオフ状態になり、またこのときベース・エミ
ツタ間には逆電圧方向のベース・エミツタ電圧V
BEP(第2図d)が生じ、その後トランジスタ2
が順方向にオンするのである。即ち、コンデンサ
9と入力巻線4aとの共振によりコンデンサ9の
極性が第3図に示す如くなろうとすると、トラン
ジスタ2が逆方向にオンし、コンデンサ9の両端
電圧はOVのままで、コンデンサ9に電流が流れ
ず、入力巻線4a、コンデンサ9を流れていた電
流は第3図に示す如く電流IB2となり、第2図
b,cのような電流が流れ、ベース電流IB3はト
ランジスタ3の逆ベース電流となつて、トランジ
スタ3をオフさせる。トランジスタ3がオフする
と逆ベース電流IB3、ベース電流IB2がなくな
り、抵抗5,6からのみベース電流が流れる状態
になる。ベース電流IB2はトランジスタ2のエミ
ツタよりベースを通りコレクタに流れる為、ベー
ス電流IB2が流れている期間ベース・エミツタ電
圧VBEPが生じる。逆ベース電流IB3がなくなつ
たあと、帰還巻線4cのインダクタンスとトラン
ジスタ2,3のベース・エミツタ間容量で振動が
生じることがあり、この振動電圧により、オフす
べきトランジスタのベース・エミツタ間電圧が
0.6Vをこえ、不所望なバイアス電圧VBETが生じ
る。そしてこの時のトランジスタ3のベース・エ
ミツタ間電圧はトランジスタ2のベース・エミツ
タ間電圧(約0.6V)から帰還巻線4cの電圧を
引いた電圧であるが、この時の帰還巻線4cの電
圧は僅かである為、トランジスタ3のベース・エ
ミツタ間電圧は約0.5〜0.4Vであり、帰還巻線4
cのインダクタンス及びトランジスタ3のベー
ス・エミツタ間の容量により振動が生じた時は前
記の電圧が0.6〜0.7Vになり、不所望なバイアス
電圧VBETが生じる。
A conventional transistor inverter is shown in FIG. In the figure, 1 is a DC power supply,
2 and 3 are transistors, and 4 is a transformer. This transformer 4 has an input winding 4a, an output winding 4b, and a feedback winding 4c. 5 and 6 are bias resistances,
7 is a load, 8 is a constant current inductor, and 9 is a resonant capacitor. This inverter is a push-pull type inverter, and the transistors 2 and 3 are biased and switched by the feedback winding 4c. However, when transistors 2 and 3 transition from on to off, an undesired bias voltage V BET may be applied to the bases of transistors 2 and 3. That is, if we focus on one transistor 2 or 3 and show the voltage and current waveform diagram of each part, Figure 2 a
~d. a is the collector-emitter voltage, b is the collector current, c is the base current, and d is the base-emitter voltage. As described above, by applying the undesired bias voltage V BET (Fig. 2 d), the transistors 2 and 3 are temporarily turned on when they should be turned off, or turned off when they should be turned on. Something happened. In particular, when the base current I BT (Fig. 2 c) temporarily flows and turns on when it should be turned off, the collector current I CT (Fig. 2 b) flows transiently in transistors 2 and 3, and as a result, The product of the collector-emitter voltage and the collector current becomes a power loss, so-called switching loss, and this power loss causes heat generation and furthermore, the problem that transistors 2 and 3 are destroyed. It was hot. Such a problem is particularly likely to occur when the temperature of the transistors 2 and 3 is high and the forward bias voltage between the base and emitter decreases. When considering the cause of the undesired bias voltage V BET , as is well known, the operations of the inverters shown in FIGS. 1 and 3 are as follows. That is, the base currents of the transistors 2 and 3 flow according to the polarity of the feedback winding 4c, which changes polarity in phase with the resonant voltage between the capacitor 9 and the input winding 4a, and the transistors 2 and 3 are alternately turned on and off.
Turn off. In other words, the base current tries to flow from the DC power supply 1 to the transistors 2 and 3 via the bias resistors 5 and 6, but as shown in FIG. No current flows. For example, the feedback winding 4c
If the polarity of is as shown in Figure 4 and the voltage is 0.1V, transistor 2 is turned on and its base voltage is
becomes 0.6V, and the base voltage of transistor 3 becomes
0.5V (0.6-0.1), and no current flows into the base of transistor 3, but the base current flows to transistor 2 in a loop shown by an arrow in FIG. 4 via bias resistors 5, 6 and feedback winding 4c. Ripples in the collector currents of the transistors 2 and 3 are suppressed by the inductor 8, and the currents are approximately constant during the on period (except when transitioning from on to off and from off to on). Even when the polarity of the feedback winding 4c changes and the base current no longer flows, the transistors 2 and 3, which have been on, continue to be on for the storage time and are then turned off. Depending on the polarity of the voltage across the feedback winding 4c, it is determined whether transistors 2 or 3 will be turned on; however, during periods when the voltage across the feedback winding 4c is low, the base-emitter voltage of the transistor that should be turned off is low. is not much lower than 0.6V and is difficult to turn off reliably. The storage time can be shortened by flowing a reverse base current. The circuits shown in FIGS. 1 and 3 have a function of flowing a reverse base current, and the reverse base current flows when the circuit changes from on to off in the following operation. For example, when the transistor 2 is turned off and the transistor 3 is turned on, the operation when the transistor 2 is turned on and the transistor 3 is turned off is as follows. Capacity of capacitor 9 and input winding 4
a, it resonates with the inductance of the output winding 4b, and the voltage of the capacitor 9 becomes 0 at time A in FIG. A voltage in the opposite direction is applied, transistor 2 is turned on in the opposite direction, and a state occurs in which transistors 3 and 2 are turned on simultaneously. At this time, as shown in FIG. 3, collector current I CP , base current I B2 , and base current I B3 flow, and the carrier of transistor 3 disappears due to the reverse current of base current I B3 , and transistor 3 turns off. Also, at this time, the base-emitter voltage V in the reverse voltage direction is applied between the base and emitter.
BEP (Fig. 2d) occurs and then transistor 2
turns on in the forward direction. That is, when the polarity of the capacitor 9 becomes as shown in FIG. 3 due to resonance between the capacitor 9 and the input winding 4a, the transistor 2 turns on in the opposite direction, and the voltage across the capacitor 9 remains at OV. No current flows through the input winding 4a and the capacitor 9, and the current flowing through the input winding 4a and the capacitor 9 becomes a current I B2 as shown in Fig. 3. Currents as shown in Fig. 2 b and c flow, and the base current I B3 flows through the transistor 3. becomes a reverse base current, turning off the transistor 3. When the transistor 3 is turned off, the reverse base current I B3 and the base current I B2 disappear, and the base current flows only from the resistors 5 and 6. Since the base current I B2 flows from the emitter of the transistor 2 through the base to the collector, a base-emitter voltage V BEP is generated during the period when the base current I B2 is flowing. After the reverse base current I B3 disappears, oscillation may occur in the inductance of the feedback winding 4c and the capacitance between the base and emitter of the transistors 2 and 3, and this oscillating voltage causes the oscillation between the base and emitter of the transistor to be turned off. voltage is
Exceeding 0.6V results in an undesired bias voltage V BET . The voltage between the base and emitter of transistor 3 at this time is the voltage obtained by subtracting the voltage of feedback winding 4c from the voltage between the base and emitter of transistor 2 (approximately 0.6V). is small, so the base-emitter voltage of transistor 3 is approximately 0.5 to 0.4V, and feedback winding 4
When vibration occurs due to the inductance of c and the capacitance between the base and emitter of transistor 3, the voltage becomes 0.6 to 0.7V, resulting in an undesired bias voltage V BET .

本発明は、上記問題点に鑑み、トランジスタを
不所望にバイアスすることを防止して、スイツチ
ング時における電力損を軽減し、トランジスタが
異常発熱したり、破損されたりすることのないト
ランジスタインバータを提供することを目的と
し、その特徴とするところは、直流電源11の一
端に接続された一対のトランジスタ14,15
と、トランス17とを備え、前記直流電源11の
他端に、トランス17の入力巻線17aのセンタ
ータツプを接続し、該入力巻線17aの両端に、
前記一対のトランジスタ14,15をプツシユプ
ルに接続し、入力巻線17aに共振コンデンサ2
1を並列接続し、前記トランジスタ14,15の
各ベースを、夫々バイアス抵抗19,20を介し
て入力巻線17aのセンタータツプ接続すると共
に、トランス17の帰還巻線17cの両端に夫々
接続し、該帰還巻線17cにより一対のトランジ
スタ14,15を交互に導通するように制御し
て、トランス17の入力巻線17a側の直流電源
11を出力巻線17b側に交流電圧として供給す
るようにしたトランジスタインバータにおいて、
前記各トランジスタ14,15のベース・エミツ
タ間に、そこに発生する逆電圧に対して順方向に
なるダイオード22,23とコンデンサ24,2
5との直列回路を接続すると共に、そのダイオー
ド22,23に抵抗26,27を並列接続し、逆
電流が流れ終わつたあとも逆バイアスを続けるよ
うにした点にある。
In view of the above problems, the present invention provides a transistor inverter that prevents undesired biasing of transistors, reduces power loss during switching, and prevents transistors from generating abnormal heat or being damaged. Its purpose is to
and a transformer 17, the center tap of an input winding 17a of the transformer 17 is connected to the other end of the DC power supply 11, and both ends of the input winding 17a,
The pair of transistors 14 and 15 are connected in a push-pull manner, and a resonant capacitor 2 is connected to the input winding 17a.
1 are connected in parallel, and the bases of the transistors 14 and 15 are connected to the center tap of the input winding 17a via bias resistors 19 and 20, respectively, and to both ends of the feedback winding 17c of the transformer 17, respectively. The feedback winding 17c controls the pair of transistors 14 and 15 to conduct alternately, so that the DC power supply 11 on the input winding 17a side of the transformer 17 is supplied to the output winding 17b side as an AC voltage. In the transistor inverter,
Between the base and emitter of each of the transistors 14 and 15, diodes 22 and 23 and capacitors 24 and 2 are arranged in a forward direction relative to the reverse voltage generated therein.
5 is connected in series, and resistors 26 and 27 are connected in parallel to the diodes 22 and 23, so that the reverse bias continues even after the reverse current has finished flowing.

以下、本発明を図示の実施例に従つて説明する
と、第5図において、11は直流電源で、交流電
源12と整流器13とから成る。14,15はト
ランジスタ、16は定電流インダクタである。1
7はトランスで、入力巻線17aの両端をトラン
ジスタ14,15のコレクタに夫々接続し、中間
点を直流電源11の正極に接続している。またト
ランス17は出力巻線17b及び帰還巻線17c
を有し、出力巻線17bには負荷例えば放電灯1
8を接続すると共に、帰還巻線17cをトランジ
スタ14,15のベースに共通に接続している。
19,20はトランジスタ14,15のバイアス
抵抗、21は共振コンデンサである。22,23
はダイオード、24,25はコンデンサで、これ
らはトランジスタ14,15のベース・エミツタ
間に互いに直列に接続されている。26,27は
抵抗で、ダイオード24,25に並列接続されて
いる。
Hereinafter, the present invention will be explained according to the illustrated embodiment. In FIG. 14 and 15 are transistors, and 16 is a constant current inductor. 1
A transformer 7 has both ends of an input winding 17a connected to the collectors of the transistors 14 and 15, respectively, and its midpoint connected to the positive electrode of the DC power supply 11. Further, the transformer 17 has an output winding 17b and a feedback winding 17c.
The output winding 17b has a load such as the discharge lamp 1.
8 is connected, and the feedback winding 17c is commonly connected to the bases of the transistors 14 and 15.
19 and 20 are bias resistors of the transistors 14 and 15, and 21 is a resonant capacitor. 22, 23
is a diode, and 24 and 25 are capacitors, which are connected in series between the bases and emitters of transistors 14 and 15. 26 and 27 are resistors, which are connected in parallel to the diodes 24 and 25.

次に動作を説明する。トランジスタ14,15
のスイツチングによりトランス17は高周波交流
電力を出力する。これによつて、放電灯18は始
動し点灯する。またトランジスタ14,15のコ
レクタ・エミツタ間には第2図aに示すものと同
様の波形の電圧があらわれる。一方、帰還巻線1
7cには共振コンデンサ21の両端電圧と同一の
波形があらわれ、この電圧の極性によりりバイア
ス抵抗19,20を介して流れる電流をトランジ
スタ14又はトランジスタ15のベースへ流すか
を決定し、トランジスタ14,15を共振と一致
せてオンオフさせる。オフしているトランジスタ
14,15のコレクタ・エミツタ間電圧は、共振
につれ上昇し又下降し(第2図a参照)、時点A
において逆方向電圧が印加されようとするが、ト
ランジスタ14,15は逆方向には電圧阻止でき
ない為、時点A以降逆方向にオンし、逆方向のコ
レクタ電流−ICPが流れ(第2図b参照)、これ
に対応してオンしているトランジスタ14,15
にはコレクタ電流ICPが流れる。逆方向のコレク
タ電流−ICPによりベース電流IB2、ベース電流
B3が(第3図参照)が流れ、オフしていたトラ
ンジスタ14,15は逆方向のベース電流により
急速にオフし、オフすることによりコレクタ電流
−ICP、ICPは無くなり、その後は帰還巻線17
cに発生している電圧の極性によりオフしていた
トランジスタ14,15がオンする。そしてこの
時点においてはコンデンサ21の電圧は小さく、
従つて帰還巻線17cの電圧も低いので、ダイオ
ード22,23、コンデンサ24,25及び抵抗
26,27が無い場合、帰還巻線17cのインダ
クタンス及びトランジスタ14,15のベース・
エミツタ間の容量により共振を生じ、ベース・エ
ミツタ間の電圧波形を示す第6図において点線で
示す如く不所望なバイアス電圧VBETが生じるこ
とがあるが、ダイオード22,23、コンデンサ
24,25及び抵抗26,27がある為、トラン
ジスタ14,15が逆方向にオンした時に生じる
逆方向のベース・エミツタ間電圧VBEPにより即
ちベース電流IB2によりダイオード22,23を
介してコンデンサ24,25をエミツタに対して
一方向に充電し、ベース電流IB2、ベース電流I
B3がなくなつたあと、抵抗26,27を介してベ
ースへ一定時間一方向の電圧を印加し、前記の振
動が生じても、ベース・エミツタ間電圧が0.6V
に達しないようになり、第6図に実線で示す如く
不所望なバイアス電圧VBETが生じなくなる。
Next, the operation will be explained. Transistors 14, 15
By switching, the transformer 17 outputs high frequency AC power. As a result, the discharge lamp 18 is started and lit. Further, a voltage having a waveform similar to that shown in FIG. 2a appears between the collectors and emitters of transistors 14 and 15. On the other hand, feedback winding 1
The same waveform as the voltage across the resonant capacitor 21 appears at 7c, and depending on the polarity of this voltage, it is determined whether the current flowing through the bias resistors 19 and 20 is sent to the base of the transistor 14 or the transistor 15. 15 is turned on and off in accordance with resonance. The voltage between the collectors and emitters of the transistors 14 and 15, which are turned off, rises and falls as they resonate (see Figure 2a), and at time A.
However, since the transistors 14 and 15 cannot block the voltage in the opposite direction, they turn on in the opposite direction after time A, and the collector current -I CP flows in the opposite direction (Fig. 2b). ), the transistors 14 and 15 are turned on correspondingly.
A collector current ICP flows through. The base current I B2 and base current I B3 (see Figure 3) flow due to the collector current in the reverse direction - I CP , and the transistors 14 and 15, which were turned off, are rapidly turned off by the reverse direction base current and are turned off. As a result, the collector currents -I CP and I CP disappear, and after that the feedback winding 17
The transistors 14 and 15, which had been off, are turned on depending on the polarity of the voltage generated at c. At this point, the voltage across the capacitor 21 is small;
Therefore, the voltage of the feedback winding 17c is also low, so if the diodes 22, 23, capacitors 24, 25, and resistors 26, 27 are not provided, the inductance of the feedback winding 17c and the base voltage of the transistors 14, 15 are reduced.
The capacitance between the emitters may cause resonance, and an undesirable bias voltage V BET may be generated as shown by the dotted line in FIG. 6, which shows the voltage waveform between the base and the emitters. Because of the resistors 26 and 27, the opposite base-emitter voltage V BEP generated when the transistors 14 and 15 are turned on in the opposite direction causes the base current I B2 to connect the capacitors 24 and 25 to the emitters via the diodes 22 and 23. The base current I B2 and the base current I
After B3 disappears, a unidirectional voltage is applied to the base for a certain period of time via resistors 26 and 27, and even if the above-mentioned vibration occurs, the voltage between the base and emitter is 0.6V.
Therefore, as shown by the solid line in FIG. 6, an undesired bias voltage V BET is no longer generated.

本発明によれば、一対のトランジスタのベー
ス・エミツタ間に、そこに発生する逆電圧に対し
て順方向になるダイオードとコンデンサとの直列
回路を接続すると共に、そのダイオードに抵抗を
並列接続しているので、逆電流が流れ終わつたあ
とも逆バイアスを続けるようになり、トランジス
タが逆方向にオンした時に生じるベース・エミツ
タ間電圧によりダイオードを介してコンデンサを
充電し、抵抗を介してベースへ一定時間電圧を印
加するため、トランジスタを不所望にバイアスす
ることを確実に防止できる。従つてスイツチング
時における電力損を極力軽減でき、トランジスタ
が異常発熱したり、破壊されたりすることが全く
なくなる。しかも、構成簡単にして製造容易であ
りかつ安価に提供できる。
According to the present invention, a series circuit of a diode and a capacitor is connected between the base and emitter of a pair of transistors, and a resistor is connected in parallel to the diode, which has a forward direction with respect to the reverse voltage generated therein. Therefore, even after the reverse current has finished flowing, the reverse bias continues, and the voltage between the base and emitter that occurs when the transistor is turned on in the reverse direction charges the capacitor via the diode, and a constant voltage is transferred to the base via the resistor. Since the voltage is applied over time, undesired biasing of the transistor can be reliably prevented. Therefore, power loss during switching can be reduced as much as possible, and abnormal heat generation or destruction of the transistor is completely eliminated. Furthermore, the structure is simple, easy to manufacture, and can be provided at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示す回路図、第2図は動作説
明用の波形図、第3図及び第4図は夫々動作説明
用の回路図、第5図は本発明の一実施例を示す回
路図、第6図は動作説明用の波形図である。 11……直流電源、14,15……トランジス
タ、17……トランス、17a……入力巻線、1
7b……出力巻線、17c……帰還巻線、22,
23……ダイオード、24,25……コンデン
サ、26,27……抵抗。
Fig. 1 is a circuit diagram showing a conventional example, Fig. 2 is a waveform diagram for explaining operation, Figs. 3 and 4 are circuit diagrams for explaining operation, respectively, and Fig. 5 shows an embodiment of the present invention. The circuit diagram and FIG. 6 are waveform diagrams for explaining the operation. 11...DC power supply, 14, 15...Transistor, 17...Transformer, 17a...Input winding, 1
7b...Output winding, 17c...Feedback winding, 22,
23...diode, 24, 25... capacitor, 26, 27... resistor.

Claims (1)

【特許請求の範囲】[Claims] 1 直流電源11の一端に接続された一対のトラ
ンジスタ14,15と、トランス17とを備え、
前記直流電源11の他端に、トランス17の入力
巻線17aのセンタータツプを接続し、該入力巻
線17aの両端に、前記一対のトランジスタ1
4,15をプツシユプルに接続し、入力巻線17
aに共振コンデンサ21を並列接続し、前記トラ
ンジスタ14,15の各ベースを、夫々バイアス
抵抗19,20を介して入力巻線17aのセンタ
ータツプに接続すると共に、トランス17の帰還
巻線17cの両端に夫々接続し、該帰還巻線17
cにより一対のトランジスタ14,15を交互に
導通するように制御して、トランス17の入力巻
線17a側の直流電源11を出力巻線17b側に
交流電圧として供給するようにしたトランジスタ
インバータにおいて、前記各トランジスタ14,
15のベース・エミツタ間に、そこに発生する逆
電圧に対して順方向になるダイオード22,23
とコンデンサ24,25との直列回路を接続する
と共に、そのダイオード22,23に抵抗26,
27を並列接続したことを特徴とするトランジス
タインバータ。
1 comprises a pair of transistors 14 and 15 connected to one end of a DC power supply 11 and a transformer 17,
The center tap of the input winding 17a of the transformer 17 is connected to the other end of the DC power supply 11, and the pair of transistors 1 are connected to both ends of the input winding 17a.
4 and 15 to the push pull, and the input winding 17
A resonant capacitor 21 is connected in parallel to a, the bases of the transistors 14 and 15 are connected to the center tap of the input winding 17a via bias resistors 19 and 20, respectively, and the center tap of the feedback winding 17c of the transformer 17 is The feedback winding 17 is connected to both ends of the feedback winding 17.
In the transistor inverter, the pair of transistors 14 and 15 are controlled to be alternately conductive by c, so that the DC power supply 11 on the input winding 17a side of the transformer 17 is supplied as an AC voltage to the output winding 17b side. Each of the transistors 14,
Between the base and emitter of 15, there are diodes 22 and 23 that act in a forward direction with respect to the reverse voltage generated there.
A series circuit of capacitors 24 and 25 is connected to the diodes 22 and 23, and resistors 26 and 25 are connected to each other.
A transistor inverter characterized in that 27 transistors are connected in parallel.
JP56017638A 1981-02-07 1981-02-07 Transistor inverter Granted JPS57132776A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56017638A JPS57132776A (en) 1981-02-07 1981-02-07 Transistor inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56017638A JPS57132776A (en) 1981-02-07 1981-02-07 Transistor inverter

Publications (2)

Publication Number Publication Date
JPS57132776A JPS57132776A (en) 1982-08-17
JPS6232712B2 true JPS6232712B2 (en) 1987-07-16

Family

ID=11949402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56017638A Granted JPS57132776A (en) 1981-02-07 1981-02-07 Transistor inverter

Country Status (1)

Country Link
JP (1) JPS57132776A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6158478A (en) * 1984-08-28 1986-03-25 Daiyamondo Denki Kk Power converter
JPS6162368A (en) * 1984-08-31 1986-03-31 Daiyamondo Denki Kk Power converter

Also Published As

Publication number Publication date
JPS57132776A (en) 1982-08-17

Similar Documents

Publication Publication Date Title
US4060752A (en) Discharge lamp auxiliary circuit with dI/dt switching control
US4259614A (en) Electronic ballast-inverter for multiple fluorescent lamps
US4992702A (en) Inverter capable of controlling operating frequency
JPH10162983A (en) Stabilizing circuit for gas discharge lamp
JPS6232712B2 (en)
JP4407003B2 (en) Piezoelectric oscillator
JP2893466B2 (en) Push-pull inverter
JP2740174B2 (en) Inverter device
JP2001326089A (en) Discharge lamp lighting device
JPS6160668B2 (en)
JPS6236982A (en) Apparatus adapted to generate output current by input frequency
JPH0713200Y2 (en) Discharge lamp lighting device
JP2688411B2 (en) Inverter device
JPH0739351Y2 (en) Inverter oscillator
JP2562818B2 (en) Inverter device
JP2003077626A (en) High-frequency power supply device
JPH08149851A (en) Piezoelectric transformer driver
JP2579376B2 (en) Discharge lamp lighting device
JP2731526B2 (en) Inverter device
JPH081834B2 (en) Discharge lamp lighting device
JPH0834699B2 (en) Power supply
JPH0713435Y2 (en) Inverter device
JP2561077Y2 (en) Discharge lamp lighting device
JPH06260292A (en) Driving circuit of bipolar transistor
JPS5842993B2 (en) Deflection yoke arc prevention circuit