JPS6231572B2 - - Google Patents

Info

Publication number
JPS6231572B2
JPS6231572B2 JP56020648A JP2064881A JPS6231572B2 JP S6231572 B2 JPS6231572 B2 JP S6231572B2 JP 56020648 A JP56020648 A JP 56020648A JP 2064881 A JP2064881 A JP 2064881A JP S6231572 B2 JPS6231572 B2 JP S6231572B2
Authority
JP
Japan
Prior art keywords
data
receiver
load
period
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56020648A
Other languages
Japanese (ja)
Other versions
JPS57135639A (en
Inventor
Osamu Tanaka
Hitoshi Fukagawa
Yoshiharu Suzuki
Yoshuki Komoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP56020648A priority Critical patent/JPS57135639A/en
Publication of JPS57135639A publication Critical patent/JPS57135639A/en
Publication of JPS6231572B2 publication Critical patent/JPS6231572B2/ja
Granted legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation

Landscapes

  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Description

【発明の詳細な説明】 本発明は商用電源の電源線を信号線として利用
し、負荷を位相制御する制御データを伝送する電
力線搬送制御方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power line transport control system that uses a power line of a commercial power source as a signal line to transmit control data for controlling the phase of a load.

一般に、この種の電力線搬送制御方式(以下制
御方式と略称する)は商用電源の電源線に送受信
器を接続し、送信器から送信された負荷を位相制
御する制御データを受信器で受信し、受信器に接
続された照明装置のような負荷をこの制御データ
に基いて位相制御するようになつており、負荷の
動作状態を遠隔操作側すなわち送信器側で確認で
きるようにするため、負荷の動作状態を示す動作
確認データを受信器から送信器に返送するように
なつている。
In general, this type of power line carrier control method (hereinafter abbreviated as control method) connects a transceiver to the power line of a commercial power source, and the receiver receives control data for controlling the phase of the load transmitted from the transmitter. The phase of a load such as a lighting device connected to the receiver is controlled based on this control data, and in order to check the operating status of the load on the remote control side, that is, on the transmitter side, the phase of the load is controlled. Operation confirmation data indicating the operating status is sent back from the receiver to the transmitter.

第1図はこの種の制御方式による遠隔制御シス
テムの概略構成図を示すもので、2は制御データ
Cにて搬送高周波を振巾変調した伝送信号VS
送信する送信器、3は商用電源ACの電源線1
a,1bを介して伝送される伝送信号VSを受信
して制御データDCを再生し、制御データDCに基
いて負荷制御用スイツチング素子すなわちトライ
アツクのような負荷制御用サイリスタ4のオン期
間θを制御し、負荷5を位相制御するようにな
つている。
Figure 1 shows a schematic configuration diagram of a remote control system using this type of control method, in which 2 is a transmitter that transmits a transmission signal V S whose carrier high frequency is amplitude-modulated using control data D C , and 3 is a commercial Power supply AC power line 1
A and 1b receive the transmission signal V S transmitted through the terminals a and 1b to reproduce the control data D C , and based on the control data D C , the ON period of the load control switching element, that is, the load control thyristor 4 such as a triac is determined. θ 2 is controlled, and the phase of the load 5 is controlled.

第2図aは伝送信号VSの一例を示すもので、
伝送信号VSは受信器3を作動状態にする1ビツ
トのスタートデータDSと、電源線1a,1bに
接続されている複数個の受信器3のうちから特定
の受信器3をアクセスする4ビツトのチヤンネル
データDAと、負荷5を位相制御する4ビツトの
制御データDCにて構成され、各データDS,D
A,DCの各ビツトは第3図に示すように4個のサ
ブビツトS1〜S4にて構成される。各サブビツトS1
〜S9は商用電源ACの半サイクルHを4分割した
伝送区間Ha〜Hdにそれぞれ伝送され、データD
S,DA,DCの各ビツトは商用電源ACの各半サイ
クルHに対応して伝送される。実施例にあつて
は、サブビツトS1〜S4は搬送高周波Fが存在する
場合を「1」、存在しない場合を「0」と定義
し、スタートデータDSのサブビツト構成は
「0101」、チヤンネルデータDAおよび制御データ
Cにおけるビツト値「1」のサブビツト構成を
「0111」、ビツト値「0」のサブビツト構成を
「0100」と定義しており、第3図はスタートデー
タDSおよびチヤンネルデータDAの要部の伝送状
態を示している。
Figure 2a shows an example of the transmission signal V S ,
The transmission signal V S includes 1-bit start data D S that puts the receiver 3 into operation, and 4 that accesses a specific receiver 3 from among the plurality of receivers 3 connected to the power lines 1a and 1b. It is composed of bit channel data D A and 4 bit control data D C for controlling the phase of the load 5, and each data D S , D
Each bit of A and D C is composed of four sub-bits S 1 to S 4 as shown in FIG. Each sub bit S 1
~ S9 is transmitted to the transmission sections Ha~Hd, which are divided into four, by dividing the half cycle H of the commercial power supply AC, and the data D
Each bit of S , D A and D C is transmitted corresponding to each half cycle H of the commercial power supply AC. In the embodiment, sub-bits S 1 to S 4 are defined as "1" when the carrier high frequency F is present and "0" when it is not present, and the sub-bit configuration of the start data D S is "0101" and the channel The sub-bit configuration of bit value ``1'' in data D A and control data D C is defined as ``0111'', and the sub-bit configuration of bit value ``0'' is defined as ``0100''. Figure 3 shows the start data DS and channel. It shows the transmission status of the main part of data D A.

第2図bは返送信号VBを示すもので、この返
送信号VBは受信器3で受信された制御データDC
に基いて形成される4ビツトの動作確認データD
Oにて搬送高周波Fを変調したもので、返送信号
Bは伝送信号VSを受信した直後に受信器3から
送信器2に向つて送信される。この返送信号VB
の伝送状態は第3図に示す伝送信号VSの伝送状
態と同様であり、動作確認データDOの各ビツト
はそれぞれ4個のサブビツトS1〜S4で構成され
る。
FIG. 2b shows the return signal V B which is the control data D C received by the receiver 3.
4-bit operation confirmation data D formed based on
The return signal V B is a signal obtained by modulating the carrier high frequency F at O , and is transmitted from the receiver 3 to the transmitter 2 immediately after receiving the transmission signal V S . This return signal V B
The transmission state is similar to that of the transmission signal V S shown in FIG. 3, and each bit of the operation check data D O is composed of four sub-bits S 1 to S 4 .

ところで、このような遠隔制御システムにおい
て、受信器3および負荷5を電源線1a,1bに
接続する際の配線を簡略化するために、受信器3
と負荷5との直列回路を電源線1a,1b間に並
列接続し、負荷制御用サイリスタ4の両端電圧を
整流平滑した直流電圧にて受信器3に給電するこ
とにより、受信器3の給電線を省略していわゆる
2線式としたものがあつた。この場合、サイリス
タ4のオン期間θには負荷5に商用電源AC電
圧が印加され、第4図aに斜線で示すような電流
i5が負荷5に流れて負荷5に電力を供給する一
方、サイリスタ4のオフ期間θには受信器3の
電源部に商用電源AC電圧が印加され、第4図b
に斜線で示すような電流i3が流れて受信器3に電
力を供給する。このとき、サイリスタ4のオン期
間θが長くなるにつれて受信器3に給電される
電力は少くなる。したがつて、サイリスタ4のオ
ン期間θが長くなつたとき、例えば負荷5が照
明装置であれば、フル点灯するように制御された
とき、受信器3に給電される電力が大巾に少なく
なり、受信器3から動作確認データDOを伝送す
る返送信号VBの返送時において受信器3に必要
電力が供給されず、動作確認データDOが正常に
返送できなくなるという欠点があつた。すなわ
ち、受信器3に供給される電力が不足すると、受
信器3から送信される返送信号VBの電圧レベル
が低くなり、電源線1a,1b間のインピーダン
スが小さい場合には、返送信号VBの減衰が大き
くなつて、送信器2で返送信号VBが受信できな
くなるという欠点があつた。本発明は上記欠点を
解決することを目的とするものである。
By the way, in such a remote control system, in order to simplify the wiring when connecting the receiver 3 and the load 5 to the power supply lines 1a and 1b, the receiver 3 is
By connecting a series circuit with the load 5 in parallel between the power lines 1a and 1b, and supplying power to the receiver 3 with a DC voltage obtained by rectifying and smoothing the voltage across the load control thyristor 4, the power supply line of the receiver 3 is There were some that omitted the ``2-wire'' type. In this case, during the ON period θ 2 of the thyristor 4, the commercial power AC voltage is applied to the load 5, and the current as shown by diagonal lines in FIG.
i 5 flows to the load 5 to supply power to the load 5, while the commercial power AC voltage is applied to the power supply section of the receiver 3 during the off period θ 1 of the thyristor 4, as shown in Fig. 4b.
A current i 3 as shown by diagonal lines flows to supply power to the receiver 3. At this time, as the on period θ 2 of the thyristor 4 becomes longer, the power supplied to the receiver 3 decreases. Therefore, when the on period θ 2 of the thyristor 4 becomes longer, for example, if the load 5 is a lighting device, when the load 5 is controlled to be fully lit, the power supplied to the receiver 3 is significantly reduced. Therefore, when the return signal V B for transmitting the operation check data D O is returned from the receiver 3, the necessary power is not supplied to the receiver 3, and the operation check data D O cannot be returned normally. That is, when the power supplied to the receiver 3 is insufficient, the voltage level of the return signal V B transmitted from the receiver 3 becomes low, and when the impedance between the power lines 1a and 1b is small, the return signal V B The disadvantage is that the attenuation of the signal becomes large, making it impossible for the transmitter 2 to receive the return signal VB . The present invention aims to solve the above-mentioned drawbacks.

以下実施例について図を用いて説明する。第5
図は本発明一実施例の基本動作を示す図であり、
前述した従来例と同様の制御方式において、サイ
リスタ5のオン期間θ(交流電源ACの半サイ
クル期間θに対する百分比で示す)が所定値(実
施例の場合は50%)以上になるように制御される
とき、動作確認データDOの返送区間X内の1つ
おきの半サイクルすなわち第1、第3の半サイク
ルH1,H3におけるサイリスタ4のオン期間θ
を制御データDCに関係なく所定値(50%)にす
るようになつており、負荷5に流れる電流i5は第
5図aのようになり、仮に、サイリスタ4のオン
期間θが略100%になるような制御データDC
基いて制御される場合においても、返送区間X内
にサイリスタ4のオン期間θが50%となる半サ
イクルH1,H3が常に存在することになり、受信
器の電源部には第5図bに示すような電流i3が流
れ、主にこれらの半サイクルH1,H3におけるサ
イリスタ4のオフ期間θに商用電源ACを整流
平滑した直流電源が供給され、動作確認データD
Oの返送区間Xにおいて受信器3の必要電力が十
分確保される。したがつて、従来例のように受信
器3に供給される電力が不足して動作確認データ
Oが正常に返送できなくなることがない。この
場合、動作確認データDOの返送区間Xにおい
て、1つおきの半サイクルH2,H4では制御デー
タDCに基いてサイリスタ4のオン期間θが制
御されることになり、負荷5が照明装置の場合に
おけるちらつきを軽減するようになつている。ま
た返送区間Xは通常短かく設定(商用電源ACの
2サイクル程度に設定)されるので、位相制御特
性に与える影響は軽微である。なお、制御データ
Cに関係なくサイリスタ4のオン区間θを所
定値とする商用電源ACの半サイクルの個数は受
信器3の必要電力に応じて設定すれば良く、実施
例に限定されるものではない。
Examples will be described below using figures. Fifth
The figure is a diagram showing the basic operation of an embodiment of the present invention,
In the same control method as the conventional example described above, the on-period θ 2 of the thyristor 5 (expressed as a percentage of the half-cycle period θ of the AC power source) is controlled to be equal to or greater than a predetermined value (50% in the case of the embodiment). When the operation confirmation data D O is returned in the return section X, the ON period θ 2 of the thyristor 4 in every other half cycle, that is, the first and third half cycles H 1 and H 3
is set to a predetermined value (50%) regardless of the control data D C , and the current i 5 flowing through the load 5 is as shown in Fig. 5a, and if the on-period θ 2 of the thyristor 4 is approximately Even when the control is performed based on the control data D C such that it becomes 100%, there are always half cycles H 1 and H 3 in which the on period θ 2 of the thyristor 4 is 50% within the return section X. Therefore, a current i 3 as shown in Fig. 5b flows through the power supply section of the receiver, and the commercial power supply AC is rectified and smoothed mainly during the off period θ 1 of the thyristor 4 in these half cycles H 1 and H 3 . DC power is supplied and operation confirmation data D
In the return section X of O , the necessary power of the receiver 3 is sufficiently secured. Therefore, unlike the conventional example, there is no possibility that the operation check data D O cannot be returned normally due to insufficient power supplied to the receiver 3. In this case, in the return interval X of the operation check data D O , the on period θ 2 of the thyristor 4 is controlled based on the control data D C in every other half cycle H 2 , H 4 , and the load 5 is designed to reduce flicker in the case of lighting devices. Further, since the return section X is usually set short (set to about 2 cycles of commercial power AC), the influence on the phase control characteristics is slight. Incidentally, regardless of the control data D C , the number of half cycles of the commercial power supply AC that makes the ON interval θ 2 of the thyristor 4 a predetermined value may be set according to the required power of the receiver 3, and is limited to the embodiment. It's not a thing.

次に、サイリスタ4のオン期間θが50%以下
となるように制御され、負荷5に第5図cのに示
すような電流i5が流れている場合には、サイリス
タ4のオフ期間θは当然返送区間Xの各半サイ
クルH1,H2において常に50%以上となるので、
受信器3の電源部には第5図dに示すような電流
i3が流れ、受信器3に十分な電力が供給されるこ
とになる。したがつてサイリスタ4のオン期間θ
は常に制御データDCに基いて制御すれば良い
ことになる。
Next, when the on-period θ 2 of the thyristor 4 is controlled to be 50% or less and a current i 5 as shown in FIG. 1 is naturally always 50% or more in each half cycle H 1 and H 2 of the return section X, so
The power supply section of the receiver 3 has a current as shown in Fig. 5d.
i 3 will flow, and sufficient power will be supplied to the receiver 3. Therefore, the on period θ of thyristor 4
2 , it is sufficient to always control based on the control data D.sub.C.

第6図は本発明による制御方式を実現するため
の受信器3の回路構成を示すものである。なお、
送信器2は一般的に用いられているものを用いれ
ば良いので説明は省略する。図中、30は変復調
部であり、変復調部30は電源線1a,1bを介
して伝送されるアナログ信号よりなる伝送信号V
Sを同調増巾した後検波してデジタル信号よりな
るサブビツトデータS1〜S4を出力する復調回路
と、動作確認データDOの各ビツトをサブビツト
データS1〜S4に変換したデータ信号にて搬送高周
波Fを変調した後電力増巾する変調回路とで構成
され、伝送信号VSを受信するとともに返送信号
Bを送信する。31はゼロクロス検出部であ
り、商用電源ACのゼロクロス点に同期した基本
クロツクP0を発生する。32は分割クロツク発生
部であり、商用電源ACの半サイクルHを4分割
する分割クロツクP4を基本クロツクP0に基いて発
生する。受信器3の各回路はこの分割クロツクP4
に従つて動作する。33は受信データ再生部であ
り、複変調部30の復調回路から出力されるサブ
ビツトデータS1〜S4を判別してスタートデータD
Sが検出されたとき、以後のサブビツトデータS1
〜S4をチヤンネルデータDAあるいは制御データ
Sに変換し、チヤンネルデータDAをチヤンネル
判定部34に、制御データDCを制御データ判定
部35に入力する。チヤンネル判定部34ではチ
ヤンネル設定部36に設定されたチヤンネルデー
タDA′と受信されたチヤンネルデータDAとを比
較し、両チヤンネルデータDA′が一致したとき、
制御データ判定部35を動作させる一致信号VA
を出力する。制御データ判定部35では上記一致
信号VAが入力されると、受信データ再生部33
から出力される4ビツトの制御データDCを読み
取つて動作確認データ作成部42、オン期間判別
部37およびトリガパルス設定部38に入力す
る。オン期間判別部37では制御データDCがサ
イリスタ4のオン期間θを50%以上に設定する
ものであるかどうかを判別し、50%以上に設定す
る制御データDCの場合にはトリリガ変更信号VT
を出力する。トリガパルス設定部38にトリガ変
更信号VTが入力されると、動作確認データDO
返送区間Xの第1、第3の半サイクルH1,H3
おけるサイリスタ4のオン期間θを制御データ
Cに関係なく50%に設定するトリガ制御信号が
出力され、トリガパルス発生部38から返送区間
Xの第1、第3の半サイクルH1,H3のみサイリ
スタ4のオン期間θを50%にするとともに他の
半サイクルH2,H4のサイリスタ4のオン期間θ
を制御データDCに基いた値とするようなトリ
ガパルスPTが出力され、トライアツクドライ部
40を介してサイリスタ4のオン期間θは第5
図aに示すように制御される。一方、オン期間判
定部37からトリガ変更信号VTが出力されない
場合には、動作確認データDOの返送区間Xにあ
つてもトリガパルス設定部38から常に制御デー
タDCに基いたトリガ制御信号が出力され、トリ
ガパルス発生部39およびトライアツクドライブ
部40にてサイリスタ4のオン期間θは第5図
cに示すように制御される。14は電源部であ
り、サイリスタ4の両端電圧を整流平滑し、定電
圧化して受信器3の各回路に直流電源を供給す
る。42は動作確認データ作成部であり、制御デ
ータ判別部35から出力される制御データDC
基いて動作確認デーダDOを作成し、動作確認デ
ータDOをサブビツトS1〜S4に変換した返送デー
タDBを出力する。この返送データDBにて変復調
部30で返送信号VBが形成され、電源線1a,
1bに送出される。この返送信号VBは電源線1
a,1bを介して送信器2の受信部で受信され、
動作確認データDOが再生されて受信器3の動作
状態すなわち負荷5の動作状態を送信器2側で監
視するようになつている。
FIG. 6 shows the circuit configuration of the receiver 3 for realizing the control method according to the present invention. In addition,
As the transmitter 2, a commonly used one may be used, so a description thereof will be omitted. In the figure, 30 is a modulation/demodulation section, and the modulation/demodulation section 30 transmits a transmission signal V made of an analog signal transmitted via power lines 1a and 1b.
A demodulation circuit that performs tuning amplification and detection of S and outputs sub-bit data S 1 to S 4 made up of digital signals, and data converted from each bit of the operation check data D O to sub-bit data S 1 to S 4 . It consists of a modulation circuit that modulates the carrier high frequency F with a signal and then amplifies the power, and receives the transmission signal V S and transmits the return signal V B. 31 is a zero-cross detection section, which generates a basic clock P0 synchronized with the zero-cross point of the commercial power supply AC. Reference numeral 32 denotes a divided clock generating section, which generates a divided clock P4, which divides the half cycle H of the commercial power supply AC into four , based on the basic clock P0 . Each circuit of receiver 3 uses this divided clock P4 .
operate according to 33 is a received data reproducing unit, which discriminates sub-bit data S 1 to S 4 output from the demodulation circuit of the demodulation unit 30 and converts it into start data D.
When S is detected, subsequent sub-bit data S 1
~ S4 is converted into channel data D A or control data D S , and the channel data D A is input to the channel determining section 34 and the control data D C is input to the control data determining section 35. The channel determination section 34 compares the channel data DA ' set in the channel setting section 36 with the received channel data DA , and when both channel data DA ' match,
Coincidence signal V A that operates the control data determination unit 35
Output. When the control data determining section 35 receives the coincidence signal V A , the received data reproducing section 33
The 4-bit control data D C outputted from the controller is read and inputted to the operation confirmation data creation section 42, the on-period determination section 37, and the trigger pulse setting section 38. The on-period determination unit 37 determines whether the control data D C sets the on-period θ 2 of the thyristor 4 to 50% or more, and if the control data D C sets the on-period θ 2 of the thyristor 4 to 50% or more, the trigger is changed. Signal V T
Output. When the trigger change signal V T is input to the trigger pulse setting unit 38, the ON period θ 2 of the thyristor 4 in the first and third half cycles H 1 and H 3 of the return section X of the operation check data D O is controlled. A trigger control signal set to 50% is output regardless of the data D C , and the ON period θ 2 of the thyristor 4 is changed only during the first and third half cycles H 1 and H 3 of the return section X from the trigger pulse generator 38. 50% and the on-period θ of thyristor 4 in the other half cycles H 2 and H 4
A trigger pulse P T having a value of 2 based on the control data D C is output, and the on-period θ 2 of the thyristor 4 is changed to the fifth
It is controlled as shown in Figure a. On the other hand, when the trigger change signal V T is not output from the on-period determining section 37, the trigger pulse setting section 38 always sends a trigger control signal based on the control data D C even in the return period X of the operation check data D O. is output, and the on period θ2 of the thyristor 4 is controlled by the trigger pulse generator 39 and the triax drive unit 40 as shown in FIG. 5c. A power supply section 14 rectifies and smoothes the voltage across the thyristor 4 to make it a constant voltage, and supplies DC power to each circuit of the receiver 3. Reference numeral 42 denotes an operation check data creation unit, which creates operation check data D O based on the control data D C output from the control data discrimination unit 35 and converts the operation check data D O into sub-bits S 1 to S 4 . Output the return data D B. A return signal V B is formed by the modulation/demodulation section 30 using this return data D B , and the power supply line 1a,
1b. This return signal V B is the power line 1
a, 1b at the receiving section of the transmitter 2,
The operation confirmation data D O is reproduced to monitor the operating state of the receiver 3, that is, the operating state of the load 5, on the transmitter 2 side.

本発明は上述のように構成されており、負荷の
動作状態を示す動作確認データを受信器から送信
器に返送するようにし、負荷制御用スイツチング
素子の両端電圧を整流平滑した直流電源にて受信
器に給電するようにした電力線搬送制御方式にお
いて、スイツチング素子のオン期間が所定値以上
のとき、動作確認データの返送区間におけるスイ
ツチング素子のオン期間を負荷制御データに関係
なく、上記所定値となるようにしたので、制御デ
ータに基いて制御されるサイリスタのオン期間が
長くなつたとき、すなわち負荷が照明装置の場合
にあつてはフル点灯するように制御されたときに
あつても受信器に供給される電力が極端に小さく
なることがなく、受信器には常に動作確認データ
を正常に返送し得る電力が供給されるという利点
がある。
The present invention is configured as described above, and the operation confirmation data indicating the operating state of the load is sent back from the receiver to the transmitter, and is received by a DC power source in which the voltage across the load control switching element is rectified and smoothed. In a power line transfer control system that supplies power to a device, when the on-period of the switching element is equal to or greater than a predetermined value, the on-period of the switching element in the operation confirmation data return section becomes the predetermined value regardless of the load control data. As a result, even when the on period of the thyristor controlled based on the control data becomes long, that is, when the load is a lighting device, even when the load is controlled to be fully lit, the receiver There is an advantage that the supplied power does not become extremely small, and the receiver is always supplied with enough power to normally return operation confirmation data.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る電力線搬送制御方式の概
略構成図、第2図a,bおよび第3図は同上の動
作説明図、第4図a,bは従来例の問題点を示す
図、第5図a〜dは本発明一実施例の動作説明
図、第6図は同上の動作を実現するための受信器
の回路構成例を示す図である。 1a,1bは電源線、2は送信器、3は受信
器、4はスイツチング素子、5は負荷である。
FIG. 1 is a schematic configuration diagram of a power line transport control system according to the present invention, FIGS. 2a, b, and 3 are explanatory diagrams of the same operation, and FIGS. 4a, b are diagrams showing problems in the conventional example. 5A to 5D are explanatory diagrams of the operation of one embodiment of the present invention, and FIG. 6 is a diagram showing an example of the circuit configuration of a receiver for realizing the same operation. 1a and 1b are power supply lines, 2 is a transmitter, 3 is a receiver, 4 is a switching element, and 5 is a load.

Claims (1)

【特許請求の範囲】 1 商用電源の電源線に送受信器を接続し、商用
電源の各半サイクルに対応させて負荷を位相制御
する制御データの各ビツトを送信器から受信器に
伝送するとともに、負荷の動作状態を示す動作確
認データを受信器から送信器に返送し、負荷制御
用スイツチング素子の両端電圧を整流平滑した直
流電源にて受信器に給電するようにした電力線搬
送制御方式において、スイツチング素子のオン期
間が所定値以上のとき、動作確認データの返送区
間における上記スイツチング素子のオン期間を負
荷制御データに関係なく上記所定値となるように
したことを特徴とする電力線搬送制御方式。 2 商用電源の複数サイクルに亘る動作確認デー
タの返送区間において、適宜個数の半サイクルに
おけるスイツチング素子のオン期間を所定値とな
るようにしたことを特徴とする特許請求の範囲第
1項記載の電力線搬送制御方式。
[Claims] 1. A transmitter/receiver is connected to a power line of a commercial power source, and each bit of control data for controlling the phase of the load is transmitted from the transmitter to the receiver in correspondence with each half cycle of the commercial power source, In the power line carrier control method, operation confirmation data indicating the operating status of the load is sent back from the receiver to the transmitter, and the receiver is supplied with power using a DC power supply that has rectified and smoothed the voltage across the switching element for load control. A power line transfer control system characterized in that when the on-period of the element is equal to or greater than a predetermined value, the on-period of the switching element in the return section of operation confirmation data is set to the predetermined value regardless of load control data. 2. The power line according to claim 1, characterized in that the on-period of an appropriate number of half-cycles of the switching elements is set to a predetermined value in the return section of the operation check data over multiple cycles of the commercial power supply. Conveyance control method.
JP56020648A 1981-02-14 1981-02-14 Power line carrier control system Granted JPS57135639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56020648A JPS57135639A (en) 1981-02-14 1981-02-14 Power line carrier control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56020648A JPS57135639A (en) 1981-02-14 1981-02-14 Power line carrier control system

Publications (2)

Publication Number Publication Date
JPS57135639A JPS57135639A (en) 1982-08-21
JPS6231572B2 true JPS6231572B2 (en) 1987-07-09

Family

ID=12033037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56020648A Granted JPS57135639A (en) 1981-02-14 1981-02-14 Power line carrier control system

Country Status (1)

Country Link
JP (1) JPS57135639A (en)

Also Published As

Publication number Publication date
JPS57135639A (en) 1982-08-21

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