JPS6229960B2 - - Google Patents

Info

Publication number
JPS6229960B2
JPS6229960B2 JP10391082A JP10391082A JPS6229960B2 JP S6229960 B2 JPS6229960 B2 JP S6229960B2 JP 10391082 A JP10391082 A JP 10391082A JP 10391082 A JP10391082 A JP 10391082A JP S6229960 B2 JPS6229960 B2 JP S6229960B2
Authority
JP
Japan
Prior art keywords
optical
signal
electrical
input
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10391082A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58221589A (ja
Inventor
Yasunobu Suzuki
Kazuhiro Hiraide
Haruo Akimaru
Yoshiaki Tadokoro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP10391082A priority Critical patent/JPS58221589A/ja
Publication of JPS58221589A publication Critical patent/JPS58221589A/ja
Publication of JPS6229960B2 publication Critical patent/JPS6229960B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/526—Optical switching systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
JP10391082A 1982-06-18 1982-06-18 光を用いた交換通話路方式 Granted JPS58221589A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10391082A JPS58221589A (ja) 1982-06-18 1982-06-18 光を用いた交換通話路方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10391082A JPS58221589A (ja) 1982-06-18 1982-06-18 光を用いた交換通話路方式

Publications (2)

Publication Number Publication Date
JPS58221589A JPS58221589A (ja) 1983-12-23
JPS6229960B2 true JPS6229960B2 (enrdf_load_stackoverflow) 1987-06-29

Family

ID=14366575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10391082A Granted JPS58221589A (ja) 1982-06-18 1982-06-18 光を用いた交換通話路方式

Country Status (1)

Country Link
JP (1) JPS58221589A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62123457U (enrdf_load_stackoverflow) * 1986-01-30 1987-08-05

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62123457U (enrdf_load_stackoverflow) * 1986-01-30 1987-08-05

Also Published As

Publication number Publication date
JPS58221589A (ja) 1983-12-23

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