JPS62298790A - Timepiece display unit - Google Patents

Abstract

PURPOSE:To prevent deviation in the time display in the combined use of apparatuses having individual timepiece functions, by transmitting a time data from one apparatus while the other is not allowed to use data of own timepiece circuit. CONSTITUTION:Apparatuses having individual timepiece functions, for example, TV 1 and VTR 16 are used in combination. When the VTR 16 discriminates 18 the presence of a first time data from a timepiece 3 of the TV 1, an SW 20 is connected to a constant 20a to display the first time data on a monitor 21. When a power failure occurs in the TV 1 and VTR 16, timepieces 3 and 19 are operating as it is within a power failure compensation period and the first time data continues to be inputted into the VTR 16 but displays 12 and 21 go off. As the power failure is recovered, the first time data is displayed on the monitor 21. When there is a difference in the power failure compensation period between the TV 1 and VTR 16 - that of the former is shorter than the latter, the timepiece 19 of the VTR 16 is selected with the SW 20 at a certain point during the compensation period. This prevents deviation in the time display thereby prolonging the power failure compensation period.

Description

[Detailed Description of the Invention] 8. Detailed Description of the Invention (a) Industrial Application Field The present invention is applicable to devices having a clock function, such as a video tape recorder (VTR) and a television receiver (TV). The present invention relates to a clock display device in which display contents can be changed when used together with a clock display device.

(B) Prior Art A normal VTR has a built-in clock function for scheduled recording, and the time is always displayed on the front panel display. However, in the event of a power outage, the clock display is turned off and only the clock is counted using a backup battery, so the clock will not go awry even if the power is out for several minutes to tens of minutes. By the way, as TVs have become more value-added, the magazine "TV Technology #8"
As disclosed in pages 23 and 24 of the December 2004 issue, products with a built-in clock function are being praised. TV and V like this
When using in combination with TR, as shown in Figure 4,
II) and the VTR) are connected by a video signal cable and an audio signal cable □□□, and the video and audio signals reproduced by the VTR are displayed on the TV.

(c) Problems to be Solved by the Invention As mentioned above, when a TV with a clock function and a VTR are used in combination, separate clock circuits will work for both the TV and V'I'H at the same time. As shown in Figure 4, the clock displays on the two devices do not necessarily match, and the user feels uncomfortable. Furthermore, since the backup time differs depending on the device during a power outage, there is a problem that the clock may continue to operate normally due to a power outage, or may go awry and the clock display operations of each device may not match.

(b) Means for solving the problem When using a combination of devices that each have a clock function, while one device is emitting time data, the other device is not receiving data from its own clock circuit. Instead, displaying the time using the time data is considered to be a method of displaying the time.

(E) Operation Since the configuration is as described above, the date and time display σ' of each device is consistent, and even in the event of a power outage, the clock operations of each device are consistent.

(f) Example An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit block diagram of the device of this embodiment.

The VTIR body (1) includes a clock circuit (3) that is constantly driven by a power supply circuit (2), a reservation operation means (4) for inputting recording reservation information, and a memory (5) for storing recording reservation information.
, the comparison circuit (131) compares the first time data indicating the actual time from the clock circuit (31) and the recording reservation information in the memory (5) to detect the arrival of the reserved time, and sends it to the channel selection circuit (6). The video signal of a predetermined broadcast channel is controlled by the tuning voltage generated from the reservation execution circuit (81) which supplies channel selection information and recording information to the system control circuit (7), and the tuning circuit (6) which inputs the channel selection information. Tuner to derive (9)
, a recording circuit αα that records a video signal by inputting the recording command output derived from the system controller circuit (7) that inputs recording information, and a reproducing circuit (1) that reproduces the video signal.
, a display circuit α2 that displays first time data and recording reservation information, and a power switch that controls the supply of power supply voltage to each circuit other than the clock circuit (3) and the display circuit (13). The M1 time data from the clock circuit (3) is output to the terminal (141), and the reproduction circuit (
1) The video and audio signals reproduced in step 1 are output.

The TV main unit a61 includes an input data determination circuit that determines the presence or absence of time data input from a terminal (171) and a TV
The first
A clock circuit (clock means) (1!J) that outputs second time data that is real time independent of the time data, and a fixed contact (1!J) that is switched by the input data discrimination circuit (18+ output).
20a) receives time data from the outside, and the fixed contact (20b)
), and a switch circuit (selection means) in which the movable contact piece (20o) is connected to a monitor L21), and a monitor (display means) T21 that displays the time data output from the switch circuit ■. ) and the tuning circuit t22
A tuner for deriving a video signal of a predetermined broadcast channel by means of a tuning voltage generated by the tuner is arranged. The reproduced video signal input to the terminal Q41 is displayed on the tuner (monitor Q1 as well as the 231 output).

Incidentally, on the monitor (21), time data is displayed on-screen on a screen formed by the output of the tuner 31 and the reproduced video signal. In addition, the terminals e141) and 151 can be connected to the terminals (19C4 and 19C4) respectively using cables cID.Furthermore, although only video signals are explained in this example, audio signals can also be connected to normal VTRs in the same way as video signals.
The signal is processed as follows.

FIG. 2 shows a state in which the VTR (1) and 'I' 161 are connected by a time data cable (to), a video signal cable CIL+, and an audio signal cable (9). When the terminals α41 (171) are connected by the cable ■ as shown in FIG. The movable contact piece (20o) is switched to the fixed contact (20a) side, the first time data is input to the monitor (21), and the first time data is inputted to the monitor (21) at a predetermined position on the screen formed by the output of the tuner or the reproduced video signal. A time display corresponding to the time data is displayed on the screen.

To explain the case where both VTR1l+ and 'rVαD are in a power outage state, if the power outage is within the power outage compensation period, the display circuit (no display is shown on 12/monitor ELL, but the clock circuit (3) α) is operating. So, the first time data is T
It continues to be input to Vαθ. Therefore, after the power outage is lifted, monitor c! 1), first time data is displayed.

If the power outage compensation period is exceeded, the clock circuit (3) α will not operate normally, and after the power outage is lifted, 00200 will be displayed blinking on the monitor 121), indicating that there is a power outage and the clock circuit (3) α
Indicates that a preset is required. If there is a difference in the power outage compensation period between the VTR and TV, for example,
If the VTR is shorter than the TV, the second time data is selected by the switch circuit (2) after the VTR compensation period ends, and if it is longer, the first time data continues to be selected. In other words, the time display device does not function properly during the power outage compensation period.
It will be set on the longer side of V.

The cable (to) is removed. That is, the terminal (141(1
71 is not connected, the first time data is not input to the input data discrimination circuit a8, and it is determined that there is no data, and the movable contact piece (20c) is connected to the fixed contact (20
The second time data is input to the monitor CD and displayed.

Figure 6 is a flowchart showing the circuit operation described above. In this flowchart, the "power outage display" in block (a) is a flashing of n0 on the TV wholesaler's monitor level υ after the power outage ends. Indicates that a display is to be made.

In the device of this embodiment, the input discrimination of the first time data due to the attachment and detachment of the cable circle is electrically performed in the input data discrimination circuit, but it is possible to mechanically discriminate. Needless to say.

(G1) Effects of the Invention As described above, according to the present invention, when devices each having a clock function are used in combination, it is possible to eliminate the discrepancy in the clock display between each device, and to adjust the power outage compensation period within each device. Since it can be adjusted to the longest duration, it is possible to create a device with a long power outage compensation of 5A.

[Brief explanation of the drawing]

1 to 3 relate to an embodiment of the present invention, FIG. 1 is a circuit block diagram, FIG. 2 is a state explanatory diagram, FIG. 3 is a flowchart, and FIG. 4 is a state explanatory diagram of a conventional example. It is. +1) -V'rR, (161・TV, αto...(input) data discrimination means, (1(J...clock circuit (clock means), ■...switch circuit (selection means),

Claims (1)

[Claims] (1) data discrimination means for discriminating the presence or absence of first time data inputted from the outside; clock means for emitting second time data independent of the first time data; and a clock means for emitting second time data independent of the first time data; A clock display device comprising: a selection means that selects the first time data when it is determined that the data is present, and selects the second time data when it is determined that there is no data; and a display means that displays the output of the selection means.