JPS6229315A - Switch circuit - Google Patents

Switch circuit

Info

Publication number
JPS6229315A
JPS6229315A JP16887885A JP16887885A JPS6229315A JP S6229315 A JPS6229315 A JP S6229315A JP 16887885 A JP16887885 A JP 16887885A JP 16887885 A JP16887885 A JP 16887885A JP S6229315 A JPS6229315 A JP S6229315A
Authority
JP
Japan
Prior art keywords
connected
stage
end
resistive impedance
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16887885A
Inventor
Teruo Inuzuka
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP16887885A priority Critical patent/JPS6229315A/en
Publication of JPS6229315A publication Critical patent/JPS6229315A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To reduce the DC on-resistance by providing a CMOS inverter inputting a logic signal to the pre-stage and a resistive impedance whose one end is connected to the output of the post-stage of the CMOS inverter and whose other end is connected to an output terminal.
CONSTITUTION: Both positive and negative power terminals of CMOS inverters connected in ascade are connected to different stabilized reference power supplies VREF1∼VREF4, a logic signal L is inputted to the pre-stage and one end of a resistive impedance Z is connected to the output of the post-stage and a signal V0 is outputted from the other terminal of the resistive impedance Z. At least one of positive and negative terminals of the CMOS inverters is connected to a different stabilized power supply. Thus, a switch circuit having a sufficiently small DC on-resistance while having a minimum operating power voltage the same degree as that of a conventional circuit and transistors with a realistic size is obtained.
COPYRIGHT: (C)1987,JPO&Japio
JP16887885A 1985-07-31 1985-07-31 Switch circuit Pending JPS6229315A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16887885A JPS6229315A (en) 1985-07-31 1985-07-31 Switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16887885A JPS6229315A (en) 1985-07-31 1985-07-31 Switch circuit

Publications (1)

Publication Number Publication Date
JPS6229315A true JPS6229315A (en) 1987-02-07

Family

ID=15876234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16887885A Pending JPS6229315A (en) 1985-07-31 1985-07-31 Switch circuit

Country Status (1)

Country Link
JP (1) JPS6229315A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6107857A (en) * 1995-09-05 2000-08-22 Sharp Kabushiki Kaisha Level converting circuit
US6225866B1 (en) 1994-05-31 2001-05-01 Sharp Kabushiki Kaisha Series connected multi-stage linear FET amplifier circuit
KR100730015B1 (en) 2005-01-24 2007-06-20 후지쯔 가부시끼가이샤 Buffer circuit and integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6225866B1 (en) 1994-05-31 2001-05-01 Sharp Kabushiki Kaisha Series connected multi-stage linear FET amplifier circuit
US6107857A (en) * 1995-09-05 2000-08-22 Sharp Kabushiki Kaisha Level converting circuit
KR100730015B1 (en) 2005-01-24 2007-06-20 후지쯔 가부시끼가이샤 Buffer circuit and integrated circuit

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