JPS62285086A - Sonar signal time passage display unit - Google Patents

Abstract

PURPOSE:To facilitate the recognition of information on school of fish, by displaying detection information at a desired depth in a sonar signal with time with the newest one first. CONSTITUTION:An incoming reflected wave from all circumferential directions being transmitted from a transmitter/receiver 7 is converted 9 to digital from analog through the transmitter/receiver 7 and a receiving wave beam formation circuit 8 and supplied to a buffer memory 10. A signal read out of the memory 10 is stored into a display memory 18 having memory capacity of one screen. The memory contents of the memory 18 are read out or displayed based on a clock pulse generated 2. A reading address generation circuit 27 outputs (x) and (y) values for raster scanning each time clock pulse is fed, the (y) address is converted with a substraction circuit 28 to be fed into a memory 18. As a result, addressing is made back sequentially to older signals stored starting at the address in Y axis where the newest signal is stored. The signal thus read out is fed to a display 29 and displayed 29 with time by a raster scan signal formed with a deflection circuit 30 synchronized with the address being read out.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention ゛ □ (Industrial Application Field) The present invention relates to an underwater detection sonar that detects a wide range of directions, and in particular, detects a signal of a specific distance and direction from a detection signal. This invention relates to a device that extracts and displays this over time.

(Prior art) Types of underwater detection sonar include those that detect the whole circumference in a predetermined tilt direction in an umbrella shape, those that detect in a fan shape at a predetermined angle, and those that transmit a pencil beam in a predetermined direction. These detection signals are generally displayed using the PPI method because of the ease of direction recognition.

On the other hand, in view of the fact that displaying continuously obtained detection signals over time makes it easier to recognize schools of fish and the state of the seabed, we have developed Techniques are known in which the lack of functions of the PPI method due to instantaneous display is compensated for by time-lapse display, by simultaneously displaying a time-varying display (Japanese Patent Publication No. 5B-48071, JP-A No. 58-140859, JP-A No. 80-80). -11185)
.

(Problems to be Solved by the Invention) The above-mentioned method displays a vertical signal over time, such as simply extracting a signal in a specific direction within a detection signal, but it is an underwater detection method that enables wide-range detection. It is difficult to say that sonar signals are effectively utilized in the azimuth direction.

(Means for Solving the Problems) The present invention has been made in view of the above-mentioned problems, and includes means for extracting and capturing detection signals at a specific distance for the first half of the entire circumference umbrella-shaped detection signals.

and a memory for sequentially storing the extracted signal in a chronological direction each time it is received.

The present invention provides an underwater detection display device including display means for sequentially reading out the contents of the memory starting from the latest stored signal and repeatedly displaying the contents.

(Function) According to the present invention, since a semicircular signal is sequentially captured and stored each time it is received, a planar signal at a constant depth can be obtained.

(Example) FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a diagram for explaining detection signals extracted and captured in one reception.

FIG. 3 is a diagram for explaining the states of signals stored in the display memory.

FIG. 4 is a diagram for explaining the relationship between input value sentences and output values X and Y.

In FIG. 1, l is a pulse train of a constant period that is sent to a control circuit 2.
This is a clock pulse generation circuit that sends out a clock pulse to the azimuth counter 3 via the azimuth counter 3.

The azimuth counter 3 counts this manual pulse to 1 to 2 L, and supplies the count value corresponding to the azimuth to a receiving beam forming circuit 8 and a minus number circuit 11, which will be described later. Further, this azimuth counter 3 sends a round pulse to the distance counter 4 every time it completes counting up to 2L corresponding to one round. distance counter 4
counts the circulating pulses and supplies the count value corresponding to the unit distance to the receiving beam forming circuit 8 and the minus number circuit 12.

Further, this distance counter 4 sends a key pulse to the transmission trigger generation circuit 5 every time it completes counting corresponding to the detection range range.

The transmission trigger generation circuit 5 supplies a transmission trigger pulse of a predetermined width formed based on the key pulse to the transmission beam forming circuit 6. The transmission beam forming circuit 6 is composed of a large number of delay circuits whose delay amount is changed according to a setting tilt (not shown), and the input transmission trigger pulse passes through each delay circuit, and the corresponding response of the transducer 7 is determined. It is designed to be supplied to the vibrator. As is well known, the transducer 7 has a large number of vibrators arranged at equal intervals in the vertical and horizontal directions on the side surface of one cylinder. As a result, ultrasonic pulses are transmitted all around the entire circumference and in the set tilt direction at once.

Return reflected waves from all directions are received by the transducer 7 and sent to the receiving beam forming circuit 8. The reception beam forming circuit 8 is composed of, for example, a large number of delay circuits, and performs phase synthesis of the reception signals based on the count value from the azimuth counter 3, the count value from the distance counter 4, and a predetermined tilt signal from the control circuit 2. Then, received beams are sequentially formed in a predetermined direction in a predetermined order at high speed. This beam forming by the receiving beam forming circuit 8 is performed repeatedly until the output value of the distance counter 4 increases by 1 in response to the previous cycle pulse from the azimuth counter 3 and reaches the detection range range. Therefore, reflected signals from targets existing on substantially concentric circles at equal intervals are received in time series. 9 sequentially transmits the received time-series signals A-
The output signal of an A-D converter circuit that performs D conversion is supplied to a buffer memory 10 formed of, for example, a shift register (or RAM). Note that the path indicated by the dotted line indicates that it is also possible to lead the received signal to the means for displaying the PPI, for example.

Of the received signals, only those within a predetermined period of time are selectively taken into the buffer memory 10 in the following manner.

11 is H while the output value from the azimuth counter 3 matches the value corresponding to, for example, 270 to 380 degrees, 0 to 80 degrees, that is, the first half of the circumference (see the shaded area in Figure 2) when the bow direction is 0 degrees. In the coincidence circuit that sends out the level, the above angle value is set in advance by the control circuit 2.

Reference numeral 12 denotes a matching circuit that sends out an H level while the output value from the distance counter matches a value corresponding to a predetermined distance and distance width, and the operator can input desired values for the distance and distance width;
It is set from the control circuit 2 to the matching circuit 12. Note that the distance corresponds to the number of circulating pulses from transmission, and the distance width is set according to the period of the number of circulating pulses from the said circulating pulse, for example, the period of one circulating pulse. can be expressed.

13 is an AND circuit; 14 is a gate that is rendered conductive while the AND circuit 13 sends out an H level; during this time, L clock pulses supplied via the control circuit 2 are sent to the buffer memory 1G;

The buffer memory IO has a storage capacity corresponding to the received signal in the first half of one cycle pulse period.

By sending clock pulses corresponding to the first half of the cycle from the gate 14, received signals of a set distance are sequentially taken in. The acquisition operation is then repeated for (k-1) circulating pulse periods. Therefore, these two received signals are integrated by the adder circuit 15 and stored in the buffer memory 10. At the time of reading, the multiplication circuit 1B multiplies the signals by llk, averages them, and sends out one read signal. In this way, immediately after the control circuit 2 finishes taking in the signal for one time into the buffer memory 1O, it sends out L clock pulses for one time of reading and supplies them to the buffer memory 10. With this clock pulse for reading, the signal read out from the buffer memory 10 is transmitted via the switch 17 to a display having a storage capacity for one screen (as shown in FIG. 3, n addresses in the Y-axis direction). It is stored in the memory 18.

The write address for the display memory 18 is determined by the write address generation circuit 1.
It is formed based on the output value from 9. The write address generation circuit 19 is connected to an L for reading the contents of the buffer memory 10.
This is a ROM or the like in which an address is designated by the output count value of a counter 20 that counts 1 clock pulses, and the contents of the address are read out. Each address 1.2,... sentence...
In L, the sine and cosine values X and Y corresponding to each orientation determined from the geometric diagram in Figure 4 are written in the form of integers.6For example, when L/2, X= m, Y=m. In this way, x and Y values are sent out for each reading.

Further, the control circuit 2 sends out a numerical value i that increases by l until l w n each time the wave is transmitted, and supplies it to the adder circuit 22 via the switch 21 . The adder circuit 22 has a configuration with a counting capacity n, and outputs n+i as i, for example. The output value of the adder circuit 22 becomes Y+i, and the write addresses X and Y+i are sent to the display memory 18 via the switch 23.

In this way, the storage address for each wave transmission is moved one address at a time in the Y-axis direction, and writing is sequentially executed in the direction of the arrow in FIG. In FIG. 3, if the signal stored from Y=i (the shaded part) is the latest signal, then Y=i-1, i-2
,---Y=1. Y=n.

It is an older signal that Y = i + 1
The oldest signal is stored. However, the signals of Y=i+■ to i+1 (area indicated by dotted lines in the figure) are erased for the following reason.

The readout and display of the signal is performed using the rask scanning method as described later.
= i Read from the 11th location in the older direction.

This causes an inconvenience in that part of the signal in the area indicated by the dotted line in the figure is displayed in contact with the latest signal.

Therefore, when writing a signal at Y=i, it is necessary to write an erase signal to Y=i÷intestinal to create a no-signal state.

For this purpose, switches 17.21. A counter 20, an adder circuit 24, a switching signal from the control circuit 2 for switching the switches 17 and 21, and an erase signal generating circuit are provided. When the writing of the signal to the hatched address in FIG. 1A is completed since Y=i, the control circuit 2 switches the switches 17 and 21 to the opposite side as shown, and supplies L pulses to the counter 20. The write address generation circuit 19 sends out the values x and Y in response to the input from the counter 20 as described above. Also, the addition circuit 22
The value of i◆error is input by the adder circuit 24, and as a result, X, Y+i◆■ is sent to the display memory 18 as the write address. and.

An erase signal from the erase signal generation circuit 25 is written to the address, making it a no-signal state. In this way, the above-mentioned inconvenience is solved by alternately writing the reception signal and writing the erase signal.

The readout and display of the stored contents of the display memory 18 is performed based on the clock pulse from the clock pulse generation circuit 2B, regardless of the transmission timing. The read address generation circuit 27 generates x for backward scanning every time the clock pulse is sent.
The y value is output, and the y address is converted into ÷i-y by a subtraction circuit 28 having a counting capacity n, and then sent to the display memory 18.

As a result, the address is specified from i/shoulder address on the Y axis where the latest signal is stored in the direction where the older signal is stored. The signals read out in this manner are sent to the display 29 and displayed over time by a rask scanning signal generated by the deflection circuit 30 in synchronization with the readout address.

(Effects of the Invention) As described above, according to the present invention, detection information at a desired depth in a sonar signal, that is, a horizontal plane, can be displayed over time compared to the latest information, making it easier to recognize the situation of a school of fish. Also, if listed separately or together, sonar P
By comparing and observing the PI display image, it becomes possible to make countless estimations, which is extremely practical for operations.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing an embodiment of the present invention. FIG. 2 is a diagram for explaining detection signals extracted and captured in one reception. FIG. 3 is a diagram for explaining the relationship between signals and addresses stored in the display memory. FIG. 4 is a diagram for explaining the relationship between input value sentences and output values X and Y.

Claims (1)

[Claims] Transmitting/receiving means for transmitting transmitting pulses over a wide range and in an umbrella shape, and receiving return reflected waves in a time-series manner by rotating a receiving beam at high speed; an extracting/taking means for extracting and taking in a signal within a set forward direction range; a writing control means for reading out the contents of the extracting/taking means and writing the address in a display memory for one screen by moving the address in a chronological direction; 1. A sonar signal time display device comprising means for reading the contents of a display memory from the latest written signal to the oldest signal and displaying it on a display over time.