JPS62269591A - Color television receiver - Google Patents

Color television receiver

Info

Publication number
JPS62269591A
JPS62269591A JP11411086A JP11411086A JPS62269591A JP S62269591 A JPS62269591 A JP S62269591A JP 11411086 A JP11411086 A JP 11411086A JP 11411086 A JP11411086 A JP 11411086A JP S62269591 A JPS62269591 A JP S62269591A
Authority
JP
Japan
Prior art keywords
signal
circuit
pal
color
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11411086A
Other languages
Japanese (ja)
Other versions
JPH0585114B2 (en
Inventor
Toshiichi Okamoto
岡本 敏一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11411086A priority Critical patent/JPS62269591A/en
Publication of JPS62269591A publication Critical patent/JPS62269591A/en
Publication of JPH0585114B2 publication Critical patent/JPH0585114B2/ja
Granted legal-status Critical Current

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  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To simplify a processing circuit and to decrease a cost by taking out the first and second CW signals from a variable control oscillating circuit for a PAL color signal processing circuit and inputting a line successive signal after phase modulation to the above-mentioned circuit when the line successive signal of an SECAM color signal is phase-modulated by the first and second CW signals having a 90 deg. phase difference mutually. CONSTITUTION:The first CW signal C1 guided to an SECAM/PAL converting part SC and the second CW signal C2 to phase-advance this to 90 deg. are given to a phase modulating circuit 6 for PAL. Thus, at the output line L2 of the modulating circuit 6, the phase-modulated R-Y and B-Y line successive signal can be obtained. An output signal A after modulation is inputted to a band pass filter 15 in a PAL processing part PP, and the burst signal is removed by a gate circuit 16 and derived as a signal E. The signal E is inputted to a 1H delay circuit 17 and adder subtractor circuits 18 and 19. A B-Y signal and an R-Y signal demodulated respectively by demodulating circuits 20 and 21 are obtained and a G-Y signal is generated by a matrix circuit 22.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、テレビジョン受像機特にSECAM信号とP
AL信号を受像できるようにしたデュアルタイプのカラ
ーテレビジョン受像機に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Industrial field of application The present invention is applicable to television receivers, especially SECAM signals and
The present invention relates to a dual type color television receiver capable of receiving AL signals.

(ロ) 従来の技術 最近のテレビジョン受像機では、後付けでデュアル受像
機に変更できるようにする等の目的で、SECAM用の
カラー信号処理回路をPAL用のそれとは別個に設けず
、SECAMカラー侶号をPALカラー信号に変換し、
PAL用のカラー信号処理回路でカラー復調再生等を行
なうようにしたものである。この場合に使用するSEC
AM/PAL変換用のICとして、フィリップス社のT
DA3592Aがあり、その詳細については1986年
1月29日1寸で発行きれた同社のLaborator
yReport”のNct ETV8602に紹介され
ている。
(b) Conventional technology In recent television receivers, the color signal processing circuit for SECAM is not provided separately from that for PAL in order to be able to change to a dual receiver by retrofitting. Convert the name to a PAL color signal,
This is a PAL color signal processing circuit that performs color demodulation and reproduction. SEC used in this case
As an IC for AM/PAL conversion, Philips T
There is a DA3592A, and its details can be found in the company's Laborator, which was published in 1 sun on January 29, 1986.
yReport” Nct ETV8602.

第3図は上記ICを使用したSECAM/PAL変換回
路の概略構成を表わしている。同図に於いて、ベルフィ
ルタ(1)で周波数補正されたSECAMカラー信号が
IC(2)内のFM復調回路(3)にそのま〜入力され
、ここで復調されてR−Y、B−Y!*順次の信号が得
られる。そして、この信号のR−Y、B−Y期間の各直
流レベルがクランプ回路(4)で揃えられ、乱っ、バー
ストパルス発生回路(5)からのバーストパルスが各水
平ブランキング期間に挿入きれて、PAL用変調回路(
6)に送られる。この変調回路(6)は、CW(搬送波
)発振回路(7)からの互に90°の位相差をもつ4.
43MH2の第1第2CW信号を得て、バーストパルス
が挿入された前記fi順次信号の位相変調を行なう、そ
の際、この線順次信号のB−Y期間では色差3号部分は
第1CW信号を用いて、且つバーストパルス部分は第1
CW(I!号を180°反転した信号を用いてそれぞれ
変調され、R−Y期間の色差18号部分及びバーストパ
ルス部分は共に第20W侶号を用いて変調されるので、
その出力信号は第4図の(A)となる、そして、この出
力信号(A)をレベル調整用の可変抵抗器(VH2)を
通したもの(B)と、IH遅延線(11)を通して得た
信号(C)とが、マトリックス回路〈9)でベクトル合
成される。その際、フリップ・フロップ(8)の出力に
よってR−Y信号の位相が交互に反転されて合成される
ので、このマトリックス回路(9)からPAL信号形式
に変換きれたカラー信号(D)が得られる訳である。
FIG. 3 shows a schematic configuration of a SECAM/PAL conversion circuit using the above IC. In the same figure, the SECAM color signal frequency-corrected by the bell filter (1) is directly input to the FM demodulation circuit (3) in the IC (2), where it is demodulated and R-Y, B- Y! *Sequential signals can be obtained. Then, the DC levels of this signal during the R-Y and B-Y periods are aligned by the clamp circuit (4), and the burst pulses from the burst pulse generation circuit (5) are inserted into each horizontal blanking period. The PAL modulation circuit (
6). This modulation circuit (6) has a phase difference of 90° from the CW (carrier wave) oscillation circuit (7).
Obtain the first and second CW signals of 43MH2 and perform phase modulation of the fi sequential signal into which burst pulses have been inserted. At this time, in the B-Y period of this line sequential signal, the color difference No. 3 portion uses the first CW signal. and the burst pulse portion is the first
Each signal is modulated using a signal obtained by inverting the CW (I! signal) by 180°, and both the color difference No. 18 portion and the burst pulse portion of the RY period are modulated using the 20 W signal.
The output signal is (A) in Figure 4, and this output signal (A) is obtained by passing it through a variable resistor (VH2) for level adjustment (B) and an IH delay line (11). The resulting signal (C) is vector-combined in a matrix circuit <9). At this time, the phases of the R-Y signals are alternately inverted and synthesized by the output of the flip-flop (8), so a color signal (D) that has been converted into a PAL signal format is obtained from this matrix circuit (9). That is why it is done.

なお、IC(2)内の回路(7)はFM復調回路(3)
から出力される前記線順次信号のR−Y期間とB−Y期
間のレベル差を検出して前記クランプ・フロップく8)
の反転動作が正常になるよう制御するID回路である。
Note that the circuit (7) in the IC (2) is the FM demodulation circuit (3).
Detecting the level difference between the R-Y period and the B-Y period of the line sequential signal output from the clamp flop 8)
This is an ID circuit that controls the inversion operation to be normal.

(ハ〉 発明が解決しようとする問題点ところで、第3
図の回路では、SECAM信号をPAL信号に変換する
ために、CW発振回路(10)用の水晶振動子(X+)
やIH遅延線(11)等が、PALカラー信号処理回路
内に設けられるそれらとは別個に必要となる。このため
、SECAM/PALデュアルタイプの受像機を実現す
る際に、その分だけコストアップになると云う欠点があ
った。
(C) The problem that the invention aims to solve By the way, the third problem
In the circuit shown in the figure, a crystal oscillator (X+) for the CW oscillation circuit (10) is used to convert the SECAM signal to a PAL signal.
, IH delay line (11), etc. are required separately from those provided in the PAL color signal processing circuit. For this reason, when realizing a SECAM/PAL dual type receiver, there is a drawback that the cost increases accordingly.

そこで、本発明は上記の点に留意してなされたものであ
り、PAL用のカラー信号処理回路とは別個に上記のC
W発振回路やIH遅延回路を設けることなく、SECA
M信号をPAL用の処理回路でカラー復調再生できるよ
うにしたカラーテレビジョン受像機を安価に実現するこ
とを目的とする。
Therefore, the present invention has been made with the above-mentioned points in mind, and the above-mentioned C
SECA without providing W oscillation circuit or IH delay circuit
The purpose of the present invention is to inexpensively realize a color television receiver that can perform color demodulation and reproduction of an M signal using a PAL processing circuit.

(ニ)問題点を解決するための手段 本発明のカラーテレビジョン受像機では、SECAMカ
ラー信号を直接復調して得たR−Y、 B−YIiJl
ji次信号中のB−Y、R−Y各信号を互いに90°の
位相差をもつ第1第2CW信号でそれぞれ位相変調する
際に、その第1第2CW信号をPALカラー信号処理回
路用の可変制御発振回路を固定周波数発振動作に切換え
て該発振回路から取り出すと共に、PALカラー侶号の
R−Y、B−Y分離用のIH遅延回路及び加減算回路、
R−Y、B−Y復調回路等を備えるPALカラー信号処
理回路に前記位相変調後の線順次信号を入力するようし
た。
(d) Means for Solving the Problems In the color television receiver of the present invention, R-Y, B-YIiJl obtained by directly demodulating SECAM color signals
When phase modulating the B-Y and R-Y signals in the ji-order signal with the first and second CW signals having a phase difference of 90 degrees, the first and second CW signals are used for the PAL color signal processing circuit. In addition to switching the variable control oscillation circuit to fixed frequency oscillation operation and extracting it from the oscillation circuit, an IH delay circuit and an addition/subtraction circuit for separating R-Y and B-Y of the PAL color code,
The line-sequential signal after phase modulation is input to a PAL color signal processing circuit including an R-Y, B-Y demodulation circuit, and the like.

(ホ) 作用 上記構成により、前記位相液′調された線順次信号がP
ALカラー侶号処理回路内の前記遅延回路と加減算回路
によってR−Y%B−Y同時信号に変換されたのち、上
記カラー信号処理回路内のR−Y、B−Y各復調回路で
カラー復調再生きれる。
(e) Effect: With the above configuration, the line sequential signal adjusted by the phase liquid is P
After being converted into a R-Y%B-Y simultaneous signal by the delay circuit and addition/subtraction circuit in the AL color signal processing circuit, it is color demodulated by the R-Y and B-Y demodulation circuits in the color signal processing circuit. Can be played.

(へ) 実施例 第1図は本発明の一実施例を示しており、以下、この実
施例を第2図を参照しながら説明するが、前述の第3図
と同一部分には同じ番号を付して説明を援用する。
(v) Embodiment FIG. 1 shows an embodiment of the present invention, and this embodiment will be explained below with reference to FIG. 2, where the same parts as in the above-mentioned FIG. The explanation is incorporated by reference.

第1図の回路は、大別するとSECAM/PAL変換部
(SC)とPAL(カラー信号)処理部(PP>とから
なり、上記変換部(SC)内の回路(1)〜(8)は何
れも第3図と同一構成のものであるが、変調回路(6)
に供給される第1第2CW信号(C+)(Cz)は後述
する可変制御発振器の出力信号及びこれを90°移相回
路(12)で90”進相させたものを使用している。ま
た、上記変調図M(6)の後段にはその出力ライン(2
1)と、SRCAMまたはPALの複合映像信号が導入
きれる入力端子(T)への直結ライン(り2)とを切換
える第1切換回路(13)が設けられ、この切換回路が
、ID回路(7)の出力信号を得て動作するPAL/S
ECAM判別回路(14)の出力によって切換えられる
構成となっている。
The circuit in Fig. 1 can be roughly divided into a SECAM/PAL converter (SC) and a PAL (color signal) processor (PP>), and the circuits (1) to (8) in the converter (SC) are Both have the same configuration as in Figure 3, but the modulation circuit (6)
The first and second CW signals (C+) (Cz) supplied to the circuit use the output signal of a variable control oscillator, which will be described later, and its phase advanced by 90" using a 90° phase shift circuit (12). , the output line (2
1) and a direct connection line (2) to the input terminal (T) into which an SRCAM or PAL composite video signal can be introduced. ) PAL/S operates by obtaining the output signal of
It is configured to be switched by the output of the ECAM discrimination circuit (14).

一方、前記PAL処理部(PP)は、先の第1切換回路
(13)の出力ライン(42,)に接続きれたカラー信
号抽出用のバンドパスアンプ(15)、そのカラー信号
中の色差信号とバースト信号とを分離して導出するゲー
ト回路(16)、上記色差信号のR−Y、B−Y分離用
のIH遅延回路(17)と加減算回路(IFi)(19
)、B−Y復調回路り20)とR−Y復調回路(21)
、カラーマトリックス回路(22)、4.43M)Iz
の可変制御発振回路(23)、この発振器から得る第1
第30W信号(C,)(Cり)(CコはC1よりも90
@進んでいる。)の一方(C3)を入力とするPALス
イッチ(24)、このPALスイッチ(24)の駆動用
のフリップ・フロンプ(25)を備えているが、これら
は従来のPAL受像機に採用きれているものと同じであ
る。
On the other hand, the PAL processing unit (PP) includes a bandpass amplifier (15) for color signal extraction connected to the output line (42,) of the first switching circuit (13), and a color difference signal in the color signal. a gate circuit (16) that separates and derives the burst signal and the burst signal, an IH delay circuit (17) for separating R-Y and B-Y of the color difference signal, and an addition/subtraction circuit (IFi) (19).
), B-Y demodulation circuit 20) and R-Y demodulation circuit (21)
, color matrix circuit (22), 4.43M) Iz
variable controlled oscillator circuit (23), the first
30th W signal (C,) (Cri) (Cco is 90% higher than C1
@Proceeding. ), and a flip-flop (25) for driving this PAL switch (24), which can be used in conventional PAL receivers. It is the same as the thing.

また、このPAL処理部(PP)内には、前記ゲート回
路(16)から導出されるバースト信号を前記発振器(
25)からの第1CW信号(C2)で位相検波して動作
するACC兼カラーキラー回路(26〉、上記ゲート回
路(16)からのバースト信号を前記PALスイッチ(
24)を通ったCW侶号で位相検波して動作するID回
路(27)、及び前記ゲート回路(16)からのバース
ト信号を前記第1CW信号(C+)で位相検波し、その
出力に応じて可変制御発振器(23)の位相を制御する
APC回路(28)を備えており、これらも従来のもの
と何等変らないが、ここでは次の構成を特徴としている
。それは前記APC回路(28)からの制御電圧と一定
の直流電圧(Eo)とを前記PAL/SECAM判別回
路(14)の出力に応じて動作する第2切換回路(29
)によって切換えるようにした点である。
Further, within this PAL processing unit (PP), a burst signal derived from the gate circuit (16) is transmitted to the oscillator (
The ACC and color killer circuit (26) operates by phase detection using the first CW signal (C2) from the gate circuit (25), and the burst signal from the gate circuit (16) is connected to the PAL switch (25).
The burst signal from the gate circuit (16) and the first CW signal (C+) is phase-detected by the ID circuit (27), which operates by phase-detecting the phase of the CW signal that has passed through the CW signal (C+). It is equipped with an APC circuit (28) that controls the phase of the variable control oscillator (23), and these are no different from conventional ones, but here they are characterized by the following configuration. A second switching circuit (29) operates between the control voltage from the APC circuit (28) and a constant DC voltage (Eo) according to the output of the PAL/SECAM discrimination circuit (14).
).

次に斯る実施例の動作を説明すると、SECAM放送受
信時には先ずPAL/SECAM判別回路(14)の出
力によって第2切換回路(29)が図示の状態に切換わ
るので、発振回路(23)は4.43MHzの固定周波
数発振器として動作し、その一定位相の第tCW侶号(
C1)がSECAM/PAL変換部(SC)に導かれ、
この第1CW信号(C+)及びこれを90′″移相回路
(12)によって90′″進相させた第2CW信号(C
2)がPAL用の位相変調回路(6)に与えられる。そ
れによりこの変調回路(6)の出力ライン(!2)には
、第3図の場合と全く同様に、第2図(A)の如く位相
変調されたR−Y、B−Y線順次の信号が得られる。
Next, to explain the operation of this embodiment, when receiving SECAM broadcasting, the second switching circuit (29) is first switched to the state shown in the figure by the output of the PAL/SECAM discriminating circuit (14), so the oscillation circuit (23) is It operates as a fixed frequency oscillator of 4.43MHz, and its constant phase tCW oscillator (
C1) is guided to the SECAM/PAL converter (SC),
This first CW signal (C+) and the second CW signal (C
2) is applied to the PAL phase modulation circuit (6). As a result, the output line (!2) of this modulation circuit (6) has sequentially phase-modulated R-Y and B-Y lines as shown in FIG. 2(A), just as in the case of FIG. I get a signal.

前記変調後の出力信号(A)は図示の状態にある第1切
換回路(13)を通ってPAL処理部(PP)内のバン
ドパスフィルタ(15)に入力され、ゲート回路(16
)でバースト信号が除去された第2図(E)の信号とし
て導出きれ、この信号(E)がIH遅延回路(17)と
加減算回路(1g)(19)に入力される。従って、そ
の各出力はそれぞれ第4図(FHG)(H)となり、そ
の加減算回路(18)(19)の出力信号(G)(H)
がそれぞれB−Y復調回路(20)及びR−Y復調回路
(21)に入力きれる。
The modulated output signal (A) passes through the first switching circuit (13) in the illustrated state, is input to the bandpass filter (15) in the PAL processing section (PP), and is input to the gate circuit (16).
), the burst signal can be removed as the signal shown in FIG. 2 (E), and this signal (E) is input to the IH delay circuit (17) and addition/subtraction circuits (1g) (19). Therefore, the respective outputs become (FHG) (H) in Fig. 4, and the output signals (G) (H) of the addition/subtraction circuits (18) (19).
can be input to the B-Y demodulation circuit (20) and the R-Y demodulation circuit (21), respectively.

一方、前記復調回路の一方(20)には、その入力信号
(G)中のB−Y信号の位相に一致する第1cw(g号
(C+)が発振回路(23)から直接与えられるので、
この復調回路(20)では上記B−Y信号のみが復調さ
れ、R−Y信号は除去される。また、他方の復調回路(
21)にはその入力信号(H)中のR−Y信号の位相と
一致するようIH毎に第3CW信号(C3)(−C2)
及びその反転出力がPALスイッチ(24)から交互に
与えられるので、この復胴回路(21)では上記R−Y
侶号のみが復調され、B−Y信号は除去きれる。そして
、この各復調回路(20)(21)でそれぞれ復調され
たB−Y信号及びR−Y信号を得てマトリックス回路(
22)でG−Y信号が作成きれる訳である。
On the other hand, one of the demodulation circuits (20) is directly given the first cw (g (C+)) which matches the phase of the BY signal in the input signal (G) from the oscillation circuit (23).
This demodulation circuit (20) demodulates only the BY signal and removes the RY signal. Also, the other demodulation circuit (
21), the third CW signal (C3) (-C2) is applied to each IH so that the phase matches the phase of the RY signal in the input signal (H).
and its inverted output are alternately given from the PAL switch (24), so in this recovery circuit (21), the R-Y
Only the voice signal is demodulated, and the BY signal can be completely removed. Then, the demodulation circuits (20) and (21) obtain the B-Y signal and the R-Y signal, respectively, and obtain the demodulated signals from the matrix circuit (
22), the G-Y signal can be created.

ここで、ID回路(27)はゲート回路(16)で分離
されたバースト信号(第21m(1)とPALスイッチ
(24)からのCWg号が与えられるので、このCW侶
号と上記バースト信号(I)中のR−Y軸方向の信号と
の位相が不一致のときに、フリップ・フロップ(25)
の反転動作を止め、それによってPALスイッチ(24
)の動作モードが正常になるように制御するが、斯る動
作はPALカラー傷号に対する場合と基本的に同一であ
る。
Here, the ID circuit (27) is given the burst signal (21m(1)) separated by the gate circuit (16) and the CWg signal from the PAL switch (24), so this CW signal and the burst signal ( When the phase of the signal in the R-Y axis direction in I) is mismatched, the flip-flop (25)
, thereby stopping the reversing operation of the PAL switch (24
) is controlled so that the operating mode is normal, but such operation is basically the same as for PAL color symbols.

また、この状態では前述の如<APC回路(28)を切
り離して発振器(23)を動作させているが、それはこ
の発振器から得る第1vg2CWM号がSECAM/P
AL変換部(SC)内の変調回路(6)へのキャリア及
びバースト信号として供給されているので、APC回路
(28)を動作させると、上記発振回路(23)の周波
数変動が助長される方向に制御され、CW傷信号周波数
が大きくずれてしまうからである。
Also, in this state, as mentioned above, the oscillator (23) is operated by disconnecting the APC circuit (28), which means that the 1st vg2CWM signal obtained from this oscillator is
Since it is supplied as a carrier and a burst signal to the modulation circuit (6) in the AL converter (SC), when the APC circuit (28) is operated, the frequency fluctuation of the oscillation circuit (23) is accelerated. This is because the CW flaw signal frequency deviates significantly.

また、PAL放送受信時は入力端子(T)に入力された
PALのカラー複合映像信号が、図示と逆の状態にある
第1切換回路(13)を通ってバンドパスアンプ(15
)に入力きれ、このアンプ(15)から第4図<D)の
型式のPALカラー言号が導出きれる。従って、PAL
処理部(PP)は上記PALカラー侶号に対して動作す
るが、この動作は従来のものと何等変りがないので、説
明を省略する。
Also, when receiving PAL broadcasting, the PAL color composite video signal input to the input terminal (T) passes through the first switching circuit (13), which is in the opposite state as shown, to the bandpass amplifier (15).
), and a PAL color word of the type shown in FIG. 4<D) can be derived from this amplifier (15). Therefore, PAL
The processing section (PP) operates on the above-mentioned PAL color code, but since this operation is no different from the conventional one, the explanation will be omitted.

なお、ACC兼カラーキラー回路(26)は、SECA
M放送受信時に於いてもPAL放送受信時と同様に動作
し、このSECAM時のACC動作は受像機側で挿入さ
れたバースト信号に基づくものであるから意味がないも
のであるが、この動作をSECAM時に特に停止きせる
必要もないので、そのまへにしているのである。
In addition, the ACC and color killer circuit (26) is SECA
When receiving M broadcasting, it operates in the same way as when receiving PAL broadcasting, and the ACC operation during SECAM is meaningless because it is based on the burst signal inserted on the receiver side. There is no particular need to stop during SECAM, so it is left as is.

また、本実施例では、PAL用の位相変調回路(6)に
供給する第2のCW傷信号して発振器(23)から直接
得る第3CW信号(Ca)を使用せず、第1CW信号(
C7)を90°移相回路(12)を通すことによって第
3CW信号(C3)と同位相の第2CW侶号(C2)を
作成するようにしているが、これはSECAM/PAL
変換部(SC)とPAL処理部(PP)をそれぞれ別チ
ップのICで構成する場合にはこのように構成した方が
その各ICの外付は端子ビン及びそのビン間の接続リー
ドが一組節約できるからである。
Furthermore, in this embodiment, the third CW signal (Ca) directly obtained from the oscillator (23) is not used as the second CW signal supplied to the PAL phase modulation circuit (6), but the first CW signal (
C7) is passed through a 90° phase shift circuit (12) to create a second CW signal (C2) that has the same phase as the third CW signal (C3), but this is a SECAM/PAL signal.
If the conversion section (SC) and the PAL processing section (PP) are configured with separate IC chips, it is better to configure them in this way so that each IC has a terminal bin and a set of connecting leads between the bins. This is because you can save money.

(ト)発明の効果 以上の如く本発明に依れば、SECAMカラー舊号をP
ALカラー信号処理回路で復調再生するように構成する
場合に、CW発振回路、IH遅延回路、加減算回路等を
上記PALカラー侶号処理回路のものと別個に必要とせ
ず、従って、5ECA/PAL変換部の構成が簡単にな
り、特にこの部分をIC化する場合には外付は部品及び
外付はピン数を少なくでき、しかも、上記PALカラー
信号処理回路自体の構成も殆んど変更する必要がな〈従
来のICをそのま\使用でき、従って、デュアル型のテ
レビジョン受像機を安価に実現できると言う利点がある
(G) Effects of the Invention As described above, according to the present invention, the SECAM color code can be changed to
When configured to perform demodulation and reproduction using an AL color signal processing circuit, a CW oscillation circuit, an IH delay circuit, an addition/subtraction circuit, etc. are not required separately from those of the above PAL color signal processing circuit, and therefore 5ECA/PAL conversion is possible. This simplifies the configuration of the section, and especially when converting this section into an IC, the number of external parts and external pins can be reduced, and the configuration of the PAL color signal processing circuit itself does not need to be changed. The advantage is that conventional ICs can be used as is, and a dual-type television receiver can therefore be realized at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明テレビジョン受像機の一実施例の要部を
示すブロック図であり、第2図はその各部のカラー信号
の位相関係を示す図である。 第3図は従来のSECAM/PAL変換回路の要部を示
すブロック図であり、第4図はその各部のカラー信号の
位相関係を示す図である。
FIG. 1 is a block diagram showing the main parts of an embodiment of the television receiver of the present invention, and FIG. 2 is a diagram showing the phase relationship of color signals in each part. FIG. 3 is a block diagram showing the main parts of a conventional SECAM/PAL conversion circuit, and FIG. 4 is a diagram showing the phase relationship of color signals in each part.

Claims (1)

【特許請求の範囲】[Claims] (1)SECAMカラー信号を変換してPALカラー信
号処理回路で復調し受像するPAL/SECAMデュア
ル型のカラーテレビジョン受像機に於いて、 前記SECAMカラー信号を直接復調してR−Y、B−
Y線順次信号を出力する復調回路と、前記順次信号中の
B−Y信号に対しは第1CW信号を用いて位相変調し、
且つ、その第1CW信号を位相反転させてバースト信号
として付加させ、R−Y信号に対しては第1CW信号と
90°位相の異なる第2CW信号を用いて位相変調を行
ない、且つ、その第2CW信号をバースト信号として付
加させるよう動作する変調回路と、 入力された搬送カラー信号をIH遅延回路と加減算回路
を用いてB−Y信号とR−Y信号に分離する回路と、そ
のR−Y、B−Y各信号の復調を行なう復調回路とを備
えるPALカラー信号処理回路と、 前記カラー信号処理回路内の前記復調回路にCW信号を
供給する可変制御発振回路をSECAM放送受信時に一
定周波数の固定発振器として動作させる切換回路と、 前記発振回路から前記第1第2CW信号を導出する回路
とを備え、 前記変調回路から出力されるカラー信号を前記PALカ
ラー信号処理回路の入力として供給するようにしたカラ
ーテレビジョン受像機。
(1) In a PAL/SECAM dual type color television receiver that converts a SECAM color signal and demodulates it in a PAL color signal processing circuit for image reception, the SECAM color signal is directly demodulated and R-Y, B-
a demodulation circuit that outputs a Y-line sequential signal; and a demodulation circuit that performs phase modulation on the BY signal in the sequential signal using a first CW signal;
Further, the phase of the first CW signal is inverted and added as a burst signal, phase modulation is performed on the R-Y signal using a second CW signal having a phase different by 90 degrees from the first CW signal, and the second CW signal is added as a burst signal. a modulation circuit that operates to add a signal as a burst signal; a circuit that separates an input carrier color signal into a B-Y signal and a R-Y signal using an IH delay circuit and an addition/subtraction circuit; A PAL color signal processing circuit comprising a demodulation circuit that demodulates each B-Y signal, and a variable control oscillation circuit that supplies a CW signal to the demodulation circuit in the color signal processing circuit to fix a constant frequency when receiving SECAM broadcasting. A switching circuit that operates as an oscillator; and a circuit that derives the first and second CW signals from the oscillation circuit, and the color signal output from the modulation circuit is supplied as an input to the PAL color signal processing circuit. Color television receiver.
JP11411086A 1986-05-19 1986-05-19 Color television receiver Granted JPS62269591A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11411086A JPS62269591A (en) 1986-05-19 1986-05-19 Color television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11411086A JPS62269591A (en) 1986-05-19 1986-05-19 Color television receiver

Publications (2)

Publication Number Publication Date
JPS62269591A true JPS62269591A (en) 1987-11-24
JPH0585114B2 JPH0585114B2 (en) 1993-12-06

Family

ID=14629376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11411086A Granted JPS62269591A (en) 1986-05-19 1986-05-19 Color television receiver

Country Status (1)

Country Link
JP (1) JPS62269591A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0352394A (en) * 1989-07-19 1991-03-06 Sanyo Electric Co Ltd Chroma signal processing circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0352394A (en) * 1989-07-19 1991-03-06 Sanyo Electric Co Ltd Chroma signal processing circuit

Also Published As

Publication number Publication date
JPH0585114B2 (en) 1993-12-06

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