JPS62266468A - Speed detector - Google Patents

Abstract

PURPOSE:To detect speed with high accuracy at a fixed sampling cycle in a wide speed range, by using a pulse corresponding at 1:1 to an output frequency of an encoder as the input pulse at a high speed range while the position of rotation at the sampling is determined at a low speed range. CONSTITUTION:An encoder 1 outputs one cycle of a sine wave signal and a pulse signal each time the position of rotation changes by a specified unit value and a phase detection means comprising a quadrant discriminator circuit 6, an A/D converter 4 and a memory 17 detects a phase angle of the sine wave signal based on the time when the signal shifts from negative to positive voltage. A microcomputer 18 detects a rotational speed as a value proportional to the inverse of several pulse intervals outputted from the encoder 1 when the rotation speed thereof 1 is high. When the rotational speed of the encoder 1 is low, the computer 18 determines a rotational speed from variations in an output from the memory 17 within a fixed time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a speed detection device for an electric motor, and more particularly to a speed detection device that has a wide speed range and can detect speed with high accuracy.

[Conventional technology]

The conventional device is a magazine sensor technology (April 1982 issue, 9
As described in "Motor speed detection and control using a microprocessor" (pages 7 to 101), if the speed is detected at extremely low speeds, that is, if the pulses are not within a certain period, either the speed cannot be detected or the detection sampling period changes and the speed is No consideration was given to the negative impact on control performance. Also, Tokukai Sho 6
When speed is detected using a sine wave signal using an encoder as described in No. 0-100718, it is possible to detect at low speeds, but in this case, no consideration is given to detecting with high accuracy at high speeds. Ta.

[Problem that the invention seeks to solve]

In the above conventional technology, at extremely low speeds where pulses are not within a certain period, speed detection is not possible, or even if it is possible, the sampling period changes, which may adversely affect speed control calculations and control responses. Ta. Therefore, in order to widen the speed detection range, generally from the two-phase pulse of A phase and B phase to P
A method of creating a frequency twice or four times the LG frequency and increasing the number of pulses in a constant period has been adopted.

In this case, due to positional errors in the A and B phases, duty errors in the process of creating pulses from the sine wave, etc., the pulse train no longer has a constant period, resulting in an error in the number of pulses, making it impossible to detect the speed with high accuracy.

An object of the present invention is to provide a speed detection device capable of highly accurate speed detection at a constant sampling period over a wide speed range.

[Means for Solving Problem 6] The above purpose is to use an encoder that outputs a sinusoidal signal and pulses with a frequency proportional to the rotational speed as a detector,
In the high-speed region, the input pulse is a one-to-one pulse with the output frequency of the sine encoder.

Find the speed from the number of pulses in a constant sampling time and their time interval, and in the low speed region.

This is achieved by determining the rotational position at the time of sampling, and determining the speed from the difference from the rotational position at the previous detection time and the sampling time.

[Effect]

The point at which the sine wave signal output from the encoder switches from negative to positive voltage coincides with the rotational position with an accuracy of approximately ±2%. Therefore, in the high speed region, the speed is determined with high precision by calculating the number of times the voltage changes from negative to positive, that is, the number of pulses ΔC and the number of pulses.

On the other hand, in the low speed region, k(
The speed is determined with high accuracy by calculating (ΔC-1)ko+80/Tc.

〔Example〕

An embodiment of the present invention is shown in FIG.

In FIG. 1, reference numeral 1 denotes an encoder that outputs two-phase sine wave signals and pulse signals whose phases are different by 90 degrees, in which one rotation is divided into m parts. Its output AP.

BP is input to pulse input circuits 2 and 3. Further, the sine wave signal A is input to the A/D conversion circuit 4.

The output signal of the pulse input circuit 2 is input to the pulse shaping circuit 5, which generates a pulse PLS at the time of synchronization with the rising and falling edges. Further, PLS can be switched to 2 times or 1 time by the pulse number switching signal CH. The pulse PLS is counted by a reversible counter 8 via a direction discrimination circuit 7 as a + pulse if the direction of one rotation is positive, and as a - pulse if it is negative.

Furthermore, the pulse PLS is input to the register setting circuit 9, and the contents of the counters 8 and 10 at the time when the pulse PLS is generated are set in the registers 11 and 12, respectively.

Further, the counter 10 counts clock pulses of a constant turbidity number outputted from the Glock pulse generation circuit 13. 14
generates a constant cycle interrupt pulse using a frequency divider circuit. This interrupt pulse is also input to the register setting circuit 9, and becomes a signal for setting the contents of registers 11 and 12 in registers 15 and 16, respectively. In the direction discrimination circuit 7, if the phase of the pulse signal AP is ahead of the pulse signal BP, it is determined as positive.
If there is a delay, it is determined to be negative and the direction of rotation of the encoder is determined. The quadrant discrimination circuit 6 is a pulse AP.

The quadrant of the rotational position of the encoder 1 is determined based on the level of BP and the rotation direction signal of the direction determination circuit 7.

The output of the quadrant discriminating circuit 6 becomes part of the address of the memory 17 in which the 5in-'' function table is stored.1
8 is a microcomputer, registers 15 and 16
Then, the contents of the memory 17 are taken in, and speed detection calculations are performed at every fixed interrupt cycle.

FIG. 2 shows a detailed circuit diagram of an example of the pulse shaping circuit 5.

In FIG. 2, reference numerals 21 and 22 are flip-flops that output a signal synchronized with CLOCK from the output signal APLS of the pulse input circuit 2, and 23, 24 and 25 are gate circuits that output the rising and falling edges of APLS. When the pulse switching signal CH is 0'', the output of 25 becomes PLS in FIG. 3, and when it is 1'', it becomes the same as the output of the rising pulse 23. That is, the pulse shaping circuit 5 selects a double or a single pulse number.

Next, the operation of this embodiment will be explained using FIGS. 1 to 5. FIGS. 4 and 5 are time charts illustrating speed detection operations at high and low speeds, respectively. When the encoder 1 rotates, sine wave signals A and B and pulse signals AP and BP whose phases differ by 90 degrees as shown in FIGS. 4 and 5 are generated, and the pulse shaping circuit 5 outputs the pulse signal PLS.

In FIGS. 4 and 5, (a) shows a time chart when the pulse is doubled, and (b) shows a time chart when the pulse is doubled (1:1).

In the direction discrimination circuit 7, a pulse signal A having a phase of 90 degrees is detected.
P and BP output a pulse signal PLS to the + input of the counter 8 during forward rotation, and to the - input during reverse rotation. In the examples shown in FIGS. 4 and 5, since As is ahead of BS in phase, it is determined that the rotation is normal.

The output C of the counter 8 is a pulse signal P as shown in Figs.
Since the LS is counted, it changes stepwise and is latched into the register 11. The counter 1o counts the reference pulse signal CLOCK of the oscillation circuit 13, and its output is the pulse signal PLS.
Each time, it is latched in the register 12 and becomes a step-like signal T. The amount of change in one stage indicates the time required for the encoder to rotate 172m, and T and C are latched in registers 15 and 16 at each rising edge output of the frequency divider circuit 14, which determines the cycle of speed calculation. and the LC of Fig. 4.5
, LT. The register setting circuit 9 is
This is a synchronization circuit for correctly setting the counter value in the register.

Quadrant discrimination circuit 6. The A/D converter 4 and the memory 13 are circuits for determining the phase angle θ of the sine wave signal A. A/D conversion
I4 converts the analog value of the sine wave signal A at each point in time into a digital value. The converted digital value is 5i
It is converted into one phase angle θ via the memory 17 in which the function table of ``n-'' is stored.Here, considering the range of 0 to π'' (rad) of the sine wave signal A, the same value So 2
There are two different phases: θ and π-θ. In order to determine this difference and index the 5in-' function table, the output of the quadrant discriminating circuit 6 is used. Now memory 1
7, a function table of ``gin-'' is stored so that the range from 0 to π is divided by N bits.When D is O, the table in the range from O to π/2 in the memory 17 is indexed. and when D is 1, π/2 to π of the memory 17
The table for the range .theta. is indexed, resulting in an output such as .theta. in FIG.

The microcomputer 18 takes in the values of the peripheral circuits shown in FIG. 1 and executes the processing shown in the flowchart of FIG. 6 at regular intervals Tc. In FIG. 6, first, in step 20, the value C(n) of the register 15, the value T(n) of the register 16, and the value θ(n) of the memory 17 are taken in.
Here, n such as C(n) is 0 indicating the nth detection point.
Next, in step 22, the previous value of counter 8 C(n-1)
Find the difference ΔC. This difference ΔC indicates the amount of change in the rotation angle from time (n-1) to time n as shown in FIG. . If the absolute value of ΔC is greater than the constant value Co, it means that the rotational speed of the encoder 1 is fast, so in that case, the process of step 30 is performed via step 24. Find the difference Ta. Since the value of the register 12 is held every time the pulse AP is generated as shown in FIG. 4, the value T detected at time n means the value at time n in FIG. That is, the time at which the sinusoidal signal of the encoder 1 becomes zero voltage is memorized, and by using the moving distance 1ΔC1 between T&, the speed can be accurately determined from step 32.

On the other hand, when 1ΔC1 is smaller than the constant value Co, it means that the speed of the encoder has become low, resulting in an operating waveform as shown in FIG. Here, in step 26, using the detected phase angle θ(n) and the previous phase angle θ(n-1), the phase angle Δθ that changed during a certain detection time Tc is calculated using the formula shown in step 26. demand. However, in step 26, 180° of the sine wave signal A is expressed as a digital value of 2N. On the other hand, the number of times it exceeds 180 degrees is 1(ΔG-1)1
This value is multiplied by a weight of 2N and added to 80. Now, since one cycle Tc is constant, the speed detection value V is 1(ΔG-
1) Proportional to l・2N+Δθ.

As mentioned above, when the encoder rotation speed is high,
The accurate rotation angle is measured based on the rise and fall of the pulse AP, and the speed is determined by changing the circuit and measuring the time in synchronization with the rise and fall of the encoder pulse. Highly accurate speed detection is possible. Also, when the rotation speed decreases, 1 of the sine wave signal
Since the phase angle θ within the cycle is used, a speed detection value can be obtained even at such low speeds that the pulse AP does not occur within the detection time Tc.

In the above explanation, the output pulse AP of encoder 1 is “H”
It is assumed that the ratio of "L" and "L", that is, the duty ratio, is 1:1, but in reality, as shown in FIG. 7, Tl<T/2. T2
>T/2, there is an error of several percent, and a speed detection error ε as shown below occurs.

p i = □ ...... (1) z
p: Duty ratio error N: To rated rotational speed: Proportionality constant Therefore, in the present invention, the circuit shown in FIG. 2 is provided so that even more accurate speed detection can be obtained. 3rd I
l! 1 is a time chart showing the operation of the circuit of FIG. 2; In FIG. 2, 21 and 22 are D type flip-flops, and 23 to 25 are gate circuits. The operation shown in FIG. 2 will be explained.

Flip-prop 21. for the human phase pulse signal AP.
The output of 22 becomes a signal synchronized with CLOCK as shown in FIG. 3, and the gate circuit 23 outputs a pulse at the rising edge of the 21 output. On the other hand, 24 outputs a pulse at the falling edge of the 21 output, and the gate circuit 25 outputs a pulse at the falling edge of the 21 output.
Output PLS in FIG. 3 by R. Here, when the pulse switching signal CH is "On", it becomes the 311th PLS signal,
When CH is at 1 m, only the rising edge is selected, so the output of 23 is output as is. In other words, if the error in the pulse duty ratio cannot be ignored, setting the pulse switching signal CH to 1'' eliminates the falling signal and d
The effect of the error in the uty ratio can be ignored. Time charts when only the rising edge of the input pulse is used are shown in Figures 4(b) and 5(b), where the phase angle θ is detected in the range of 0 to 2π of the sine wave signal A. Although it is necessary, the function table does not determine whether it is 1 from O to π, so by using the inverted signal of the pulse AP, it is possible to detect θ in the range from 0 to 2π. That is, as shown in FIG. 5(b), when AP is "O", the value is 0.
By using a phase angle of ~π and adding π to the phase angle of 0 to π when AP is “0”, it is possible to detect θ in the range of 0 to 2π.

〔Effect of the invention〕

As explained above, according to the present invention, in the high-speed region, the speed is calculated from the number of pulses in a constant sampling time and the time interval synchronized with the number of pulses, using a pulse that has a one-to-one relationship with the number of output pulses of the encoder as an input pulse. In addition, in the low speed region, by determining the speed from the difference between the rotational position at the sampling time and the rotational position at the previous detection time and the sampling time, the speed can be calculated over a wide range (1:1000 to 10000) from very low speed to high speed region. .

In addition, since speed can be detected with high accuracy, it is effective in improving speed control performance (steady-state deviation).

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention, FIG. 2 is a detailed circuit diagram of a pulse shaping circuit, and FIG. 3 is a time chart thereof.
4th rj! 5 is a time chart explaining the operation, FIG. 6 is a speed calculation flowchart, and FIG. 7 is a pulse waveform explanatory diagram. 1... Encoder, 2-3 peak pulse input circuit, 4...
・A/D conversion circuit, 5... Pulse shaping circuit, 6...
Quadrant discrimination circuit, 7... Direction discrimination circuit, 8... Reversible counter, 9... Register setting circuit, 10... Counter, 11-12. 15-16... Register, 13...
・Clock generation circuit, 14... Branch circuit, 17...
Memory, 18...';111nll i! Me 7

Claims (1)

[Claims] 1. An encoder that outputs a sine wave signal and a pulse signal for one cycle each time the rotational position changes by a predetermined unit amount, and a point in time when the sine wave signal changes from a negative voltage to a positive voltage as a reference a phase detection means for detecting a phase angle of the sine wave signal; and a phase detection means for detecting the rotation speed as a value proportional to a reciprocal of a plurality of pulse intervals output from the encoder when the rotation speed of the encoder is high; and speed calculation means for obtaining the rotation speed from a change in the output of the phase detection means within a certain period of time when the rotation speed of the phase detection means is low. 2. In claim 1, there is provided means for switching the frequency of the signal output from the encoder to double or once, and at the time of switching, the phase angle of the sine wave signal is also switched to double or once. A speed detection device featuring: