JPS62258512A - Reflecting lattice type delay line - Google Patents

Reflecting lattice type delay line

Info

Publication number
JPS62258512A
JPS62258512A JP10239786A JP10239786A JPS62258512A JP S62258512 A JPS62258512 A JP S62258512A JP 10239786 A JP10239786 A JP 10239786A JP 10239786 A JP10239786 A JP 10239786A JP S62258512 A JPS62258512 A JP S62258512A
Authority
JP
Japan
Prior art keywords
lattice
grating
reflection
pulse
delay line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10239786A
Other languages
Japanese (ja)
Inventor
Suketsugu Yamamura
山村 祐嗣
Eiji Iegi
家木 英治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP10239786A priority Critical patent/JPS62258512A/en
Publication of JPS62258512A publication Critical patent/JPS62258512A/en
Pending legal-status Critical Current

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  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Abstract

PURPOSE:To reduce number of parts by forming a pulse expansion and pulse compression reflection lattice type delay line on one piezoelectric substrate and using the line for a chirp radar. CONSTITUTION:The 1st reflecting lattice 14, the 2nd reflecting lattice 16 and the 3rd reflecting lattice 18 prolonged in the lengthwise direction at an interval in the broadwise direction are formed to the upper face of the piezoelectric substrate 12. The lattice 16 is in pairs with the lattice 14 and the lattice 18 and used in common for pulse expansion/compression. When an impulse signal is inputted to an interdigital electrode 20, a surface acoustic wave is reflected in the lattice 14 and extracted from an interdigital electrode 22 through the lattice 16. When an expanded pulse is inputted to an interdigital electrode 24, the surface acoustic wave is reflected on the lattice 18, the reflected wave reaches the lattice 16 and an output pulse is obtained from the interdigital electrode 26. Thus, in using the line for a chirp radar or the like, number of parts is reduced.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は反射格子形遅延線に関し、特にチャープレー
ダなどに用いられる、反射格子を用いた分散形遅延線に
関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a reflective grating type delay line, and more particularly to a distributed delay line using a reflective grating, which is used in chirp radar and the like.

(従来技術) 従来の反射格子形遅延線の例が、特開昭59−1019
18号および特開昭59−140716号などに開示さ
れている。
(Prior art) An example of a conventional reflection grating delay line is disclosed in Japanese Patent Application Laid-Open No. 59-1019.
No. 18 and Japanese Unexamined Patent Publication No. 140716/1983.

(発明が解決しようとする問題点) このような反射格子形遅延線は、チャープレーダなどに
用いられるが、チャープレーダでは、必ず、パルス伸長
用とパルス圧縮用の2つの遅延線を用いていた。したが
って、従来のものでは、遅延線の実装スペースが大きく
なるばかりでなく、両方の遅延線の外気温などの環境に
よる特性変化が異なれば、送信および受信で良好な自己
相関が確保できないという問題があった。
(Problem to be solved by the invention) Such a reflective grating delay line is used in chirped radar, etc., but chirp radar always uses two delay lines, one for pulse expansion and one for pulse compression. . Therefore, with the conventional method, not only does the space for implementing the delay line become large, but if the characteristics of both delay lines vary depending on the environment such as the outside temperature, good autocorrelation cannot be ensured in transmission and reception. there were.

それゆえに、この発明の主たる目的は、スペースファク
タの小さい、反射格子形遅延線を提供することである。
Therefore, a primary object of the present invention is to provide a reflective grating delay line with a small space factor.

この発明の他の目的は、パルス圧伸に用いられるとき、
温度特性に優れた、反射格子形遅延線を提供することで
ある。
Another object of the invention is that when used for pulse companding,
An object of the present invention is to provide a reflective grating type delay line with excellent temperature characteristics.

(問題点を解決するための手段) この発明は、圧電体基板、圧電体基板上に形成された対
となる反射格子を有する伸長用格子、および圧電体基板
上に形成された対となる反射格子を有する圧縮用格子を
備え、伸長用格子および圧縮用格子のそれぞれ対となる
べき1つの反射格子を共用する、反射格子形遅延線であ
る。
(Means for Solving the Problems) The present invention provides a piezoelectric substrate, an elongation grating having a pair of reflection gratings formed on the piezoelectric substrate, and a pair of reflection gratings formed on the piezoelectric substrate. The reflection grating type delay line is provided with a compression grating having a grating, and shares one reflection grating to be a pair of each of the expansion grating and the compression grating.

(作用) 1つの反射格子と共用される他の反射格子とがパルス伸
長用格子として作用し、共用される反射格子と別の反射
格子とでパルス圧縮用格子が構成される。
(Function) One reflection grating and another reflection grating that is shared act as a pulse expansion grating, and the shared reflection grating and another reflection grating constitute a pulse compression grating.

(発明の効果) この発明によれば、パルス伸長用とパルス圧縮用の反射
格子形遅延線が1つの圧電体基板上に形成されるので、
チャープレーダなどに用いるとき、部品数を少なくする
ことができ、また実装スペースを小さくすることができ
る。さらに、同じ圧電体基板上に形成されるためパルス
伸長用とパルス圧縮用とが、外部環境に対して同じ特性
変化を呈するため、相互に補償されて自己相関のよいも
のが得られる。
(Effects of the Invention) According to the present invention, since the reflection grating delay line for pulse expansion and pulse compression is formed on one piezoelectric substrate,
When used in a chirp radar or the like, the number of parts and mounting space can be reduced. Furthermore, since the pulse expansion and pulse compression circuits are formed on the same piezoelectric substrate, the pulse expansion circuit and the pulse compression circuit exhibit the same change in characteristics with respect to the external environment, so that they are mutually compensated for and have good autocorrelation.

この発明の上述の目的、その他の目的、特徴および利点
は、図面を参照して行う以下の実施例の詳細な説明から
一層明らかとなろう。
The above objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.

(実施例) 図はこの発明の一実施例を示す平面図である。(Example) The figure is a plan view showing an embodiment of the present invention.

反射格子形遅延線10は、圧電体基板12を含む。Reflective grating delay line 10 includes a piezoelectric substrate 12 .

圧電体基板12には、たとえばニオブ酸リチウム(Li
Nb03)が使用される。
For example, lithium niobate (Li
Nb03) is used.

圧電体基板12の上面には、幅方向に間隔を隔てて、そ
の長手方向に延びる第1の反射格子14、第2の反射格
子16および第3の反射格子18が形成される。反射格
子16は、反射格子14と反射格子18に挟まれるよう
に配置される。反射格子16は、反射格子14および反
射格子18の両方と対になり、したがって、パルス伸長
用およびパルス圧縮用に共用される。
A first reflection grating 14, a second reflection grating 16, and a third reflection grating 18 extending in the longitudinal direction are formed on the upper surface of the piezoelectric substrate 12 at intervals in the width direction. Reflection grating 16 is placed between reflection grating 14 and reflection grating 18 . Reflection grating 16 is paired with both reflection grating 14 and reflection grating 18 and is therefore shared for pulse stretching and pulse compression.

反射格子14は、弾性表面波を圧電体基板°12表面の
内方に直角に反射するように、弾性表面波の進行方向に
対して45@またはそれに近い傾きをもって、徐々にそ
の格子の間隔を変えながら形成される。そして、反射格
子16は、反射格子14と逆の傾きをもって、反射格子
14の各格子と同じ間隔で形成される。さらに、反射格
子18は、反射格子16と逆の傾きをもって、反射格子
16の各格子と同じ間隔で形成される。
The reflection grating 14 gradually changes the interval between the gratings with an inclination of 45@ or close to the direction of propagation of the surface acoustic waves so as to reflect the surface acoustic waves at right angles inward to the surface of the piezoelectric substrate 12. It is formed while changing. The reflection gratings 16 are formed with an inclination opposite to that of the reflection gratings 14 and at the same intervals as the respective gratings of the reflection gratings 14. Furthermore, the reflection gratings 18 are formed with an inclination opposite to that of the reflection gratings 16 and at the same spacing as each grating of the reflection gratings 16.

対となる反射格子14および16の入出力側には、イン
クディジタル電極20および22が形成される。同様に
、対となる反射格子16および18の入出力側には、イ
ンクディジタル電極24および26が形成される。すな
わち、共用される反射格子16の両側には、2つのイン
クディジタル電極22および26が配置される。
Ink digital electrodes 20 and 22 are formed on the input and output sides of the pair of reflection gratings 14 and 16. Similarly, ink digital electrodes 24 and 26 are formed on the input and output sides of the pair of reflection gratings 16 and 18. That is, two ink digital electrodes 22 and 26 are arranged on both sides of the shared reflective grating 16.

反射格子14と反射格子16の間には、位相特性補償用
の金属薄膜28が形成され、同様に、反射格子16と反
射格子18の間には、金属薄膜30が形成される。
A metal thin film 28 for phase characteristic compensation is formed between the reflection gratings 14 and 16, and similarly, a metal thin film 30 is formed between the reflection gratings 16 and 18.

この反射格子形遅延線10を使用する場合、インクディ
ジタル電極20にインパルス信号が入力される。人力さ
れた電気信号は、弾性表面波に変換され、反射格子14
で反射され、反射格子16を通して、インクディジタル
電極22から取出される。反射格子14および16の・
各格子間間隔は徐々に広がるように形成されているため
、インクディジタル電極22からは、伸長パルス(チャ
ープ信号)が得られる。また、伸長パルスがインタディ
ジタル電極24に入力されると、弾性表面波が反射格子
18によって反射されて反射格子16に至り、したがっ
て、インクディジタル電極26から出力パルスが得られ
る。この場合、反射格子18および16の各格子間間隔
は伸長する場合とは逆になっているため、インクディジ
タル電極26では圧縮された出力パルスを得ることがで
きる。
When using this reflective grating type delay line 10, an impulse signal is input to the ink digital electrode 20. The human-powered electric signal is converted into a surface acoustic wave, and the reflection grating 14
, and is extracted from the ink digital electrode 22 through the reflection grating 16 . of reflection gratings 14 and 16.
Since each interlattice interval is formed to gradually widen, an elongated pulse (chirp signal) is obtained from the ink digital electrode 22. Furthermore, when the stretched pulse is input to the interdigital electrode 24, the surface acoustic wave is reflected by the reflection grating 18 and reaches the reflection grating 16, so that an output pulse is obtained from the ink digital electrode 26. In this case, since the inter-lattice spacing of the reflection gratings 18 and 16 is opposite to that in the elongated case, compressed output pulses can be obtained at the ink digital electrode 26.

なお、上述の実施例においては、インタディジタル電極
20または24を入力電極として、また ゛インタディ
ジタル電極22または26を出力電極として説明した。
In the above embodiments, the interdigital electrodes 20 or 24 were used as input electrodes, and the interdigital electrodes 22 or 26 were used as output electrodes.

しかしながら、これら−人出力の関係は逆にされてもよ
い。さらに変形すれば、反射格子14および16の組な
らびに反射格子16および1日の組を、それぞれ、圧縮
用ならびに伸長用として利用できることは勿論である。
However, these human output relationships may be reversed. Of course, in a further modification, the set of reflection gratings 14 and 16 and the set of reflection gratings 16 and 1 can be used for compression and expansion, respectively.

【図面の簡単な説明】[Brief explanation of drawings]

図面はこの発明の一実施例を示す平面図である。 図において、10は反射格子形遅延線、12は圧電体基
板、14.16および18は反射格子、20.22.2
4および26はインクディジタル電極、28および30
は位相特性補償用金属薄膜を示す。 特許出願人 株式会社 村田製作所 代理人 弁理士 山 1) 義 人 (ばか1名)
The drawing is a plan view showing an embodiment of the present invention. In the figure, 10 is a reflection grating type delay line, 12 is a piezoelectric substrate, 14.16 and 18 are reflection gratings, 20.22.2
4 and 26 are ink digital electrodes, 28 and 30
indicates a metal thin film for phase characteristic compensation. Patent applicant Murata Manufacturing Co., Ltd. Representative Patent attorney Yama 1) Yoshito (one idiot)

Claims (1)

【特許請求の範囲】  圧電体基板、 前記圧電体基板上に形成された対となる反射格子を有す
る伸長用格子、および 前記圧電体基板上に形成された対となる反射格子を有す
る圧縮用格子を備え、 前記伸長用格子および前記圧縮用格子のそれぞれ対とな
るべき1つの反射格子を共用する、反射格子形遅延線。
[Scope of Claims] A piezoelectric substrate, an elongation grating having a pair of reflection gratings formed on the piezoelectric substrate, and a compression grating having a pair of reflection gratings formed on the piezoelectric substrate. A reflection grating type delay line, comprising: sharing one reflection grating to be paired with each of the expansion grating and the compression grating.
JP10239786A 1986-05-01 1986-05-01 Reflecting lattice type delay line Pending JPS62258512A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10239786A JPS62258512A (en) 1986-05-01 1986-05-01 Reflecting lattice type delay line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10239786A JPS62258512A (en) 1986-05-01 1986-05-01 Reflecting lattice type delay line

Publications (1)

Publication Number Publication Date
JPS62258512A true JPS62258512A (en) 1987-11-11

Family

ID=14326315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10239786A Pending JPS62258512A (en) 1986-05-01 1986-05-01 Reflecting lattice type delay line

Country Status (1)

Country Link
JP (1) JPS62258512A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5138215A (en) * 1991-05-20 1992-08-11 The United States Of America As Represented By The Secretary Of The Army Saw reflective array correlator with amplitude error compensating polymer reflective array grating

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5138215A (en) * 1991-05-20 1992-08-11 The United States Of America As Represented By The Secretary Of The Army Saw reflective array correlator with amplitude error compensating polymer reflective array grating

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