JPS62251676A - Data generation device for multicore cable test - Google Patents

Abstract

PURPOSE:To easily detect terminal group data on each core of a multicore cable and accurate characteristic data by providing an inspection signal output means, a terminal group detecting means, a recording means, a 1st time measuring means, a characteristic detecting means, a 2nd time measuring means, a margin value setting means, a test data generating means, etc. CONSTITUTION:The inspection signal output means 101 outputs an inspection signal to the multicore cable 100, each terminal group data on the cable is recorded as an index index item in the recording means 103 by the terminal group detecting means 102, and the time required for the acquisition of data is measured by the 1st time measuring means 104 and recorded in the means 103 by terminal group data. Further, the characteristic detecting means 105 detects characteristic data on respective cores and records them by the terminal group data in the means 103 and the time required for the acquisition of characteristic data is measured by the 2nd time measuring means 106 and stored in the means by the terminal group data. Further, the test data generating means 112 adds the degree of a margin from the margin value setting means 111 to respective data in the means 103 and records the resulting data on the test data recording means 113.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a data creation device for multi-core cable testing, and relates to a multi-core cable suitable for the configuration of a cable tester that conducts continuity, insulation, and voltage resistance tests of multi-core cables. Related to test data creation device.

[Prior Art] Currently, multicore cables consisting of a plurality of insulated core wires are often used in communication transmission networks.

In order to ensure high reliability in this multi-core cable, it is necessary to keep the insulation resistance and withstand voltage leakage current of each core wire extremely small within a predetermined range.
Insulation characteristics and voltage resistance characteristics were measured by applying a preset test signal to each core wire to detect insulation resistance and voltage leakage current.

[Problem that the invention seeks to solve]

However, the insulation characteristics and voltage resistance characteristics of multicore cables are
The type of conductor and insulating coating used for the core wire, the connection state of the connector connected to the multi-core cable, etc. have a large effect, and as the multi-core cable becomes longer, the resistance and inductance of each core wire, and the capacitance between the core wires will also be affected by the insulation. This tends to affect the characteristics and voltage resistance characteristics, and simply testing by adding the same preset test signal to each core wire of a multicore cable as in the past is insufficient because accurate detection results for each core wire cannot be obtained. there were.

Furthermore, searching for terminal sets for each core wire at both ends of a multi-core cable is extremely complicated and requires a high degree of skill, so a simple and efficient method for detecting terminal sets is desired.

The present invention was made under these circumstances.

Terminal set data for each core wire of a multi-core cable can be easily detected, accurate characteristic data for each core wire can be easily obtained, and test data with margins are automatically generated based on this characteristic data. The purpose is to provide a data creation device for multi-core cable testing that can be obtained.

[Means for solving problems]

In order to solve these problems, the present invention has a configuration as shown in FIG. 1, which is a diagram corresponding to claims.

That is, the test signal output means 101 switches and outputs a test signal to a multicore cable (sample cable) 100 having a plurality of core wires.

The terminal set detection means 102 detects terminal set data corresponding to each core wire at both ends of the multicore cable 100.

The recording means 103 records each terminal group data from the terminal group detecting means 102 as a heading item, and has a data recording area for each terminal group data.

The first time measuring means 104 measures each time from when the test signal is output to when each terminal set data is outputted, and stores the time in correspondence with each terminal set data in the data recording area of the recording means 103. Each measurement time is recorded.

The characteristic detection means 105 detects characteristic data for each terminal group based on the terminal group data of the recording means 103, and records each characteristic data in correspondence with each terminal group data in the data recording area of the recording means 103. It is something to do.

The second time measuring means 106 measures each time from when the test signal is output to when the characteristic data of each terminal group is output, and stores the time in the data recording area of the recording means 103 corresponding to each terminal group data. and record the measurement times.

The margin value setting means 111 sets at least one of the detection time, characteristic data, and characteristic data detection time corresponding to each terminal set data.
This is to set a margin value for each type.

The test data creation means 112 adds the margin value from the margin value setting means 111 to the detection time of each terminal set data, characteristic data, or characteristic data detection time from the recording means 103, and outputs test data. It is.

The test data recording means 113 records the test data from the test data creation means 112.

Further, the characteristic detecting means 105 described in (h) is composed of an insulation characteristic detecting means 107 or a withstand voltage characteristic detecting means 109, or an insulation characteristic detecting means 107 and a withstand voltage characteristic detecting means 109, and the second time measuring means 10G is configured to detect each insulation characteristic. It is comprised of a time measuring means 108 until the output of each breakdown voltage characteristic and a time measuring means 110 until the output of each breakdown voltage characteristic.

[For production]

According to the present invention, the terminal set detection means 102 records each terminal set data of the multicore cable 100 in the recording means 103 as a heading item, and each time until each terminal set data is obtained is recorded as a first time. The measuring means 104 measures and records each terminal set data in the recording hand 11103, and the recording means 1
The characteristic detection means 105 detects each characteristic data for each core wire based on each terminal group data of 03, records each terminal group data in the recording means 103, and records each time until each characteristic data is obtained. The time measurement means 106 of No. 2 measures and similarly records each terminal group data in the recording means 103.

Furthermore, the test data creation means 112 is connected to the recording means 103.
Margin value setting means 11 for each characteristic data and each time data in
Test data is created by adding the margin from 1 and recorded in the test data recording means 113.

〔Example〕

The present invention will be explained in detail below.

FIG. 2 is a block diagram showing an embodiment of the multi-core cable test data creation device according to the present invention.

First, before explaining the details of the present invention, its outline will be explained.

In FIG. 2, a switching circuit 3 is connected to both ends of a multicore cable 1 having a plurality of core wires.

This switching circuit 3 includes a continuity detection circuit 5. Insulation property detection circuit 13. A breakdown voltage characteristic detection circuit 17 is switched and connected.

The continuity detection circuit 5 includes a CPU 1 and a time measurement circuit 7.
However, the insulation characteristic detection circuit I3 includes the CPU I and the time measurement circuit 15, and the withstand voltage characteristic detection circuit 17 includes the CPU II.
and a time measurement circuit 19 are connected, and these time measurement circuits? , 15.19 are each connected to CPUI 1.

Continuity detection circuit 5. Insulation property detection circuit 13. The withstand voltage characteristic detection circuit 17 and time measurement circuits 15 and 19 are both CPUUI
It is controlled by a control circuit 9 controlled by CPU II, and is also controlled so that data can be input from the CPU II.

CPUI 1 has memory 21. Output terminal 23° printer 25a, CRT display 25b.

A test data creation circuit 27 is connected, and a margin setting circuit 29 is connected to the test data creation circuit 27.
A key input circuit 31 is connected to the margin setting circuit 29 and cputl.

Next, details of the multi-core cable test data creation device according to the present invention will be explained.

The multicore cable l is for sample use.9 For example, the third
As shown in the figure, a core wire 1a having terminals ゛l and 751
+ core wire 1b having terminals T2 and T52, terminals T3. T5
3 and T54, and each terminal T1 to T54... has a plurality of switch elements 3A.
It is connected to the movable contacts of the switching elements 3A to 3G of the switching circuit 3 consisting of the switching elements 3A to 3G.

The switching elements 3A to 3G of this switching circuit 3 are formed of relay circuits with one circuit and three contacts.
It has 92 switch elements 3A to 3G...

The three fixed contacts of each of the switching elements 3A to 3G in the switching circuit 3 each have a continuity detection port of 1/85. Insulation property detection circuit 13. The terminals T1 to T54 of the multicore cable 1 are connected to the withstand voltage characteristic detection circuit 17, and each terminal T1 to T54 of the multicore cable 1 is connected to the continuity detection circuit 5. Insulation property detection circuit 13. It is designed to be switched and connected to the breakdown voltage characteristic detection circuit 17.

The continuity detection circuit 5 in FIG. 2 includes the above-mentioned switch element 3A.
It is configured with 192 unit detection circuits 33 corresponding to 3G, . . . This unit detection circuit 33
As shown in the figure, a signal generation circuit 35 consisting of a TTL DC amplifier circuit that outputs a DC voltage of approximately 5V as a test signal.
, a receiving circuit 37 connected in series to the signal generating circuit 35 and having a comparator, and an input/output terminal 39 connected to a connection point between the signal generating circuit 35 and the receiving circuit 37, Generation circuit 35 and reception circuit 3
7, signals s,, s2 for controlling these 0N10FF
is available for input.

The input/output terminal 39 of each unit detection circuit 33 is connected to the switching circuit 3.
It is connected to the fixed contacts of each of the switch circuits 3A to 3G, etc., and the symbol DI+D2 in FIG. 1 is a protection diode.

When the signal generation circuit 35 is turned ON and the reception circuit 37 is turned on by the control signals SL and S2, the unit detection circuit 33 detects a 5V DC voltage from the signal generation circuit 35 via the input/output terminal 39. It is output as a signal and can be applied to any one of the terminals '1'1 to T54, . . . of the multicore cable 1.

On the other hand, the signal generating circuit 35 is OFF and the receiving circuit 37 is ON.
As a result, if the received signal from the single output terminal 39 is at a predetermined level or higher, the signal is output from the receiving circuit 37.

That is, the unit detection circuit 33 functions as a test signal output circuit, and also functions as a signal detection circuit.

The continuity detection circuit 5 causes the control circuit 9 to operate one of the unit detection circuits 33 as a test signal output circuit,
The remaining unit detection circuits 33 are made to function as test signal detection circuits, and the unit detection circuits 33 that are made to function as detection signal output times v3 and detection circuits are sequentially switched and controlled.

On the other hand, the CPU (central processing unit) 11 is an arithmetic unit.

It has an internal control device, an internal storage device, etc., and sequentially performs processing operations according to a predetermined program in the internal storage device or manual command input from the outside.

The core wire terminals connected to the unit detection circuits 33 that output test signals and the terminals connected to the unit detection circuits 33 to which the test signals are output are created as terminal set data.

For example, the control circuit 9 causes the unit detection circuit 33 connected to the terminal TI of the multicore cable 1 via the switching circuit 3 to function as a test signal output circuit, while the remaining terminal T2
The unit detection circuit 33 connected to ~T54 is made to function as a detection circuit, and the terminal T51 where the signal is conductive is connected to CP[Jll
At the same time, the terminal T1 and the terminal T51 are created as terminal set data of the core wire 1a. The same applies to the core wire 1b, the core wire IC, and so on.

In this way, continuity detection circuit 5. Control circuit 9 and CPU
11 detects which terminals of the core wires in the multicore cable 1 form a terminal group.

The CPUJI is configured to record terminal set data in the memory 21 as a heading item in a data recording area.

The memory 21 is an electronic recording medium whose writing and reading are controlled by CPU1, and is, for example, a general floppy disk or a built-in RAM type IC.
As shown in the figure, predetermined data recording areas B, C, D, E, F,
It has G, H, I, , J...

The time measuring circuit II'37 is controlled by the control circuit 9.

After the test signal 1.) is output from one unit detection circuit 33 in the continuity detection circuit 5, the time required until each terminal group data is obtained is measured and output to the CPUI 1. The CPU II has a function of recording each of these time data in the data recording area B for each terminal group data in the memory 21.

The insulation characteristic measuring circuit 13 is as shown in FIG.

A DC signal generator 41 that outputs a DC voltage of about 500V as a test signal, and an A/D converter that converts the DC current obtained from the multicore cable l in response to the application of the test signal.
An insulation characteristic data output section 43 outputs the insulation resistance value obtained by the conversion to the CPU II and the time measurement circuit 15, and one switch element 3A to 3G of the switching circuit 3 based on the terminal set data of the memory 21. Fixed contact I
Apply DC voltage to I, and switch to other switch elements 3A to 3G.
It consists of a switching section 45 that commonly connects the fixed contacts of .

It goes without saying that the terminal set data in the memory 21 is input to the switching unit 45 by the CPU.

This insulation characteristic measuring circuit 13 applies a DC voltage of 500 V to one of the core wires of the multicore cable 1 from the DC signal generator 41, and connects the remaining core wires in common.

The leakage current flowing through the commonly connected core wires is added to the insulation characteristic data output section 43 to detect the insulation resistance value, and each core wire 1
a, 1 bt 1 c..., the insulation resistance value is output to the CPU I.

The time measuring circuit 15 measures each time from outputting a DC voltage until a stable leakage current is obtained, and
CPU1t has a function to output these insulation resistance values and measurement times to memory 21 for each terminal group data.
It has the function of recording data in the data recording area E (see FIG. 5).

The breakdown voltage characteristic measuring circuit 17 is as shown in FIG.

An AC signal generator 47 outputs an AC current of about 500 V as a test signal, and the leakage current value obtained by A/D converting the AC current obtained from the multicore cable l by applying the test signal is calculated by the CPU 1 and time. The withstand voltage characteristic data output section 49 outputs to the measurement circuit 15, and one of the fixed contacts of one of the switch elements 3A to 3G of the switching circuit 3 based on the terminal set data in the memory 21 inputted by the CPU II. It consists of a switching section 51 that applies an alternating current, commonly connects the fixed contacts of the other switching elements 3A to 3G, . . . , and outputs the data to the withstand voltage characteristic data output section 43.

This withstand voltage characteristic measuring circuit 17 causes an AC current of 500 V to flow from the AC signal generator 47 to one of the core wires of the multicore cable 1, and outputs a leakage current flowing through the remaining commonly connected core wires to the withstand voltage characteristic data output section 49. In addition, leakage current values are detected and outputted as breakdown voltage characteristics for each core wire 1a, lb, IC, . . . .

The time measurement circuit 19 has a function of measuring each time from outputting an alternating current to each core wire 1a, lb, lc... until a stable leakage current is obtained, and outputting it to the CPU 11, cputt stores these voltage resistance characteristic values and measurement times for each terminal set data in the data recording areas H, I (
(See Figure 5).

The margin setting circuit 29 determines the detection time and insulation resistance value of the terminal set data recorded in the memory 21.

It has a function to set a margin for each of the insulation resistance measurement time and withstand voltage characteristics, and the test data creation circuit 27 adds the margin from the margin setting circuit 29 to each data in the memory 21 and creates each test data. It has the ability to create. This margin is determined in consideration of variations in the characteristics of the multicore cable 1 to be actually inspected.

The CPU II outputs the data recorded in the memory 21 to the test data creation circuit 27.

The test data created by the test data creation circuit 27 is transferred to the data recording areas C and F of the memory 21 again.

G, J (see Figure 5).

Note that the setting value in the margin setting circuit 29 is as follows.

One or more of the following are optional: terminal assembly data detection time, insulation resistance value, insulation resistance measurement time, and withstand voltage characteristics.

Moreover, it can also be set externally using the key input circuit 31.
The key input circuit 31 is also capable of directly controlling the CPUI 1.

Furthermore, cputt outputs the output data in the memory 21 and created test data from the output terminal 23 at any time,
It is individualized so that it can be output to b.

Note that the operations of the components centering on the CPU II described above will be further clarified by the operation explanation based on the following flowchart.

Next, the operation of the multi-core cable test data creation device of the present invention configured as described above will be explained using the flowchart shown in FIG.

The program starts and the CPU II and components start operating. After connecting the sample multicore cable 1 to the switching circuit 3 in step 200 and obtaining terminal set data and required time from the continuity detection circuit 5 and time measurement circuit 7 in step 201.

In step 202, the terminal set data and the required time are recorded in data recording areas A and B in the memory 21 as shown in FIG. 9(1).

In step 203, it is determined whether there are any unmeasured parts of the multicore cable 1, and if YES, the process returns to step 201 and the same operation is repeated.

If all the terminals have been inspected and the result in step 203 is No, then in step 204 the insulation characteristic test terminals of the multi-core cable 1 are determined based on the terminal set data recorded in the memory 21, and the step In step 205, the insulation resistance value and the required detection time are obtained from the insulation characteristic detection circuit 13 and the time measurement circuit 15, and in step 206, the insulation resistance value and the required measurement time are stored in the memory 21 as shown in FIG. 9(2). The data is recorded in the data recording area E.

Next, in step 207, it is determined whether there are any unmeasured locations,
If YES, the process returns to step 204 and repeats the same operation.

If step 207 is No, step 20
At step B, the terminals for voltage resistance characteristic testing of the multicore cable 1 are determined based on the terminal set data recorded in the memory 21, and at step 209, the leakage current value and detection time are determined from the voltage resistance characteristic detection circuit 13 and the time measuring circuit 19. get. In step 210, the leakage current value and the measurement time required are shown in FIG.
3) is recorded in the data recording areas H and f of the memory 21.

Then, in step 211, it is determined whether there are any unmeasured parts, and if YES, the process returns to step 208 and the same operation is repeated.

If step 211 is NO, test data is created by adding margin to the time required to obtain the terminal set data in memory 21 in step 212.

In step 213, a margin is added to the insulation resistance value in the memory 21 and the time required for measurement to create test data.

Further, in step 214, a margin is added to the leakage current value to create test data, and in step 2I5, the test data is stored in the data recording area of the memory 21 as shown in FIG. 9 (4) to (6). Record it as test data on C9F, G, and J and end.

Although FIG. 9 shows each test data individually according to its creation procedure for convenience, the recording state is recorded in a format as shown in FIG. 5.

When step 211 is completed, the various data recorded in the memory 21 can be printed out in step 216 via, for example, the printer 25a, and furthermore, although not shown, various data can be displayed on the CRT display 25b at any time. be.

For example, in a cable tester using the multi-core cable test data creation device of the present invention.

In the cable under test of the same type as the sample multicore cable l described above, a DC voltage is applied as an insulation test signal according to the test time data in the data recording area G of the memory 21, and the obtained insulation resistance value is recorded as data. It is tested whether the insulation resistance value is within the range of the insulation resistance value in the area F, and an alternating current is applied according to the test time data of the data recording area 1 in the memory 21, and the obtained value is within the range of the insulation resistance value in the data recording area J. is checked to see if it exceeds the value.

〔Effect of the invention〕

As explained above, the multi-core cable test data creation device of the present invention can conduct continuity tests for each core wire of a multi-core cable and acquire terminal set data in the minimum necessary time, and can accurately identify the continuity test for each core wire. It has the advantage that it is possible to test and detect highly accurate insulation and voltage resistance characteristic data in a short time, and that test data for each core wire with a margin added can be easily obtained from the obtained characteristic data.

Therefore, if the multi-core cable test data creation device of the present invention is used in a cable tester, the testing efficiency will be extremely high.

[Brief explanation of drawings]

FIG. 1 is a claim correspondence diagram showing the configuration of the multi-core cable test data creation device according to the present invention, FIG. 2 is a block diagram showing an embodiment of the multi-core cable test data creation device of the present invention, and FIG. The figure shows the multicore cable and switching circuit shown in Fig. 2, Fig. 4 is a circuit diagram showing the unit detection circuit that constitutes the continuity detection circuit shown in Fig. 2, and Fig. 5 shows the circuit diagram in the memory shown in Fig. 2. Figures 6 and 7 are diagrams explaining the recording area.
FIG. 8 is a flowchart showing the operation method of the present invention, and FIG. 9 explains the recording state in the memory that changes according to the operation shown in FIG. 8. This is a diagram. 1... Multi-core cable 3... Switching circuit 5... Continuity detection circuit 7... Time measurement circuit 9... Control circuit 11. ... CPU 13 ... Insulation property detection circuit 15.19 ... Time measurement circuit 17 ... Withstand voltage property detection circuit 21 ... Memory 27 ... ...Test data creation circuit 29...
- Margin setting circuit 33...Unit detection circuit 41...DC signal generation section 43...Insulation characteristic data output section 45.51...
・Switching unit 47...AC signal generation unit 49...Voltage characteristic data output unit 100...
・Multi-core cable 101...Test signal output means 102...Terminal assembly detection means 103...Recording means 104...First time measuring means 105... Characteristic detection means 106...Second time measurement means 107...Insulation property detection means 108, 110, time measurement means

Claims (4)

[Claims] (1) Test signal output means for switching and outputting a test signal to a multi-core cable having a plurality of core wires, terminal set detection means for detecting terminal set data for each core wire at both ends of the multi-core cable, and this terminal recording means for recording each terminal group data from the group detecting means as a heading item and having a data recording area for each terminal group data; a first time measuring means for measuring each time until the test signal is outputted from the test signal outputting means, and recording the measured times in the data recording area of the recording means in correspondence with the respective terminal group data; , a characteristic of detecting characteristic data for each terminal group based on each terminal group data of the recording means, and recording each of the characteristic data in the data recording area of the recording means in correspondence with the respective terminal group data. a detecting means, measuring each time from when a test signal is output from the test signal output means until each of the characteristic data is output from the characteristic detecting means, and recording each of the terminals to the data recording area of the recording means; a second time measuring means for recording measurement times corresponding to the set data; and setting a margin value for at least one of the detection time of each terminal set data, the each characteristic data, and the detection time of each characteristic data. margin value setting means for adding the margin value from the margin value setting means to the detection time of each terminal group data, the detection time of each characteristic data or the detection time of each characteristic data from the recording means, and outputting test data. 1. A multicore cable test data creation device, comprising: test data creation means for testing. (2) The multicore cable test according to claim 1, wherein the characteristic detecting means is an insulation characteristic detecting means, and the second time measuring means is a time measuring means until each insulation characteristic is output. data creation device. (3) The multi-core cable test according to claim 1, wherein the characteristic detecting means is a withstand voltage characteristic detecting means, and the second time measuring means is a time measuring means until each withstand voltage characteristic is output. data creation device. (4) The characteristic detecting means includes an insulation characteristic detecting means and a withstand voltage characteristic detecting means, and the second time measuring means comprises a time measuring means until each insulation characteristic is output and a time until each withstand voltage characteristic is output. The multicore cable test data creation device according to claim 1, which is a time measuring means.