JPS62248383A - Television sound demodulation circucit - Google Patents

Television sound demodulation circucit

Info

Publication number
JPS62248383A
JPS62248383A JP61091941A JP9194186A JPS62248383A JP S62248383 A JPS62248383 A JP S62248383A JP 61091941 A JP61091941 A JP 61091941A JP 9194186 A JP9194186 A JP 9194186A JP S62248383 A JPS62248383 A JP S62248383A
Authority
JP
Japan
Prior art keywords
circuit
signal
phase
output
audio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61091941A
Other languages
Japanese (ja)
Inventor
Norihiro Usuda
臼田 典弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP61091941A priority Critical patent/JPS62248383A/en
Publication of JPS62248383A publication Critical patent/JPS62248383A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)

Abstract

PURPOSE:To cancel a buzzing component in a detection sound signal by providing an adjusting circuit and an arithmetic circuit, adjusting the phase and the amplitude of automatic frequency (AFC) control signal, thereafter supplying to the arithmetic circuit and adding in a reversed polarity to a detecting sound signal from a sound detecting circuit or subtracting in the same phase. CONSTITUTION:The output signal of an LPF 12 is supplied to a phase adjusting device 13, herein, the phase is set to the buzzing component in the detecting sound signal of the sound detecting circuit 18, further, the buzzing component is set to the amplitude in a level adjusting device 14, and thereafter, the output signal is supplied to the arithmetic circuit 15. The detecting sound signal of the sound detecting circuit 18 has the phase adjusted through a phase adjusting device 16 and is supplied to the arithmetic circuit 15. In the arithmetic circuit 15, when an input AFC signal is adjusted so as to be the same phase as the bussing component in the FM detecting sound signal, the subtraction is performed and when it is adjusted so as to be the reversed phase to the buzzing component, the addition is performed. As a result of this, the sound signal in which the buzzing component is cancelled is taken out to an output terminal from arithmetic circuit 15.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はテレビジョン音声復調回路に係り、特にテレビ
ジョン音声信号をインターキャリア方式で受信し復調す
るテレビジョン音声復調回路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a television audio demodulation circuit, and more particularly to a television audio demodulation circuit that receives and demodulates television audio signals using an intercarrier method.

従来の技術 第3図は従来の音声復調回路の一例のブロック系統図を
示す。同図中、アンテナ1で受信されたテレビジョン信
号は、チューナ2により中間周波信号に変換された後、
映像IF増幅回路3を通して映像検波回路4に供給され
る。また、映像IF増幅回路3とチューナ2との間には
自動周波数制御回路(AFC回路)5及び低域フィルタ
(LPF)6が設けられている。
BACKGROUND OF THE INVENTION FIG. 3 shows a block diagram of an example of a conventional audio demodulation circuit. In the figure, a television signal received by an antenna 1 is converted into an intermediate frequency signal by a tuner 2, and then
The signal is supplied to the video detection circuit 4 through the video IF amplifier circuit 3. Furthermore, an automatic frequency control circuit (AFC circuit) 5 and a low-pass filter (LPF) 6 are provided between the video IF amplifier circuit 3 and the tuner 2.

一般に、カラー受像機では、色副搬送波と音声搬送波間
のビートを少なくしたり、色信号に対する帯域特性を良
好に保ったり、輝度信号に対する過渡応答を良好に保つ
ために、ブユーナ2の局部発振周波数変化を十分小さく
抑える必要がある。
In general, in color receivers, the local oscillation frequency of the buyuna 2 is Changes need to be kept sufficiently small.

このため、AFC回路5が設番ノられており、AFC回
路5は映像中間周波数の変化に対応してレベルの変化す
るAFC制御端子間電圧(AFC信号)を発生して、L
 P F 6を介してチューナ2へ出力し、これにより
、チューナ2の局部発成周波数の誤差を所定範囲(例え
ば、±100kl−1z以内程度)に抑える。
For this reason, an AFC circuit 5 is installed, and the AFC circuit 5 generates an AFC control terminal voltage (AFC signal) whose level changes in response to changes in the video intermediate frequency.
The signal is output to the tuner 2 via the P F 6, thereby suppressing the error in the locally generated frequency of the tuner 2 within a predetermined range (for example, within ±100kl-1z).

次に、映像検波回路4により中間周波信号をΔM検波し
て得られたカラー映像信号と、映像搬送波と音声搬送波
との差のビート成分(音声インターキャリア信号)とよ
りなる4、5M Hzの音声中間周波信号は、4.5M
1−12の帯14阻止フィルタ(BEF)7を通してカ
ラー映像信号のみとされて出力端子8へ出力される一方
、帯域フィルタ(BPF)9により音声インタ−4ニヤ
リア信号のみが分離−波されて4.5Ml−(ZFM検
波回路10に供給され、ここで、FM検波されて音声信
号が取り出され出力端子11へ出力される。
Next, a color video signal obtained by ΔM detection of the intermediate frequency signal by the video detection circuit 4 and a 4 to 5 MHz audio composed of a beat component (audio intercarrier signal) of the difference between the video carrier wave and the audio carrier wave are generated. The intermediate frequency signal is 4.5M
Only the color video signal is passed through the band 14 rejection filter (BEF) 7 of 1-12 and outputted to the output terminal 8, while only the near rear signal of the audio interface 4 is separated by the band pass filter (BPF) 9. .5Ml-(is supplied to the ZFM detection circuit 10, where it is FM detected, the audio signal is taken out, and is output to the output terminal 11.

発明が解決しようとする問題点 しかるに、送信側で振幅変調を行なった際に発生してし
まった位相変調や、受信側の映像IF増幅回路3内のA
GC回路によって発生する位相変調を含んだ信号が、映
像検波回路4に入力された場合、映像搬送波の位相変調
の影響を受けるため、パズ音が発生してしまうという問
題点があった。
Problems to be Solved by the Invention However, the phase modulation that occurs when amplitude modulation is performed on the transmitting side and the A in the video IF amplifier circuit 3 on the receiving side.
When a signal containing phase modulation generated by the GC circuit is input to the video detection circuit 4, it is affected by the phase modulation of the video carrier wave, causing a problem in that a puzzling sound is generated.

この場合、特に送信側の位相変調によるパズは、受信側
で改善することができないという問題点があった。
In this case, there is a problem in that the puzzling caused by phase modulation on the transmitting side cannot be improved on the receiving side.

そこで、本発明はへFC回路の出力A F C信号をパ
ズ低減用信号として分岐して取り出して検波音声信号と
演算することにより、上記問題点を解決したテレビジョ
ン音声復調回路を提供することを目的とする。
SUMMARY OF THE INVENTION Therefore, the present invention aims to provide a television audio demodulation circuit which solves the above-mentioned problems by branching and extracting the output AFC signal of the FC circuit as a puzzling signal and calculating it with a detected audio signal. purpose.

問題点を解決するための手段 本発明になるテレビジョン音声復調回路は、AFC回路
の出力AFC信号の位相及び振幅を夫々調整する調整回
路と、調整回路の出力信号と音声検波回路の出力検波音
声信号との加算又は減算を行なう演算回路とよりなる。
Means for Solving the Problems The television audio demodulation circuit according to the present invention includes an adjustment circuit that adjusts the phase and amplitude of the AFC signal output from the AFC circuit, and an output signal of the adjustment circuit and the detected audio output of the audio detection circuit. It consists of an arithmetic circuit that performs addition or subtraction with signals.

作用 AFC回路の出力へFC信号は、送信側及び受信側にお
ける映像搬送波の位相変調を検波した波形となる。この
映像搬送波の位相変調は、音声検波回路にて検波されて
パズとなる。従って、AFC4:5号とパズとは相似の
波形となる。
The FC signal output from the operational AFC circuit has a waveform obtained by detecting the phase modulation of the video carrier wave on the transmitting side and the receiving side. This phase modulation of the video carrier wave is detected by an audio detection circuit and becomes a puzzle. Therefore, AFC No. 4:5 and Puzzle have similar waveforms.

上記AFC信号はパズ成分が最小となるよう、その位相
及び振幅が調整された後、演算回路に供給され、そこで
音声検波回路よりの検波音声信号と逆極性で加算又は同
相で減算される。これにより、検波音声信号中のパズ成
分が略4;ヤンセルされる。
After the phase and amplitude of the AFC signal are adjusted to minimize the puzzling component, the signal is supplied to an arithmetic circuit, where it is added with the opposite polarity or subtracted with the same phase as the detected audio signal from the audio detection circuit. As a result, the puzzle component in the detected audio signal is canceled by approximately 4 times.

実施例 第1図は本発明になるテレビジョン音声検波回路の一実
施例のブロック系統図を示す。同図中、第3図と同一構
成部分には同一の符号を付し、その説明を省略する。第
1図において、前記AFC回路5の出力AFC信号は二
分岐され、一方は、前記LPF6へ供給され、他方はL
PFl 2に供給される。
Embodiment FIG. 1 shows a block diagram of an embodiment of a television audio detection circuit according to the present invention. In the figure, the same components as those in FIG. 3 are denoted by the same reference numerals, and the explanation thereof will be omitted. In FIG. 1, the output AFC signal of the AFC circuit 5 is branched into two, one of which is supplied to the LPF 6, and the other is supplied to the LPF 6.
PFl 2 is supplied.

しPF12はへFC信号の帯域を制限し、ギャンセル1
べきパズの帯域を決定するだめの低域フィルタテアリ、
位相El!!!13.16、L/ ヘ/L/ H整器1
4及び演算回路15と共にパズキャンセラー17を構成
している。ここで、LPFI 2の出力信号は位相調整
器13に供給され、ここで帯域フィルタ9及びFM検波
回路10よりなる音声検波回路18の検波音声信号中の
パズ成分(位相変調信号成分)と位相を略合わされ、更
にレベル調整器14で上記パズ成分と振幅を合わされた
後演算回路15に供給される。
Then, PF12 limits the band of the FC signal to
The low-pass filter that determines the power-puzzle band,
Phase El! ! ! 13.16, L/H/L/H rectifier 1
4 and the arithmetic circuit 15 constitute a puzzle canceller 17. Here, the output signal of the LPFI 2 is supplied to the phase adjuster 13, which adjusts the phase with the puzzle component (phase modulation signal component) in the detected audio signal of the audio detection circuit 18 consisting of the bandpass filter 9 and the FM detection circuit 10. The signal is approximately matched, and the amplitude is matched with the above-mentioned puzzle component by the level adjuster 14, and then the signal is supplied to the arithmetic circuit 15.

一方、音声検波回路18の検波音声信号は位相調整″1
16を介して位相を調整された後、演算回路15に供給
される。このように、本実施例では位相調整器を2ケ所
に設けることにより、演算回路15にて精度良くパズ低
減用の演算が行なわれるよう構成されている。また、本
実施例における位相調整は例えば工場内等で、作業者が
測定器を見ながら行なわれる。
On the other hand, the detected audio signal of the audio detection circuit 18 has a phase adjustment of "1".
After the phase is adjusted via 16, the signal is supplied to the arithmetic circuit 15. In this way, in this embodiment, by providing phase adjusters at two locations, the arithmetic circuit 15 is configured to perform calculations for reducing puzzles with high precision. Further, the phase adjustment in this embodiment is performed, for example, in a factory or the like by an operator while looking at a measuring instrument.

演算■路15は位相調整された検波音声信号と位相及び
振幅調整されたAFC信号とが夫々供給され、これらの
入力信号を演算(加算又は減算)する。ここで、上記の
入力AFC信号がFM検波音声信号中のパズ成分と大略
同相になるよう調整したとぎには減算、逆相になるよう
調整したとぎは加口するよう構成されており、この結果
、演算回路15より出力端子1つへパズ成分が大略キt
2ンセルされた音声信号が取り出される。
The calculation path 15 is supplied with a phase-adjusted detected audio signal and a phase- and amplitude-adjusted AFC signal, respectively, and calculates (adds or subtracts) these input signals. Here, when the input AFC signal is adjusted to be approximately in phase with the puzzle component in the FM detected audio signal, it is subtracted, and when it is adjusted to be in opposite phase, it is added. , the puzzle component is roughly transmitted from the arithmetic circuit 15 to one output terminal.
The two celled audio signals are extracted.

次に、本発明の具体的回路について説明するに、第2図
は本発明の具体的回路の一実施例を示1゜同図中、第1
図と同一構成部分には同一符号を付しである。本実施例
は、前記映像IF増幅回路3゜映像検波回路4.AFC
回路5及びFM検波回路10として集積回路(IC)2
0<例えば、東芝製の形式TA7680AP/TA76
81AP)を用いたことに特徴を有する。上記IC20
には、バイアス回路、FM検波回路、減衰器、音声アン
プ、映像検波回路、リミッタ、AFT検波回路。
Next, to explain the specific circuit of the present invention, FIG. 2 shows one embodiment of the specific circuit of the present invention.
Components that are the same as those in the figures are given the same reference numerals. In this embodiment, the video IF amplification circuit 3.degree. video detection circuit 4. AFC
Integrated circuit (IC) 2 as circuit 5 and FM detection circuit 10
0<For example, Toshiba model TA7680AP/TA76
81AP) is used. Above IC20
Includes bias circuit, FM detection circuit, attenuator, audio amplifier, video detection circuit, limiter, and AFT detection circuit.

映像アンプ、ノイズインバータ及びAGC回路等が含ま
れている。また、ここで、■〜θは夫々■C20のビン
番号を示している。
It includes a video amplifier, noise inverter, AGC circuit, etc. Further, here, ■ to θ respectively indicate the bin numbers of ■C20.

IC20のビン■及び■には前記チューナ2の出力中間
周波信号が供給され、また、ビン■より出力された検波
映像信号は前記BPF9を介して音声インターキャリア
信号とされてビンO及びOに供給される。更に、IC2
0のビンOより出力されるへFC信号は前記LPF6を
介してチューナ2へ出力される。また、IC20のビン
0からもAFC信号が出力され、更に、ビン■からは検
波?11信号が出力される。
The output intermediate frequency signal of the tuner 2 is supplied to the bins ■ and ■ of the IC 20, and the detected video signal output from the bin ■ is converted into an audio intercarrier signal via the BPF 9 and is supplied to the bins O and O. be done. Furthermore, IC2
The FC signal output from the bin O of 0 is output to the tuner 2 via the LPF 6. Also, the AFC signal is output from bin 0 of IC20, and the detection signal is output from bin ■. 11 signals are output.

また、前記LPF12は抵抗R1及びコンデン’I C
+よりなり、前記位相調整器13はコイルし及びコンデ
ンサC2、C3よりなり、前記レベル調整器14はat
ti増幅器21.抵抗R2及び可変抵抗Rvよりなり、
前記演算回路15に相当する加0回路22は演算増幅器
23及び抵抗R3゜R4よりなる。
Further, the LPF 12 includes a resistor R1 and a capacitor IC.
The phase adjuster 13 consists of a coil and capacitors C2 and C3, and the level adjuster 14 consists of at
ti amplifier 21. Consisting of a resistor R2 and a variable resistor Rv,
The adder circuit 22 corresponding to the arithmetic circuit 15 includes an operational amplifier 23 and resistors R3 and R4.

ここで、IC20のビンOは抵抗R1及びコンデンサC
1を直列に介して接地される。この抵抗R1及びコンデ
ンサC1の接続点は、コンデンサC2を介して接地され
ると共に、コイルし及びコンデンサC3を直列に介して
接地される。このコイルし及びコンデンサC3の接続点
は抵抗R2を介して演算増幅器21の反転入力端子に接
続される。演算増幅器21の非反転入力端子は接地され
、その出力端子と上記反転入力端子及び抵抗R2の接続
点との間には可変抵抗Rvが接続される。
Here, bin O of IC20 is resistor R1 and capacitor C
1 in series to ground. The connection point between the resistor R1 and the capacitor C1 is grounded via a capacitor C2, and is also grounded via a coil and a capacitor C3 connected in series. The connection point between this coil and capacitor C3 is connected to the inverting input terminal of operational amplifier 21 via resistor R2. The non-inverting input terminal of the operational amplifier 21 is grounded, and a variable resistor Rv is connected between its output terminal and the connection point between the inverting input terminal and the resistor R2.

一方、IC20のビン■よりの出力検波音声信号は位相
調整器16及び抵抗R3を介して演算増幅器23の反転
入力端子に供給される。ここで、上記演算増幅器21の
出力端子及び可変抵抗Rvの接続点は抵抗R4を介しC
演f$増幅2S23の反転入力端子及び抵抗R3の接続
点に接続される。
On the other hand, the output detected audio signal from the bin 2 of the IC 20 is supplied to the inverting input terminal of the operational amplifier 23 via the phase adjuster 16 and the resistor R3. Here, the connection point between the output terminal of the operational amplifier 21 and the variable resistor Rv is connected to C through the resistor R4.
It is connected to the connection point between the inverting input terminal of the f$ amplifier 2S23 and the resistor R3.

演算増幅器23の非反転入力端子は接地され、その出力
端子は音声信号出力端子24に接続される。
A non-inverting input terminal of the operational amplifier 23 is grounded, and an output terminal thereof is connected to the audio signal output terminal 24.

ここで、IC20のビンOよりの出力AFC信号はLP
F12を介して移相1111m!器13に供給され、そ
こで所定は移相される。この位相調整器13の移相量は
固定であるが、可変できるようになっていてもよい。こ
の回路定数は前記パズ成分の位相とパズ除去信号(すな
わち、AFC信号)との位相を合わせるように設定しで
ある。レベル調整器14は可変抵抗Rvの抵抗値に応じ
てその利得が可変制御される反転増幅器であり、位相調
整器13の出力信号レベルをパズ成分と略等しくなるよ
うに調整した後、抵抗R4を介して演算増幅器23の反
転入力端子へ出力する。
Here, the output AFC signal from bin O of IC20 is LP
Phase shift 1111m via F12! 13, where the predetermined phase is shifted. The amount of phase shift of this phase adjuster 13 is fixed, but may be variable. This circuit constant is set so that the phase of the above-mentioned puzzling component and the phase of the puzzling removal signal (ie, AFC signal) are matched. The level adjuster 14 is an inverting amplifier whose gain is variably controlled according to the resistance value of the variable resistor Rv, and after adjusting the output signal level of the phase adjuster 13 to be approximately equal to the puzzle component, the resistor R4 is The signal is output to the inverting input terminal of the operational amplifier 23 via the inverting input terminal.

このようにして、加算回路22にて位相調整された検波
音声信号と位相及びレベル調整されたAFC信号が加締
され、よって、出力端子24へ1M検波された音声信号
中のパズ成分が略相殺除去された音声信号が出力される
In this way, the phase-adjusted detected audio signal and the phase- and level-adjusted AFC signal are combined in the adder circuit 22, and therefore, the puzzle component in the 1M detected audio signal sent to the output terminal 24 is substantially canceled out. The removed audio signal is output.

なお、位相調整器は必ずしも2ケ所に設ける必要はなく
、位相調整器″33及び16のうち、いずれか一方のみ
を設けるようにしてもよい。また、本実施例では、チュ
ーナ2の局部発揚周波数制御用及びパズ検波用としてA
FC回路5を共用したが、パズを検波する専用のAFC
回路を別途設けてもよい。更に、位相調整器13及びレ
ベル調整器 14の接続順序を入替えてもよいことは勿
論である。
Note that the phase adjusters do not necessarily need to be provided at two locations, and only one of the phase adjusters "33 and 16" may be provided. A for control and puzzle detection
Although the FC circuit 5 is shared, there is a dedicated AFC for detecting the puzzle.
A separate circuit may be provided. Furthermore, it goes without saying that the connection order of the phase adjuster 13 and the level adjuster 14 may be changed.

発明の効果 上述の如く、本発明によれば、AFC回路の出力AFC
信号をパズ低減用信号とに分岐して取り出して検波音声
信号と演算するようにしたので、送信側及び受信側の位
相変調によるパズを低減することができ、また、AFC
回路を共用でき、回路構成をそれほど複雑にすることな
く構成できる等の特長を右する。
Effects of the Invention As described above, according to the present invention, the output AFC of the AFC circuit
Since the signal is split into a puzzling reduction signal and the signal is taken out for calculation with the detected audio signal, it is possible to reduce the puzzling caused by phase modulation on the transmitting side and the receiving side.
It has features such as the ability to share circuits and the ability to configure the circuit configuration without making it too complicated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明になるテレビジョン音声復調回路の一実
施例を示すブロック系統図、第2図は本発明の一実施例
を示す具体的回路図、第3図は従来のテレビジョン音声
復調回路の一例を示寸ブ[1ツク系統図である。 5・・・自動周波数制御回路(へFG回路)、12・・
・低域フィルタ(LPF)、13.16・・・位相調整
器、14・・・レベル調整器、15・・・演算回路、1
7・・・パズキせンセラー、18・・・音声検波回路、
19.24・・・音声信号出力端子、20・・・集積回
路(tc)、21.23・・・演算増幅器、22・・・
加韓回路、C1〜C8・・・コンデンサ、し・・・コイ
ル、R1へ・R4・・・抵抗、Rv・・・可変抵抗。 特許出願人 日本ビクター株式会社 第2図
FIG. 1 is a block diagram showing an embodiment of a television audio demodulation circuit according to the present invention, FIG. 2 is a specific circuit diagram showing an embodiment of the present invention, and FIG. 3 is a conventional television audio demodulation circuit. This is a block system diagram showing an example of the circuit. 5... Automatic frequency control circuit (FG circuit), 12...
・Low pass filter (LPF), 13.16... Phase adjuster, 14... Level adjuster, 15... Arithmetic circuit, 1
7... Pazuki teacher, 18... Audio detection circuit,
19.24... Audio signal output terminal, 20... Integrated circuit (TC), 21.23... Operational amplifier, 22...
Korea circuit, C1-C8...capacitor,...coil, to R1/R4...resistance, Rv...variable resistor. Patent applicant: Victor Japan Co., Ltd. Figure 2

Claims (1)

【特許請求の範囲】[Claims] インターキャリア方式のテレビジョン音声復調回路にお
いて、チューナの局部発振周波数を制御するための自動
周波数制御回路の出力信号を分岐して取り出し、その位
相及び振幅を夫々調整する調整回路と、該調整回路の出
力信号と音声検波回路の出力検波音声信号との加算又は
減算を行ないパズの低減された検波音声信号を出力する
演算回路とよりなることを特徴とするテレビジョン音声
復調回路。
An intercarrier type television audio demodulation circuit includes an adjustment circuit that branches and takes out the output signal of an automatic frequency control circuit for controlling the local oscillation frequency of a tuner, and adjusts the phase and amplitude of the output signal, respectively; 1. A television audio demodulation circuit comprising: an arithmetic circuit that performs addition or subtraction between an output signal and a detected audio signal output from an audio detection circuit and outputs a detected audio signal with reduced puzzling.
JP61091941A 1986-04-21 1986-04-21 Television sound demodulation circucit Pending JPS62248383A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61091941A JPS62248383A (en) 1986-04-21 1986-04-21 Television sound demodulation circucit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61091941A JPS62248383A (en) 1986-04-21 1986-04-21 Television sound demodulation circucit

Publications (1)

Publication Number Publication Date
JPS62248383A true JPS62248383A (en) 1987-10-29

Family

ID=14040617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61091941A Pending JPS62248383A (en) 1986-04-21 1986-04-21 Television sound demodulation circucit

Country Status (1)

Country Link
JP (1) JPS62248383A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5510407A (en) * 1992-03-30 1996-04-23 Daikin Industries Ltd. Mold release agent composition

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5690074A (en) * 1979-12-24 1981-07-21 Rikagaku Kenkyusho Preparation of sesquiterpene compound

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5690074A (en) * 1979-12-24 1981-07-21 Rikagaku Kenkyusho Preparation of sesquiterpene compound

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5510407A (en) * 1992-03-30 1996-04-23 Daikin Industries Ltd. Mold release agent composition

Similar Documents

Publication Publication Date Title
US4814715A (en) Mixer arrangement for suppression of oscillator interference in quadrature demodulators
US4955078A (en) Frequency difference detector (FDD) having automatic gain control and a carrier modulated receiver including the FDD
US4237485A (en) Buzz cancelling system for television receiver
JPH0523553B2 (en)
US5134723A (en) Radio sensitivity enhancer
JPH0380364B2 (en)
JPS62248383A (en) Television sound demodulation circucit
JPS6130347Y2 (en)
JPS5854691B2 (en) Stereo demodulation method
EP0577419B1 (en) Signal demodulating apparatus for a reproduced video signal
JP2552008B2 (en) Noise canceller circuit
JPS61163780A (en) Television receiver
JPS6111012B2 (en)
JPS6221090Y2 (en)
JPS6347030B2 (en)
JP3335226B2 (en) Receiving machine
JP3268083B2 (en) FM receiver
JPS6136428B2 (en)
JPH05291986A (en) Automatic gain control circuit
JPH04335174A (en) Tracking receiver
JPH04192770A (en) Intermediate frequency signal processor
JPH05153523A (en) Television signal reception circuit
JPS62118681A (en) Television audio receiver
JPH0114753B2 (en)
JPS5847101B2 (en) diversity receiver