JPS62245710A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To optimize the arrangement of parts and the design of patterns and to reduce number of parts by branching an output current of a couple of differential amplifiers and feeding the result to a load thereby simplifying the constitution of an input section. CONSTITUTION:FETs Q11, Q12 constitute a differential amplifier, a gate of the FET Q11 is connected to an input terminal 11 and to ground via a resistor R1, and the gate of the FET Q12 is connected directly to ground. FETs Q13-Q16 are cascode transistors(TR), each base is connected to a positive electrode of a constant voltage V11, the emitter of the TRs Q13, Q14 is connected to the drain of the TR Q11 and the emitter of the TRs Q15, Q16 is connected to the drain of the TR Q12. A drain current of the FETs Q11, Q12 is branched by the TRs Q13, Q14 or the TRs Q15, Q16 and outputted as a collector current of the TRs Q13-Q16. Thus, the input circuit is a couple of differential amplifiers only and the arrangement of parts and pattern design on the printed circuit board are simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an amplifier circuit having a differential pair configuration, and more particularly to a differential amplifier circuit in which problems in mounting an input circuit section are improved.

[Prior Art] As a conventional circuit of this type, there is one shown in FIG. In the figure, Ql, Q2, Q3, and Q4 are respectively FE
T, each forming a differential amplifier. Ql, Q
Each gate of 3 is connected to input terminal 1 and grounded by bias resistor R1. Each gate of Q2 and Q4 is grounded.

However, in the case of a negative feedback amplifier, it becomes the input terminal for the feedback signal.

05 to Q8 are cascode transistors, with constant voltage V
1. It is coupled to the source of the FET by V2, and the FE
This reduces the Miller effect caused by the feedback capacitance of T. Current sources 11 and 12 are constant currents for operating the differential amplifier, 1
3.14 is a constant IF current for increasing the constant voltages v1 and v2. , 05 to Q8 are connected to resistors R2 to R5, and the other ends are connected to a positive Ti source +8 and a negative power source -B.

On the other hand, the collectors of transistors 05-Q8 are connected to output terminals 2-
5 and output.

In this configuration, when a signal is applied to the input terminal 1, an output voltage in phase with the input signal is obtained at the output terminal 3.5, and an output voltage in phase opposite to the input signal is obtained at the output terminal 2.4. can get.

Such a circuit is used when it is desired to drive a load as symmetrically as possible, such as in an audio power amplifier. That is, in order to make the second and subsequent stages a symmetrical circuit in positive and negative directions, differential amplifiers are provided at output terminals 2 to 5 of FIG. 4, respectively, as shown in the figure. In order to facilitate signal transmission to this circuit, FE is normally used in the first stage as shown in the figure.
A configuration with positive and negative symmetry is adopted for D01 to Q4.

[Problems to be Solved by the Invention] In such a conventional configuration, the number of parts in the input circuit portion is large, and the circuit configuration is also 11In. In addition, in the input circuit section, depending on the routing of the input, ground, negative feedback signals, etc., performance such as residual hum and distortion may deteriorate due to the influence of flux generated from the power transformer or high current section of the amplifier. Therefore, in conventional circuits where the area around the input circuit is complicated, it is difficult to arrange components and set patterns on the printed circuit board, and desired performance may not be obtained.

[Means for Solving the Problems] The present invention is based on the problems of the prior art, and the circuit is divided by dividing the output currents of a pair of differential amplifiers and supplying them to the loads. The purpose is to provide a high-performance differential amplifier circuit by simplifying it and solving mounting problems on a printed circuit board.

[Summary of the Invention] The present invention includes first and second transistors configured differentially, and a plurality of transistors each connected in cascode to the collectors (drains) of the first and second transistors. The output from the collector (drain) of cascode-connected transistors is blue.

Embodiments of the Invention] Examples of the invention will be described below with reference to the drawings. In the embodiment shown in FIG. 1, FETs Qll and Q12 constitute a differential amplifier. Among these, the gate of FETQll is connected to input terminal 11 and grounded through resistor R1. Furthermore, the pins 1 to 1 of FETQ12 are directly grounded.

Q13 to Q16 are cascode transistors, and each base is connected to the positive side of constant voltage V11. The emitters of transistors Q13 and Q14 are connected to the drain of Qll, and the emitters of transistors Q15.016 are connected to Q12, respectively.
connected to the drain of the rel. The negative side of f1i voltage V11 (7) is connected to the common source of FETs Qll and Q12, and further connected to a current source 111. Further, a current is supplied to the constant voltage (11) by a current source 111. Resistors R13 to R16 are connected to the collectors of transistors Q13 to Q16.
is connected to the positive power supply +B through the output terminal 13
~16.

In such a configuration, the drain current of F E TQll, Q12 is the same as that of transistors Q13, Q14, or Q
15, shunted by Q16, transistors Q13~
It is output as the collector current of Q16. Therefore, a signal with the opposite phase to the input signal is output to the output terminals 13 and 14,
A signal in phase with the input signal is output to the output terminals 15 and 16. By connecting a differential amplifier to each of the output terminals 13 to 16, for example, as shown in the figure, the load can be driven symmetrically in positive and negative directions.

The input circuit portion of this circuit is only a pair of differential amplifiers, and therefore component arrangement and pattern routing on the printed circuit board can be simplified. Also, compared to conventional configurations, constant current circuits, etc. can be reduced.

FIG. 2 shows a second embodiment of the present invention, in which resistors R23 to R26 are connected to the emitters of transistors 013 to Q16 to stabilize the current shunting ratio.

Briefly, FIG. 3 shows a third embodiment of the invention, in which the resistor R
13, R15 are connected to the power supply +81, and resistors R14, R
16 is connected to another power supply +82.

In each of the above embodiments, the negative side of the voltage source V11 may be grounded or may be a current source! 11.112, voltage source V
11 may be a resistor. Further, the transistors of the differential amplifier may be bipolar transistors. It is also conceivable to configure it with elements of opposite polarity. Furthermore, it goes without saying that FETs may be used as the cascode transistors.

Furthermore, when more output terminals are required, a desired number of transistors may be added by connecting them in parallel to the transistors Q13 to Q16.

[Effects of the Invention] As described above, according to the present invention, since the output current of the pair of aeai width amplifiers is divided and derived to the load, the configuration of the input section is simplified, and the arrangement of parts and The pattern routing is optimized and the number of parts is reduced, making it easy to perform.

[Brief explanation of drawings]

1 to 3 are circuit diagrams showing embodiments of the first arrival amplifier circuit according to the present invention, and FIG. 4 is a circuit diagram showing a conventional first arrival amplifier circuit. Qll, Q12... FET Q13~016... (Langister vF patent applicant Pioneer Co., Ltd.

Claims (1)

[Claims] first and second transistors configured differentially;
and a plurality of transistors each connected in cascode to the collector (drain) of the second transistor,
A differential amplifier circuit characterized in that an output is obtained from the collector (drain) of the cascode-connected transistor.