JPS62241081A - Thinning device for picture signal - Google Patents

Thinning device for picture signal

Info

Publication number
JPS62241081A
JPS62241081A JP61084541A JP8454186A JPS62241081A JP S62241081 A JPS62241081 A JP S62241081A JP 61084541 A JP61084541 A JP 61084541A JP 8454186 A JP8454186 A JP 8454186A JP S62241081 A JPS62241081 A JP S62241081A
Authority
JP
Japan
Prior art keywords
thinning
circuit
width
picture data
picture element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61084541A
Other languages
Japanese (ja)
Other versions
JP2532383B2 (en
Inventor
Yuichi Deura
雄一 出浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic System Solutions Japan Co Ltd
Original Assignee
Matsushita Graphic Communication Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Graphic Communication Systems Inc filed Critical Matsushita Graphic Communication Systems Inc
Priority to JP61084541A priority Critical patent/JP2532383B2/en
Publication of JPS62241081A publication Critical patent/JPS62241081A/en
Application granted granted Critical
Publication of JP2532383B2 publication Critical patent/JP2532383B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Image Processing (AREA)
  • Editing Of Facsimile Originals (AREA)

Abstract

PURPOSE:To perform recording without deteriorating the quality of picture data obtained before thinning by setting a picture element correcting circuit at the preceding stage of a thinning circuit and always securing at least a single picture element of the input picture data obtained before thinning. CONSTITUTION:The output time width of a monostable multivibrator MMV11 is decided by the density of the main scan line of input picture data. The output signal of the MMV11 is ORed with the input picture data via an OR gate 12 and an output signal (c) is sent to a thinning circuit 2 and then inputted to line memories A and B of the circuit 2 respectively to be written and read by the write and read address clocks (d) and (e) respectively. The both memories A and B are switched with each other by the memory switch signal (h) and the thinned signals are delivered from an OR gate 23 of the circuit 2 after correction of the picture element width. In such a way, the signal thinning is carried out after correction of the picture element width, therefore the minimum picture element of the input picture data is not deleted and remains.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は新聞社等に詔ける新聞製作時モニタ用ゲラプリ
ンタの上位cpu(中央処理装置)からの画信号(画像
データ)を間引く時に使用して好適な画信号間引き装置
に関する。
[Detailed Description of the Invention] Industrial Field of Use The present invention is used to thin out image signals (image data) from the host CPU (central processing unit) of a galley printer for monitoring during newspaper production, which can be sent to newspaper companies, etc. The present invention relates to a suitable image signal thinning device.

従来の技術 従来のこの種の画信号間引き技術について、例えば新聞
社等で一般的に使用されている主走査線密度の間引きを
例に採り説明する。
2. Description of the Related Art A conventional image signal thinning technique of this type will be explained by taking as an example thinning of main scanning line density, which is commonly used in newspaper companies and the like.

ここで、仮に454本/インチと681本/インチの二
種類の線密度を考えると、ゲラプリンタ(静電気記録装
置)は454ドツト、7インチの性能を有するものにつ
くっておき、681本/インチのデータから(454=
681 X2/3 )3ビツトに1ビットの割合でデジ
タル的に間引いて、454本/インチの線密度を得る手
段が採れる。
Now, if we consider two types of linear densities, 454 lines/inch and 681 lines/inch, a galley printer (electrostatic recording device) is made with a performance of 454 dots and 7 inches, and 681 lines/inch. From the data of (454=
681 x 2/3) Digital thinning at a ratio of 1 to 3 bits can be used to obtain a line density of 454 lines/inch.

というのは、最も望ましいのは記録素子が454本/イ
ンチ又は681本/インチに切り替れば良いが、記録ヘ
ッドに681本/インチの記録素子を備えたゲラプリン
タ(静電気記録装置)等を製作することは困難であり、
仮に製作できたとしても464本/インチ用と681本
/インチ用の2本の記録素子を組合わせて記録ヘッドに
備えることは不可能であるからである。
The most desirable option is to switch to 454 lines/inch or 681 lines/inch of recording elements, but it is possible to manufacture a galley printer (electrostatic recording device) etc. with a recording head equipped with 681 lines/inch of recording elements. It is difficult to
This is because even if it could be manufactured, it would be impossible to combine two recording elements, one for 464 lines/inch and one for 681 lines/inch, into a recording head.

故に入力画像データをこのようにディジタル的に単純に
3ビツトのうち1ビットを間引くといった手段を採って
いるのである。
Therefore, a method of digitally simply thinning out one bit out of three bits of input image data is adopted.

発明が解決しようとする問題点 しかし、デジタル的に単純に3ビツトのうち1ビットを
間引くと、(681本/インチを454本/インチに間
引く場合)間引いた1ビットに有効なデータがあった場
合、その有効なデータは削除され記録に現われないこと
になる。第4図は上述した関係を説明するための図であ
る。
Problem to be solved by the invention However, if one bit out of three bits is simply thinned out digitally (when thinning out 681 lines/inch to 454 lines/inch), the thinned out 1 bit contains valid data. If so, the valid data will be deleted and will no longer appear in the record. FIG. 4 is a diagram for explaining the above-mentioned relationship.

つまり、従来の間引き手段によれば、同図に示すように
、主走査方向に画像データ(白丸印ビット)を3ビツト
に1ビットの割合で間引いた場合、その間引いた個所(
黒丸印)に有効なデータ(黒情報)が存在していると、
記録を行った時に、その黒情報の含まれた個所(黒丸印
)は白情報(白丸印)に変化し、記録されないという問
題があり/こ。
In other words, according to the conventional thinning means, when image data (white circle bits) is thinned out in the main scanning direction at a ratio of 1 bit to every 3 bits, as shown in the figure, the thinned out portions (
If valid data (black information) exists in the black circle mark),
There is a problem that when recording, the areas containing black information (black circles) change to white information (white circles) and are not recorded.

そこで、本発明は、主走査方向に画像データをm個にn
個(n<mSm、nは整数)の割合で間引いた場合、そ
の間引いたn個の中に有効なデータが存在していると、
そのデータは削除されることなく必ず記録上に現われる
ようにした画信号間引き装置を提供することを目的とす
る。
Therefore, the present invention divides image data into m pieces in the main scanning direction.
(n<mSm, n is an integer), if valid data exists among the n data that has been thinned out, then
It is an object of the present invention to provide an image signal thinning device in which the data always appears on the record without being deleted.

問題点を解決するための手段 本発明は上述の問題点を解決するため、入力された全て
の画像データ(黒データが1)内の黒ビトの前縁に前も
って設定されたtビットの画素幅(間引く幅より1ビッ
ト以上大きい幅を持つ)を付加して画素幅の確保を行う
画素補正手段を、間引き手段(画像データをm個にn個
の割合で間引く手段)の前段に設けて、間引く以前の画
像データの少なくとも1画素を間引きの際に確保できる
ようにしたものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention has a pixel width of t bits set in advance at the leading edge of a black bit in all input image data (black data is 1). A pixel correction means (having a width at least one bit larger than the width to be thinned out) to secure a pixel width is provided at the front stage of the thinning means (means for thinning out image data at a ratio of m to n pieces), At least one pixel of the image data before thinning can be secured during thinning.

作  用 本発明は前記画素補正手段を間引き手段の前段に設けた
ものであるから、間引く以前の画像データの画素幅は間
引く幅より大きく確保される。従って、間引き時には、
間引く以前の画像データの少なくとも1画素は削除され
ることなく残る。従って、間引く以前の画像データの画
質を損うことなく記録を行うことが可能となる。
Operation Since the present invention provides the pixel correction means before the thinning means, the pixel width of the image data before thinning is ensured to be larger than the thinning width. Therefore, when thinning out,
At least one pixel of the image data before thinning remains without being deleted. Therefore, it is possible to perform recording without impairing the image quality of the image data before thinning.

実施例 第1図は本発明に係る画信号間引き装置の概略構成を示
すブロック図、第2図は第1図を具体化した構成例を示
す回路図である。
Embodiment FIG. 1 is a block diagram showing a schematic structure of an image signal thinning device according to the present invention, and FIG. 2 is a circuit diagram showing a specific example of the structure of FIG.

第1図及び第2図において、1は全ての入力画像データ
(黒データが1)の前縁に、間引く幅より少な(とも1
ビット以上大きいtビットの画素幅を付加して画素幅の
確保を行うための画素補正回路で、この補正回路1は、
前記tビットの画素幅を予め設定しておくためのMMV
(モノスモープルマルチバイブレータ)11と、そのM
MVllからのtビットの画素幅を入力画像データの前
縁に付加するORゲート12を有してなる。
In Figures 1 and 2, 1 is applied to the front edge of all input image data (black data is 1) with a width smaller than the width to be thinned out (both 1
This correction circuit 1 is a pixel correction circuit for securing a pixel width by adding a pixel width of t bits or more, which is larger than t bits.
MMV for presetting the t-bit pixel width
(Monosmople Multivibrator) 11 and its M
It comprises an OR gate 12 that adds a pixel width of t bits from MVll to the leading edge of the input image data.

2は前記画素補正回路1からの画像データ(tビットの
画素幅が確保されている)を主走査方向にm個にn個(
n<m、m、nは整数)間引く間引き回路で、この間引
き回路2は2個のラインメモIJA、Bと、そのライン
メモリA、Hにそれぞれ接続するANDゲート21.2
2と、そのANDゲート21.22の出力をオアするO
Rゲート23等から構成されている。
2, the image data (a pixel width of t bits is secured) from the pixel correction circuit 1 is divided into m pieces and n pieces (
n<m, m, n is an integer) This thinning circuit 2 has two line memories IJA and B and an AND gate 21.2 connected to the line memories A and H, respectively.
2 and the outputs of its AND gates 21 and 22.
It is composed of an R gate 23 and the like.

第3図は第2図に示す回路の各部(a=f)の信号波形
を示すものである。尚、同図中、gは画素幅の補正なし
で間引かれた(従来の間引き手段による)出力信号の波
形で、参考に示したものである。
FIG. 3 shows signal waveforms at each part (a=f) of the circuit shown in FIG. In the figure, g is the waveform of an output signal thinned out (by conventional thinning means) without pixel width correction, and is shown for reference.

次に第3図を参照しながら第2図の回路動作を説明する
Next, the operation of the circuit shown in FIG. 2 will be explained with reference to FIG.

画素補正回路1に間引く以前の画像データ(波形&)が
入力されると、MMVI 1は波形すの信号を出力する
When the image data (waveform &) before thinning is input to the pixel correction circuit 1, the MMVI 1 outputs a signal of waveform &.

ここに、入力画像データとしては、ファクシミリ画信号
等のディジタル信号(NRZ)であり、また、MMVl
 1の出力時間幅は、入力画像データの主走査線密度に
よって決定される。この実施例では、その出力時間幅を
線密度の1画素の時間幅の倍に設定しである。
Here, the input image data is a digital signal (NRZ) such as a facsimile image signal, and MMVl
The output time width of 1 is determined by the main scanning line density of input image data. In this embodiment, the output time width is set to twice the time width of one pixel of the line density.

前記MMVIIからの出力信号(波形b)は、ORゲー
ト12で入力画像データ(波形a)とオアされ、波形C
の信号として出力される。その出力信号(波形C)が画
素補正回路1の出力信号(tビットの画素幅が確保され
た画像データ)である。
The output signal (waveform b) from the MMVII is ORed with the input image data (waveform a) by the OR gate 12, and the output signal (waveform b) is outputted from the waveform C.
is output as a signal. The output signal (waveform C) is the output signal of the pixel correction circuit 1 (image data with a pixel width of t bits secured).

前記画素補正回路1の出力信号(波形C)は間引き回路
2のラインメモ’JA、Bにそれぞれ入力され、ライト
アドレスクロック(波形d)とリードアドレスロック(
波形e)によってライト/リードされる。
The output signal (waveform C) of the pixel correction circuit 1 is input to the line memo 'JA and B of the thinning circuit 2, respectively, and is used as a write address clock (waveform d) and a read address lock (waveform d).
It is written/read by waveform e).

尚両メモリの切り替えはメモリ切替信号りにより行われ
る。また、リード時には、−前記ライトアドレスクロッ
ク(波形d)のX印のアドレスが間引かれ順次右ヘアド
レスがずれる。
Note that switching between the two memories is performed by a memory switching signal. Further, at the time of reading, the addresses marked with X of the write address clock (waveform d) are thinned out and the addresses to the right are sequentially shifted.

しかして、間引き回路2のORゲート23から画素幅補
正後の間引かれた信号(波形f)が出力される。
Thus, the OR gate 23 of the thinning circuit 2 outputs a thinned signal (waveform f) after pixel width correction.

その出力信号(波形f)と従来の間引き手段による出力
信号(波形g)との比較によっても、明らかなように、
本発明によれば、前述したように画素幅補正後に間引き
を行っているので、入力画像データ(波形&)の最小画
素が削除されることなく残る。つまり間引(以前の入力
画像データの少なくとも1画素は必ず確保される。
As is clear from the comparison between the output signal (waveform f) and the output signal (waveform g) from the conventional thinning means,
According to the present invention, since the thinning is performed after the pixel width correction as described above, the smallest pixel of the input image data (waveform &) remains without being deleted. In other words, thinning (at least one pixel of the previous input image data is always secured).

発明の効果 以上の説明から明らかなように、本発明は画素補正手段
を間引き手段の前段に設けたものであるから、間引く以
前の入力画像データの少なくとも1画素は必ず確保され
、間引く以前の画像データの画質を損うことなく、記録
を行うことができるという効果がある。
Effects of the Invention As is clear from the above explanation, in the present invention, the pixel correction means is provided before the thinning means, so at least one pixel of the input image data before thinning is always secured, and the image before thinning is This has the effect that data can be recorded without degrading the image quality.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る画信号間引き装置の概略構成を示
すブロック図、第2図は第1図を具体化した構成例を示
す回路図、第3図は第2図に示す回路の各部における信
号波形図、第4図は従来の間引き手段を説明するための
概念図である。 1・・・・・・画素補正回路、11・・・・・・MMV
(モノスモーブルマルチバイブレータ)、2・・・・・
・間引き回路。 代理人の氏名 弁理士 中 尾 敏 男 ほか12第 
1 図 M 2 ― リード       メモ、り切@aら゛7ドレス2コ
97  γ用1ンπシ1フ第3rg!J び ご、T  A  図 一一嗜主り貴方前 ○○叡ズ)Kて瑠co−一−−−c。
FIG. 1 is a block diagram showing a schematic configuration of an image signal thinning device according to the present invention, FIG. 2 is a circuit diagram showing a configuration example embodying FIG. 1, and FIG. 3 is each part of the circuit shown in FIG. 2. FIG. 4 is a conceptual diagram for explaining the conventional thinning means. 1...Pixel correction circuit, 11...MMV
(Monosmoble Multivibrator), 2...
・Thinning circuit. Name of agent: Patent attorney Toshio Nakao et al. 12th
1 Figure M 2 - Lead memo, rikiri @a 7 dress 2 pieces 97 1 in π 1 f 3rd rg for γ! J Bigo, TA Figure 11, the owner of your order, ○○ 弡) Kte Ruco-1 ---c.

Claims (1)

【特許請求の範囲】[Claims] 主走査方向に画像データをm個にn個(n<m、m、n
、は整数)の割合で間引く間引き手段の前段に、入力さ
れた全ての画像データの前縁に間引く幅より少なくとも
1ビット以上大きいtビットの画素幅を付加する画素補
正手段を設けたことを特徴とする画信号間引き装置。
Image data is divided into m and n pieces in the main scanning direction (n<m, m, n
, is an integer), is provided with a pixel correction means that adds a pixel width of t bits, which is at least one bit larger than the width to be thinned out, to the leading edge of all input image data. Image signal thinning device.
JP61084541A 1986-04-11 1986-04-11 Image signal thinning device Expired - Lifetime JP2532383B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61084541A JP2532383B2 (en) 1986-04-11 1986-04-11 Image signal thinning device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61084541A JP2532383B2 (en) 1986-04-11 1986-04-11 Image signal thinning device

Publications (2)

Publication Number Publication Date
JPS62241081A true JPS62241081A (en) 1987-10-21
JP2532383B2 JP2532383B2 (en) 1996-09-11

Family

ID=13833508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61084541A Expired - Lifetime JP2532383B2 (en) 1986-04-11 1986-04-11 Image signal thinning device

Country Status (1)

Country Link
JP (1) JP2532383B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5642872A (en) * 1979-09-17 1981-04-21 Matsushita Electric Ind Co Ltd Reducing method of binary pattern
JPS5720880A (en) * 1980-07-15 1982-02-03 Fujitsu Ltd Pattern reducing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5642872A (en) * 1979-09-17 1981-04-21 Matsushita Electric Ind Co Ltd Reducing method of binary pattern
JPS5720880A (en) * 1980-07-15 1982-02-03 Fujitsu Ltd Pattern reducing system

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