JPS62239592A - Formation of conductor pattern - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] A method for forming a conductor pattern on a substrate made of glass or ceramic, including a step of depositing a first resist pattern, and deposition of a first conductor layer by electroless plating. step, a step of depositing a second resist pattern, and a step of depositing a second conductor layer by electroplating, by forming a conductor pattern in which an electrolytic plating layer is laminated on the electroless plating layer, the glass or A conductor pattern with little side etching is formed on a ceramic substrate.

[Industrial application field]

The present invention relates to an improved method for forming conductive patterns on glass or ceramic substrates.

A hybrid integrated circuit that uses a glass or ceramic substrate with a conductor pattern formed thereon has a conductor pattern and film-structured circuit elements formed on the substrate, and then individual circuit elements are formed on the substrate. It is equipped with.

Generally, such conductor patterns are constructed by depositing a conductor thin film using electroless plating, and then laminating an electrolytic plating conductor layer on top of it. , fine patterns and high densities have been achieved.

[Conventional technology]

FIGS. 2A to 2E are diagrams for explaining the main steps of the prior art for forming a conductor pattern on a glass or ceramic substrate.

In FIG. 2, the entire upper surface of the substrate 1 is coated with Cu by electroless plating.
A conductor layer 2 such as Cu is deposited on the conductor layer 2, and then a conductor layer 3 of Cu or the like is deposited on the conductor layer 2 by electrolytic plating.

Thereafter, a resist pattern 4 is deposited on the required portions of the conductor layer 3, unnecessary portions of the conductor layers 2 and 3 are dissolved away (liquid phase etching), and the resist pattern 4 is removed. A conductor pattern 5 consisting of a remaining portion 2a of the conductor layer 2 and a remaining portion 3a of the conductor layer 3 is formed at the required portion.

The thickness of the conductor layer 2, which is generally difficult to plate thickly, is about several μm, and the thickness of the conductor layer 3, which ensures the required cross-sectional area, is about several μm to 10 μm, and the cross-sectional shape of the conductor pattern 5 The bottom part will be supported by side etching.

[Problem that the invention seeks to solve]

As explained above, the conductor pattern formed by the conventional method has the problem that side etching of the same degree as the etching thickness is unavoidable, which hinders fine patterning and high density.

Note that a vapor phase etching method is known as an etching method that does not involve side etching. However, gas phase etching equipment is more expensive than liquid phase etching equipment and has the disadvantage of lower productivity.

[Means for solving problems]

The present invention aims to eliminate the above-mentioned problems.
First resist pattern (12) showing 11a)
A first conductor layer (13) is deposited thereon by electroless plating, and a portion (13a) where the first conductor layer (13) is deposited on the required portion (11a). , a second resist pattern (14) is laminated thereon, and a second conductor layer (+5) is laminated by electrolytic plating on a portion (13a) of the conductor layer (13). a second resist pattern (14), the first conductor layer (1) deposited on the first resist pattern (12);
3) A method for forming a four-body pattern, including the step of removing the first resist pattern (12).

[Effect]

According to the above means, a conductor pattern is formed without etching the conductor layer. Therefore, side etching is eliminated, making it possible to make the conductor pattern finer and more dense, making it easier to manage the manufacturing process and safety and health.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1F are diagrams for explaining the main steps of an embodiment of the present invention.

In FIG. 1(a), a non-conductive resist pattern (first resist pattern) 12 exposing a required portion 11a is deposited on a substrate 11 made of glass or ceramic.

Next, as shown in FIG. 1 (+1), the exposed substrate 11
The surface roughness of the required portions is made coarser by roughening treatment of the required portions 11a, for example, by etching treatment using an etching solution of a butic acid type. At this time, the surface of the resist pattern 12 is also roughened.

Next, as shown in FIG. 1(c), a conductor layer 13 of electroless plating is deposited on the entire upper surface thereof. At this time, the roughened surface formed by the roughening treatment serves to strengthen the adhesion of the conductor layer 13.

Next, as shown in FIG. 1(d), a portion 13a of the conductor layer 13 that adheres to the required portion 11a of the substrate is placed on the conductor layer 13.
A non-conductive resist pattern (second resist pattern) 14 is applied except for.

Next, as shown in FIG. 1(N), a second conductor layer 15 is deposited by electrolytic plating on the exposed conductor layer 13 that is deposited on the required portion 11a, and then the second conductor layer 15 is deposited on the exposed conductor layer 13 as shown in FIG. 1(F). When the resist pattern 14 is dissolved away and the resist pattern 12 is dissolved away, the conductor layer 13 attached to the resist pattern 12 is also removed (lifted off) together with the resist pattern 12.
A portion 13a of the conductor layer 13 is provided at a required portion 11a on the substrate 11.
A conductor pattern 16 in which a conductor layer 15 is laminated is formed.

〔Effect of the invention〕

As explained above, according to the method of the present invention, a conductor pattern without side etching is formed, which enables fine patterning and high-density formation, contributing to higher functionality and performance in hybrid integrated circuits. It has the effect obtained.

[Brief explanation of drawings]

Figures 1 (a) to (e) are diagrams for explaining the main steps of an embodiment of the present invention, and Figures 2 (a) to (e) are diagrams for forming a conductive pattern on a glass or ceramic substrate. FIG. 1 is a diagram for explaining the main steps of the conventional technology. In the figure, 11 is a substrate made of glass or ceramic, 11a is a necessary part of the substrate, 12 is a first resist pattern, 13 is a first conductor layer, 13a is a part of the first conductor layer 13, and 14 is a part of the first conductor layer 13. A second resist pattern, 15 a second conductor layer, and 16 a conductor pattern are shown. 7 sheep〈U15 king n and 2)-n←Jiruru upper row 6) 1℃≦3
=] Nii 1 Ni and “M-t, Otsu U two and〉 N C 6 spears 1
Kuchisuke Sashipo gw) The main cat's accusation ■ Ru comparison θ no Te 2 Figure

Claims (1)

[Claims] A first resist pattern (12) exposing a required portion (11a) of the substrate is deposited on a substrate (11) made of glass or ceramic, and electroless plating is applied thereon. A first conductor layer (13) is deposited on the first conductor layer (13), and a second resist is deposited thereon except for the portion (13a) where the first conductor layer (13) is deposited on the required portion (11a). A pattern (14) is laminated, a second conductor layer (15) is laminated by electrolytic plating on a portion (13a) of the conductor layer (13), and the second resist pattern (14) and the second resist pattern (14) are laminated by electrolytic plating. the first conductor layer (13) deposited on the first resist pattern (12);
), a method for forming a conductor pattern, comprising the step of removing the first resist pattern (12).