JPS62234198A - Voice recognition equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a device that uses speech as a control input, and it can be used without affecting the recognition error rate of a speech recognition device and the time required for recognition. , relates to means for greatly increasing the number of recognizable spoken languages.

[Conventional technology]

Speech recognition devices are roughly divided into two types, one of which is a speaker-specific speech recognition device, and the other is a speaker-independent speech recognition device. Various speech recognition algorithms have been proposed for each of the two, but all speech recognition devices that have been proposed to date do not recognize patterns of temporal changes in the frequency components of the input speech signal. ,
It is based on the principle of looking for things to prepare in advance. Therefore, there is a problem that the more types of spoken languages are prepared in advance, the more difficult it becomes to accurately identify them, and the longer the time required for the discrimination becomes.

In order to solve this problem and increase the number of recognizable spoken languages, it becomes necessary to more accurately extract the features of the input speech signal and requires high-speed data processing equipment. There were problems such as not only being a big loss and increasing the cost, but also the device becoming less portable and the field of application of the speech recognition device being limited.

FIG. 2 is a block diagram showing an application example of a voice recognition device incorporated in a toy robot. Although this example falls within the scope of the prior art that uses a function to recognize a limited number of spoken languages, an outline of its operation will be explained below.

The audio input is converted into an electrical signal by the microphone 1, amplified and analog preprocessed by the amplifier circuit 2, and transmitted to the feature extraction circuit 3.

The feature extraction circuit 3 extracts temporal changes in the frequency components of the audio signal, generates a series of chronologically arranged digital data, that is, "analysis data", and stores the generated data in the buffer memory 4.
to be transmitted and retained.

The above signal processing process is called a "speech analysis process", and since one word of speech is generally processed as one unit, a time of 0.1 to 2 seconds is allocated to it.

Immediately after the voice analysis process ends, the "data matching process" begins. In the data matching process, the "feature data" of more than a dozen types of spoken languages stored in the feature storage circuit [5] are sequentially compared and matched with the analysis data stored in the buffer memory 4, and the feature data with strong similarity is compared. Find out. This matching process proceeds as follows.

When the array number generation circuit 6 generates a voice number specifying the first voice language, the address designation circuit 7 generates an address signal corresponding to the voice number and reads the corresponding feature data from the feature storage circuit 5. The feature data is compared with the analysis data in a comparison circuit 8, and the similarity thereof is quantified. At this time, if the similarity is less than a certain value, it is determined that the voice input is different from the first voice language, and the array number generation circuit 6 generates a voice number specifying the second voice language.

In this way, feature data of different spoken languages are read out one after another and compared with the analysis data to find feature data for which the similarity is greater than a certain value.

When feature data with similarity greater than a certain value is found, the comparison circuit 8 outputs a speech recognition end signal. As a result, the array number generation circuit 6 stops updating the number, and it is determined that the audio language specified by the audio number at that time is the audio input.

The voice number and voice recognition end signal thus found are transmitted to the command execution means 9 which causes the robot's limbs and neck to move. The command execution means 9 decodes the voice number and operates the servo circuits necessary for the necessary time to generate movements in accordance with the meaning of the voice input.

[Problem that the invention seeks to solve]

A toy robot equipped with a voice recognition device as described above is
Human voice commands, i.e., "Advance", "Stop 1 no", "Go away", "Go to the right", "Go to the left", "Greetings", "Puke on your hands", It is able to recognize spoken language such as ``hands down,''``tatchime,'' and ``let go,'' and perform movements according to their meanings.

However, two major problems arise when trying to make the robot's motor functions more sophisticated and make it understand the meaning of more commands. The first is that commands such as "Go to the right" and "Go to the left" are easily misunderstood as commands such as "Go to the right" and "Go to the left". . In other words, given the basic constraint that recognition errors are more likely to occur for spoken languages with similar phonemes, as the number of target spoken languages increases, the recognition error rate increases5. I have a problem to say.

The second problem is that in the data matching process, as the number of feature data to be matched increases, the time required for data matching becomes longer (and rapid speech recognition becomes impossible).

Conventionally, the following methods have been attempted to solve the above two problems. To deal with the former, which increases the recognition error rate, it is possible to increase the density and information accuracy of both data to be compared, or to increase the required level of approximation while processing and transforming the analysis data under various conditions for comparison. Verification etc. are being carried out. In addition, to solve the latter problem of collation time, efforts are being made to speed up the data processing device to shorten the time. However, all of these methods involve an increase in the size of the device and an increase in price, creating new problems in terms of practicality.

The present invention aims to overcome the drawbacks of the prior art as described above, and to realize a speech recognition device that can recognize more spoken languages and understand complex content without relying on expensive and costly equipment. There is.

[Means for solving problems]

A voice input means and a feature of the voice signal taken in by the voice input means are extracted and compared with feature data of a plurality of previously prepared speech languages, and to which of the previously prepared feature data the voice signal corresponds. voice matching means for determining whether the feature data is correct and outputting a code signal representing the number of the feature data;
In the electronic device equipped with a speech recognition device, the electronic device includes a feature storage means for storing and holding feature data groups of a plurality of speech languages prepared in advance and supplying the stored contents to the speech matching means as needed. At the same time, the feature storage means is divided into the same number of blocks as the groups, each block stores and holds a group of feature data of one group, and block selection means is provided. , one of the blocks of the feature storage means is selected by a block selection signal output from the block selection means, and a group of feature data stored in the block is supplied to the voice matching means. A voice recognition device featuring:

[Effect]

In the above configuration, in the initial state, the first block of the feature storage means is selected by the block selection means, and only the feature data group stored and held in this block can be supplied to the voice matching means. When the first voice is input to the voice input means in this state, the voice is converted into an electrical voice signal and transmitted to the voice verification means. The voice matching means analyzes the voice signal to extract features, and compares and collates the features with the feature data group supplied from the first block of the feature storage means to evaluate the similarity between the two. As a result, if highly similar feature data is found, a code signal indicating the number of the feature data is output. The code signal is used as a code signal for specifying the input voice in combination with the block selection signal output from the block selection means, and the first voice recognition is completed.

Thereafter, the block selection means selects the second block of the feature storage means so that only the feature data group stored in this block can be supplied to the voice matching means. Of course, depending on the result of speech recognition, the first block of the feature storage means may continue to be selected.

When recognition of one voice is completed in this way, the group of voices to be input next is estimated, and blocks of the feature storage means in which the feature data group of the voice signal of that group are stored are sequentially selected. It is. This kind of estimation is possible because the sequence of spoken languages to be recognized is not random, but is subject to certain constraints.In general, a command is input to a mechanical device by a speech recognition device. In Japanese, commands are created by arranging multiple spoken languages according to the grammar.For example, in Japanese, the order of the object-modifier sequence is fixed, as in "Raise your hand slowly." Therefore,
When dividing spoken language prepared in advance as a target for speech recognition into groups, it is divided into a group of nouns corresponding to objects, a group of adverbs corresponding to modifiers, and a group of verbs corresponding to predicates. It is preferable to store the feature data group in each block of the feature storage means.

With such a group structure, in the initial state of waiting for a command, it is only necessary to be able to recognize the language (noun) that is the object, and after recognizing the object, it is necessary to recognize the language (noun) that is the object, and after recognizing the object, it is necessary to recognize the language (noun) that is the object. All you need to do is to be able to recognize that language. Also, after recognizing the modifier, it is acceptable if only the language (verb) that becomes the predicate can be recognized.

After the predicate is recognized, one instruction is completed, so the system returns to the initial state and waits for the input of the object language again.

With such a method, the number of spoken languages that a speech recognition device must simultaneously identify can be greatly reduced, and the structure of sentences can be made as complex as desired, making it possible to handle an extremely wide variety of information. It is possible to input into mechanical devices by voice.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of a speech recognition device according to the invention. The non-embodiment includes a microphone 1 as a voice input means, an amplifier circuit 2 that amplifies the output signal of the microphone 1, and a feature extraction circuit 6 that analyzes the voice signal output from the amplifier circuit 2 and extracts voice characteristics. , a backup memory 4 for temporarily holding analysis data output from the feature extraction circuit 6; The buffer memory 4 compares the retained analysis data with a group of feature data prepared in advance,
a comparison circuit 8 that searches for highly similar feature data; a feature storage circuit 5 consisting of three blocks that divides the feature data group into three groups and stores and holds the feature data group of each group; K in each block of the feature storage circuit 5
an array number generation circuit 6 that generates an array number signal indicating the arrangement order of feature data; a feature storage circuit 5 that receives and receives the array number signal and stores feature data specified by the array number; 7. Addressing circuit that generates an address signal within the block of 7. When one round of speech recognition is completed, the feature extraction circuit predicts the next group of five speech languages to be input and selects one from the three blocks of the command. A block control circuit 10 having a function as a block selection means for outputting a selection signal for selecting a block.
, and receives the array number signal outputted from the array number generation circuit 6, the block selection signal outputted from the block control circuit 10, and the voice recognition end signal outputted from the comparison circuit 8, and converts the voice recognition result into a specific form. It is composed of an instruction execution means 9 that is linked to the operation.

In the embodiment 8 shown in this block diagram, speech recognition is performed as follows.

Sound is converted into an electrical sound signal by the microphone 1 and transmitted to the amplifier circuit 2. In the amplifier circuit 2, the audio signal is amplified and subjected to some analog preprocessing, and then transmitted to the feature extraction circuit 6. The feature extraction circuit 6 divides the audio signal into several types of frequency components, extracts temporal changes in each frequency component, changes in the mutual phase relationship of each frequency component, etc., and extracts a series arranged in chronological order. digital data, that is, analytical data. The analysis data is transmitted to the buffer memory 4 and temporarily stored. This completes the voice analysis process, which is equivalent to the prior art.

When the input of one voice is completed, the voice analysis process ends.
The voice matching process begins. At this time, the block control circuit 10
It is assumed that outputs a signal for selecting block 1 of the feature storage circuit 5. As a result, only the feature data group, which is the storage content of block 1 of feature storage circuit 5, is transmitted to comparison circuit 8. In the voice verification process, first, the array number generation circuit 6 outputs an array number signal indicating the array number of the first feature data. The addressing circuit 7 that has received the array number signal transmits an address signal specifying the address where the feature data of the array number is stored to the feature storage circuit 5, and thereby blocks 1 of the feature storage circuit 5. The first feature data is read from
The signal is transmitted to the comparison circuit 8. The comparison circuit 8 takes out the analysis data stored in the buffer memory 4, compares it with the first characteristic data, and quantifies the similarity thereof. At this time, if the similarity is less than a certain value, it is determined that the input speech is not the same as the speech language from which the first feature data is derived, and the array number generation circuit 6 generates the array number of the second feature data. A signal is output. In this way, the feature data are read out one after another and compared with the analysis data to find feature data that has a similarity greater than a certain value. When data with similarity equal to or greater than a certain value is found, a speech recognition end signal is output from the comparator circuit 8, and is transmitted to the array element number generation circuit 6 to stop updating of the array element number signal. The voice recognition end signal is also transmitted to the instruction execution means 9, and at this time, the array number signal outputted from the array number generation circuit 6 and the block selection signal outputted from the block control circuit 10 are taken into the instruction execution means 9. . In the command execution means 9, the meaning of the input voice is interpreted based on the combination of the block selection signal and the array number signal, and the meaning thereof is executed.

The voice recognition end signal is then transmitted to the block control circuit 10, which updates the block selection signal.

As a result, block 2 of the feature storage circuit 5 is selected,
It will wait for the next voice input.

As described above, speech recognition for one speech input is completed, but by repeating this operation three times, one sentence consisting of three speech languages is completed, and the command execution means 9
Able to perform individual completed movements. Thereafter, the block control circuit 10 again outputs a selection signal for selecting block 1 of the feature storage circuit 5, returns to the initial state, and accepts the next sentence.

FIG. 3 shows one of the more specific embodiments of the speech recognition device of the present invention. In this embodiment, the microphone 1 is connected to the input terminal ■tn of the voice verification circuit 11. The voice matching circuit 11 is connected to a read-only memory (hereinafter referred to as RO) via an address output port (Aout) and a data input port (D1n).
(referred to as M) 12. The ROM 12 is used as a storage means for a group of characteristic data, and has a data output port (l) out and an address input port Atnv.
have.

D outQ$ voice verification circuit 11
The lower bits of the address input capo A in are coupled to the address output capo A, , t of the voice verification circuit 11 .

On the other hand, the voice matching circuit 11 outputs an array number signal of feature data which is the result of voice recognition.
Output terminal E out that outputs t and voice recognition operation signal
have. The voice recognition active signal is used as an input to a counter 16 consisting of 2-bit 7-lip-flops Q1 and Q2 and to three logic gates 14, 15 and 16 forming a decoder of the output of the counter 13. The output of the counter 16 is coupled to the upper two bits of the address input port A1n of the ROM 12, while being input to the three logic gates 14, 15 and 16, and the AND gate 17. 3 logic gates 14.15 and 1
The output of 6 is coupled to the sampling control input terminals of three latch circuits 19, 20 and 21. The output signal from the data output port Nout of the voice verification circuit 11 is transmitted to the data input terminals of the three latch circuits 19, 20 and 21. Also, the latch circuit 19.
The data output signals 20 and 21 are configured to be input to the instruction execution circuit 22 in parallel. On the other hand, AND
The output of the gate 17 acts as an input signal of the one-shot circuit 18, and the output signal of the one-shot circuit 18 is led to the reset input terminal of the counter 16 and simultaneously transmitted to the start signal input terminal S of the instruction execution circuit 22. Ru. That is, in the configuration shown in FIG. 3, the counter 16,
The AND gate 17 and the one-shot circuit 18 constitute a block control circuit 40.

In the above configuration, in the initial state, the counter 13 is cleared and the outputs of the two flip-flops Q1 and Q2 are both logic O. Therefore, in the ROM 12, the first block with the lowest address is selected. The operation of the embodiment shown in FIG. 3 will be explained below based on the waveform diagram shown in FIG. 4.

When the first audio signal (waveform a) is input to the microphone 1, the audio signal is transmitted to the audio verification circuit 11, and the audio analysis process (waveform b) is started.

At the same time, the voice recognition operation signal (waveform e) output from the output terminal E out of the voice matching circuit 11 becomes logic 1. When the input audio signal ends or a certain period of time has elapsed, the audio analysis process (waveform b) ends and the data matching process (waveform C) begins. In this data matching process, the voice matching circuit 1
1 outputs address signals one after another from the output port Aout, reads feature data from ROMI 2, compares it with analysis data, and searches for highly similar feature data. During this time, the array numbers (waveform d) of the characteristic data are outputted from the data output ports N and ut of the voice matching circuit 11.

Eventually, when highly similar feature data is found, the data matching process (waveform C) ends while the array number of the feature data is retained in the data output port N out, and the voice recognition operation signal (waveform e) is Becomes logic 0. This completes the first voice recognition, but during this time the logic gate 14 outputs a sampling signal (waveform h) that is synchronized with the voice recognition operation signal (waveform e), and at the falling edge of this signal, the signal is latched. Circuit 19 stores the array number signal (waveform k). The sequence number signal is data giving the result of the first speech recognition.

When the falling edge of the voice recognition operation signal (waveform e) is input to the counter 16, the value of the counter 16 increments, and the flip-flops Q and Q2 each become logic 1.
and becomes a logic 0 (waveforms f and g). As a result, the ROM
-12, the second block is selected and enters the state of waiting for input of the second audio signal. When the second audio signal is input, audio analysis is performed in the same way as before, but the sampling signal is output from the logic gate 15 (waveform i), and the latch circuit 20 receives the array number signal, which is the second audio recognition result. (waveform l). Similarly, the third block of the ROM 12 is selected for the input of the third audio signal, and the sampling signal is output from the logic gate 16 (
Waveform j). Further, the array number signal which is the third voice recognition result is stored in the latch circuit 21 (waveform m).

When the voice recognition is completed three times as described above, the array number signals for the 1st% second and third blocks of the ROM 12 are prepared in the three latch circuits 19, 20 and 21, respectively. The three array array numbers are transmitted to the instruction execution circuit 22 in parallel. On the other hand, when the voice recognition of No. 3 is completed, the counter 13 increments, and the flip-flops Q1 and Q2
Both become logic 1. As a result, the output of AND gate 17 also becomes logic 1. The output of the AND gate 17 is transformed into a pulse signal by the one-shot circuit 18, and is transmitted to the reset terminal of the counter 13 to reset and initialize the counter 16, and is transmitted to the start terminal of the instruction execution circuit 22. The content of the sentence is started based on the combination of audio languages specified by the three array numbers.

In the second embodiment, it is necessary to assume that the type of speech language input in three speech recognitions is subject to a certain agreement. To explain using the example above, if you want to recognize a command sentence like "raise your hand slowly", the ROM
The 12 first, second, and third blocks each include:
A group of characteristic data of a spoken language representing an object, a group of characteristic data of a spoken language representing a modifier, and a group of characteristic data of a spoken language representing a predicate are stored. Then, by selecting blocks in a certain order, a sentence that follows a unique grammar is constructed.

However, when creating sentences in multiple languages, if you are always constrained to one grammar, there is less freedom in writing and you cannot express yourself more freely. Depending on the meaning, it is possible to estimate the language group that needs to be recognized next. become.

FIG. 5 is a block diagram showing a speech recognition device, which is one embodiment of the present invention, and is capable of speech recognition of sentences having a branching grammar. This embodiment has roughly the same configuration as the embodiment shown in FIG. They have some functional differences. In this embodiment, the block control circuit 10 understands the meaning of the input speech language from the currently output block selection signal, the array element number signal found as a result of speech recognition, and β. Next, according to the meaning, it is estimated what type of spoken language to use next, and a signal for selecting a block containing the feature data of that group from the feature storage circuit 5, that is, a new It outputs a block selection signal.

FIG. 6 is a more specific circuit diagram of the speech recognition device having the branching grammar explained in FIG. 5, and is one of the embodiments of the present invention. In this embodiment, the microphone 1, the voice matching circuit 11, and the ROM 12 as a storage means for the characteristic data group are the same as those described in the embodiment of FIG. 3, and therefore their explanation will be omitted. A data input section of an instruction execution circuit 22 and an input section of a memory circuit 260 are connected to the data output ports N, , t of the voice verification circuit 11. The memory circuit 26 is the voice matching circuit 11
The voice recognition operation signal, which is the output signal of the output terminal E out of , is used as a sampling signal, and the output signal of the data output port Nout is read into the memory circuit 26 at the falling edge of the sampling signal. The output signal of the memory circuit 26 is used as part of the address input signal of the grammar decoding read-only memory 24 (hereinafter referred to as grammar ROM). The output terminal of the grammar ROM 24 is connected to the upper bit of the address input capo A+n of the ROM 12, the data input part of the instruction execution circuit 22, and the input part of the latch circuit 25, and the output data of the latch circuit 25 is connected to the grammar ROM 24. It is fed back as part of the address input signal.

The voice recognition operation signal, which is the output signal of the output terminal Eout of the voice matching circuit 11, is used as the sampling signal mentioned above, and also as the sampling control input terminal of the latch circuit 25 and the start signal input terminal of the instruction execution circuit 22. transmitted to. In the configuration shown in FIG. 6, the memory 26, grammar ROM 24, and latch 25 constitute a block control circuit 40.

In such a configuration, in the initial state, the memory circuit 23
and latch 25 are each preset to a certain initial value, and the address input signal of grammar ROM 24 is determined by the content data of both. As a result, grammar ROM24
From then on, the first part of ROM 12 as a characteristic data storage circuit is shown.
A block selection signal for selecting the block is output. At this time, when the first voice signal is input to the microphone 1, the voice recognition operation starts, and after a certain period of time, the first array number signal is output as the voice recognition result to the data output capo of the voice matching circuit 11. be done.

At the same time, a voice recognition operation signal is output from the output terminal E out of the voice matching circuit 11. The voice recognition operation described above is the same as that in the embodiment shown in FIG. 3, so a detailed explanation will be omitted.

When the voice recognition operation signal changes to logic O, the instruction execution circuit 22 reads the array number signal and block selection signal obtained as a result of voice recognition, understands the meaning of the input voice language, and uses the meaning. perform the corresponding action.

On the other hand, when the voice recognition operation signal falls, the array number signal as the voice recognition result is read into the memory circuit 26 and stored and held. At the same time, the latch circuit 25 latches the first block selection signal.

As a result, the address input signal of the grammar ROM 24 is composed of the array number signal of the first audio input signal and the block selection signal for selecting the first block of the ROM 12. The grammar ROM 24 outputs a new block selection signal based on this address input signal pressure, and the ROM 12
Select the second block of . At this time, depending on the value of the array number signal (ie, the meaning of the first input audio language), the new block selection signal may remain unchanged as the signal for selecting the first block.

This leads to the idea of giving branching properties to grammar.

When a new block selection signal is determined in this way, 2
The system waits for the input of the second audio signal, and the third block selection signal is determined by the type of the second input audio. Even in this case, the block selection signal is not necessarily new, and the first or second block selection signal may be output again.

According to this configuration, based on the result of one speech recognition, the meaning is examined, the group to which the next spoken language belongs is estimated, and the block that stores the corresponding feature data group is selected. It becomes possible to continue.

Next, a voice-controlled digital watch will be taken up as an example of an electronic device that has a command system based on such a branching grammar, and an example of the use of this grammar will be explained.

The voice-controlled digital watch cited here was realized by the present invention, and it is a multi-function digital watch that was previously extremely difficult to operate, but it is now possible to control it by voice input. be.

FIG. 7 is a state transition diagram illustrating functions possessed by the watch and a method of calling those functions in a non-embodiment. 7th
As is clear from the figure, this watch has mode 26 for the time display function that displays the time, mode 27 for the alarm function that generates an alarm sound at a preset time, and a large number of phone numbers that are stored in the memory. It has three basic modes, one of which is mode 28 for the number memo function, which is displayed in response to a command.

The time display function includes a time display mode 26a for displaying the time, and a time correction mode 26b for operating a time correction function. The alarm function includes an alarm time display mode 27a that displays the alarm time and the on/off state of the alarm function, and an alarm time set mode 27b that has the function of presetting the alarm time and selecting on/off of the alarm function. In addition, the number memo function includes a number memo memory map display mode 28a that displays the memory usage status of the number memo, and a number memo registration mode 28b that activates the function of registering a memo by inputting the number to be memoed and the name of that number. There is also a number memo readout mode 28C in which when a name is input, a number corresponding to the name is read out from the memory and displayed.

All transitions between these seven modes are performed by voice commands. The spoken languages used for this state transition are those of the first group - ``jikoku'', ``alarm'', ``memo'', ``shuusei'', ``touroku'', ``
The six words are ``Yomidashi.'' The functions of these spoken languages are indicated by arrows indicating state transition directions in FIG. However, although the spoken language "Owari" shown in the figure is used for state transition commands, it functionally belongs to the second spoken language group.

In addition to the above-mentioned "Owari", the second spoken language group includes "Zero", "Ichi", "Ni", "San", "Yon", "Go",
"Roku", "Nana", "Hachi", "Kyuu", "On"
, "Off", "Gozen", "Gogo", "Motoe" 16
It consists of words.

The audio language of these second loops is time correction mode 26
b. In the alarm time setting mode 27b and the number memo registration mode 28b, it is used to input numerical data, correct errors in input data, and select on/off of the alarm function. For example, in the alarm time setting mode 27b, if "Gozen" - "Zero" - "Go" is input by voice, 6:45 am is preset as the alarm time. Also, by inputting "on" by voice, the alarm function is turned on, and by inputting "off" by voice, the alarm function is turned off. Also, by inputting a voice saying "Owari", the state changes to the alarm time display mode 27a.

The third voice language group is number memo reading mode 28
It is a spoken language that can be recognized only in C, and is the name of the number memo itself. The voice characteristic data of the name is extracted by inputting the voice in the number memo registration mode 28b and is stored in the RAM. For example, the spoken names such as "Yamada", "Kobayashi", "Cuckoo", and "Hokenshobango" are memorized, so the voice is recognized by voice,
The number paired with that name is retrieved from memory and displayed. J. The sea urchin is turning. The third voice language group allows full operation of the watch by making full use of these names and the voice languages of the three groups explained above, but at that time, the watch is equipped with It is not necessary for the speech recognition device currently available to perform recognition work on all of these voices at all times. Although the watch is in one of the seven modes shown in FIG. 7, meaningful voice input in that state is limited to one of the three groups mentioned above. Therefore, the ROM (for the third group, R
It is sufficient if the block AM) is selected. Also, the exchange of this block is executed when four types of voice inputs are performed: ``Shausei'', ``Touroku'', ``Yomidashi'', and ``Owari'', but even if the same voice is ``Shausei'', The mode at that time is time display mode 26a
The transition destination differs depending on whether the mode is 27a or the alarm time display mode 27a. Furthermore, even if the voice is recognized, it may not function as in the case of the voice ``see'' in the number memo memory map display mode 28a.

〔Effect of the invention〕

Although the details of the speech recognition device according to the present invention have been explained above,
According to the present invention, it has become possible to limit the number of spoken languages that may be input in one speech recognition to a certain number or less. As a result, the error rate in speech recognition has been greatly reduced, making reliable speech recognition possible. Furthermore, the time required for speech recognition can be kept within a certain value, and rapid speech recognition has become possible without using expensive and large-scale high-speed data processing equipment.

On the other hand, since speech recognition can be divided into several or more times, the number of words that can be speech-recognized has greatly increased. Furthermore, not only did the freedom of expression expand due to the increase in the number of words used, but it also became possible to construct sentences by combining words, making it possible to convey extremely complex content through speech. It was. Moreover, this sentence is based on only one formalized grammar (,
It has also made it possible to use branching grammars, so the degree of freedom of expression is increasing.

The voice recognition device of the present invention having such excellent features produces extremely useful effects when applied to portable electronic equipment mainly powered by batteries. For example, in the voice-controlled digital watch as described above, the device can be made smaller and lighter, making it fully practical as a wristwatch. The ability to operate wristwatches by voice provides a way to eliminate mechanical input means (crowns, pushbutton switches, etc.), which were an obstacle to multifunctionality and high reliability in conventional wristwatches. and has great meaning. In addition, when operating functions by voice, the purpose of the operation can be input directly, which eliminates the need for repeated complex switch operations, unlike the switch operations of conventional digital watches. can be realized. Particularly in data index functions such as phone number memos, data can be retrieved directly by voice recognition of the name of the data, making it a much more advanced watch than conventional wristwatches with memo functions.

[Brief explanation of drawings]

FIG. 2 is a block diagram showing the configuration of a speech recognition device according to the prior art, FIGS. 1 and 5 are both block diagrams showing an embodiment of the speech recognition device according to the present invention, and FIG. A more specific circuit diagram of a speech recognition device that uses the same technology as the embodiment shown in the figure, Figure 4 is a signal waveform diagram for explaining the operation of the circuit diagram in Figure 3, and Figure 6 is a diagram of the signal waveforms shown in Figure 5. A more specific circuit diagram of a voice recognition device using technology equivalent to that of the embodiment shown in FIG. It is a state transition diagram of no use. 1...Microphone, 2...Amplifier circuit, 3...Feature extraction circuit, 4...Buffer memory, 5...Characteristics Call storage circuit, 6... Array number generation circuit, 7... Address designation circuit, 8... Comparison circuit, 9... Instruction execution means, 10. 40...Block control circuit, 13...
...Counter, 18...One-shot circuit. Procedural amendment (method) Michibe Uga, Director General of the Japan Patent Office, 1985/1985, 1, Indication of the case, 1986 Patent Application No. 77900, 2, Name of the invention, voice recognition device 3, Person making the amendment Relationship to the incident Patent applicant address 2-1-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo Telephone (03)
342-1231 June 24, 1986 (shipment date) 5. The number of inventions will not increase due to the amendment 6. All drawings subject to the amendment

Claims (1)

[Claims] A voice input means and a feature of the voice signal taken in by the voice input means are extracted and compared with feature data of a plurality of previously prepared speech languages, and to which of the previously prepared feature data the voice signal corresponds. voice matching means for determining whether the feature data is correct and outputting a code signal representing the number of the feature data;
and feature storage means for storing and holding feature data groups of the plurality of speech languages prepared in advance, and supplying the stored contents to the speech matching means as needed, the feature storage; The means is constituted by a plurality of blocks for storing each of the plurality of groups in which the spoken languages prepared in advance are classified, and selectively supplies the stored information of the plurality of blocks to the speech matching means. a block selection means for
and command execution means for inputting a plurality of voice signal information collated against the feature data group of each block sequentially supplied to the voice collation means by the block selection means and executing the command according to the combination thereof. A voice recognition device featuring: