JPS6223326B2 - - Google Patents
Info
- Publication number
- JPS6223326B2 JPS6223326B2 JP53132026A JP13202678A JPS6223326B2 JP S6223326 B2 JPS6223326 B2 JP S6223326B2 JP 53132026 A JP53132026 A JP 53132026A JP 13202678 A JP13202678 A JP 13202678A JP S6223326 B2 JPS6223326 B2 JP S6223326B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- input
- rectifier
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000002131 composite material Substances 0.000 claims description 2
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 230000006698 induction Effects 0.000 description 6
- 230000004907 flux Effects 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 239000000284 extract Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Description
【発明の詳細な説明】
この発明は電流形インバータの出力電圧をフイ
ードバツク信号とする電圧制御装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage control device that uses the output voltage of a current source inverter as a feedback signal.
従来この種の装置として第１図に示すものがあ
つた。図において、１はインバータ、２は直流リ
アクトル、３はサイリスタ整流器、４は誘導電動
機、５は交流電源、６はインバータ１の交流出力
電圧を検出する絶縁変圧器、７は前記絶縁変圧器
６の出力電圧を整流する整流器、８は電圧指令信
号と前記整流器７の直流出力電圧の偏差分を増巾
する電圧調整器、９は前記電圧調整器８の出力信
号と前記交流電源５の電流を検出する電流検出器
１１の出力信号の偏差分を増巾する電流調整器、
１０は前記電流調整器９の出力信号により位相制
御されたゲート信号を前記サイリスタ整流器３に
与えるゲート制御装置である。電流調整器９、ゲ
ート制御装置１０でサイリスタ整流器制御装置を
構成する。インバータの交流出力電圧はインバー
タの出力周波数に関連して制御され、誘導電動機
４の磁束が飽和しないようになされる。電圧調整
器８は比例積分要素で構成されており、伝達関数
は次のようになる。 A conventional device of this type is shown in FIG. In the figure, 1 is an inverter, 2 is a DC reactor, 3 is a thyristor rectifier, 4 is an induction motor, 5 is an AC power supply, 6 is an isolation transformer that detects the AC output voltage of the inverter 1, and 7 is the isolation transformer 6. A rectifier that rectifies the output voltage; 8 a voltage regulator that amplifies the deviation between the voltage command signal and the DC output voltage of the rectifier 7; 9 detects the output signal of the voltage regulator 8 and the current of the AC power source 5; a current regulator that amplifies the deviation of the output signal of the current detector 11;
Reference numeral 10 denotes a gate control device that provides the thyristor rectifier 3 with a gate signal whose phase is controlled by the output signal of the current regulator 9. The current regulator 9 and the gate control device 10 constitute a thyristor rectifier control device. The AC output voltage of the inverter is controlled in relation to the output frequency of the inverter to prevent the magnetic flux of the induction motor 4 from becoming saturated. The voltage regulator 8 is composed of a proportional-integral element, and the transfer function is as follows.
ＥVC＝−（ＥＦ／Ｒ１−ＥＲ／Ｒ２）１＋ＳＣ１Ｒ３
／ＳＣ１
電流形インバータの代表的な回路構成は３相ブ
リツジを例にとれば、第５図に示されるようなも
のである。各アームがサイリスタTHとダイオー
ドＤの直列体からなり、このサイリスタTHとダ
イオードＤの中間接続点の各アーム間に転流コン
デンサＣが接続されて構成され、各サイリスタは
120゜通電制御される。第６図にその動作波形例
として、出力線間電圧ＥUVと出力電流ＩUを示す
ように電流形インバータではインバータの転流時
に負荷のインダクタンスとインバータの転流コン
デンサ間の振動によるサージ電圧が発生する。電
流形インバータの出力電圧を整流器７で３相全波
整流して得られる信号ＥFは第２図に示す動作波
形になり、電圧調整器８の入力電流はＥＦ／Ｒ１−ＥＲ
／Ｒ２と
なり、転流サージ電圧成分の影響により変動が大
きい。この入力電流が電圧調整器８の比例積分要
素で増幅されて極性が反転されるため、電圧調整
器８の出力電圧ＥVCは第２図に示すように変動す
る。電圧調整器８の出力電圧ＥVCが変動すると電
流調整器９により、電流が変動し誘導電動機の運
転が不安定になる欠点があつた。 E VC =-(E F /R 1 -E R /R 2 )1+SC 1 R 3
/SC A typical circuit configuration of a single current source inverter is as shown in FIG. 5, taking a three-phase bridge as an example. Each arm consists of a series body of a thyristor TH and a diode D, and a commutating capacitor C is connected between each arm at the intermediate connection point of the thyristor TH and diode D.
120° energization control. Figure 6 shows an example of its operating waveforms, showing the output line voltage E UV and output current I U. In a current source inverter, surge voltage due to vibration between the load inductance and the inverter's commutation capacitor occurs during commutation of the inverter. Occur. The signal E F obtained by three-phase full-wave rectification of the output voltage of the current source inverter by the rectifier 7 has the operating waveform shown in FIG. 2, and the input current of the voltage regulator 8 is E F /R 1 −E R
/ R2 , and the fluctuation is large due to the influence of the commutation surge voltage component. Since this input current is amplified by the proportional-integral element of the voltage regulator 8 and its polarity is reversed, the output voltage E VC of the voltage regulator 8 fluctuates as shown in FIG. When the output voltage E VC of the voltage regulator 8 fluctuates, the current by the current regulator 9 fluctuates, resulting in unstable operation of the induction motor.
この発明は上記のような従来のものの欠点を除
去するためになされたもので、前記サージ電圧を
打消すように電圧フイードバツク装置を構成する
ことにより、電流の変動を軽減することができる
電圧制御装置を提供することを目的としている。 This invention was made to eliminate the drawbacks of the conventional ones as described above, and provides a voltage control device that can reduce current fluctuations by configuring a voltage feedback device to cancel out the surge voltage. is intended to provide.
以下この発明の一実施例を図について説明す
る。第３図において、１２は整流器７の出力電圧
ＥFと電圧指令信号ＥRの偏差分を半波整流する増
巾器であり、前記増巾器１２の出力信号ＥVFは電
圧調整器８へ与えられる。増巾器１２において、
D1，D2はダイオードであり、出力電圧ＥVFは負
極性のみ生じ、抵抗器R5，R6，R7の抵抗値をＲ６／０．
９
＝R5＝R7と選定すると、ＥF，ＥRの瞬時値がＥF
＞ＥＲ／０．９の場合には増巾器１２の入力電流はＥＦ
／Ｒ５−ＥＲ／Ｒ６
＝１／Ｒ５（ＥF−ＥＲ／０．９）＞０となり、この入
力電流は抵
抗R7とダイオードD1を通つて流れ、増巾器１２
内の演算増巾器の出力端にフイードバツクされ
る。この演算増巾器の入力端はほぼ零電位である
ため、増巾器１２の出力電圧ＥVFは抵抗７の電圧
降下分の電圧となり、極性は負となり、ＥVF＝−
１／Ｒ５（ＥF−ＥＲ／０．９）×R7＝−（ＥF−ＥＲ／
０．９）となる。 An embodiment of the present invention will be described below with reference to the drawings. In FIG. 3, 12 is an amplifier that half-wave rectifies the deviation between the output voltage E F of the rectifier 7 and the voltage command signal E R , and the output signal E VF of the amplifier 12 is sent to the voltage regulator 8. Given. In the amplifier 12,
D 1 and D 2 are diodes, and the output voltage E VF is generated only in negative polarity, and the resistance values of the resistors R 5 , R 6 , and R 7 are set to R 6 /0.
9 = R 5 = R 7 , the instantaneous values of E F and E R are E F
>E R /0.9, the input current of the amplifier 12 is E F
/R 5 -E R /R 6 =1/R 5 (E F -E R /0.9)>0, and this input current flows through the resistor R 7 and the diode D 1 to the amplifier 12.
The signal is fed back to the output terminal of the operational amplifier within the circuit. Since the input terminal of this operational amplifier is at almost zero potential, the output voltage E VF of the amplifier 12 is equal to the voltage drop across the resistor 7, and the polarity is negative, so that E VF =-
1/R 5 (E F −E R /0.9)×R 7 =−(E F −E R /
0.9).
ＥF≦ＥＲ／０．９の場合には増巾器１２の入力電流
は
ＥＦ／Ｒ５−ＥＲ／Ｒ６＝１／Ｒ５（ＥF−ＥＲ／０．
９）０となり、この負極
性の入力電流は増巾器１２内の演算増巾器の出力
端よりダイオードD2を通つて流れる。従つてこ
の演算増巾器の出力電圧はダイオードD2の電圧
降下分だけ、正電圧になる。このときダイオード
D1はブロツクされるため抵抗R7を通つて流れる
電流は零になり、増巾器１２の出力電圧ＥVFはＥ
VF＝０となる。従つて、増巾器１２の出力波形Ｅ
VFは第４図のようになる。電圧調整器８の入力抵
抗器R1，R4に加えられる整流器７の出力信号ＥF
と増巾器１２の出力信号ＥVFの合成電圧である等
価フイードバツク信号ＥFSはR1＝R4とすればＥF
＞ＥＲ／０．９の場合にはＥFS＝ＥF＋ＥVF＝ＥF−（Ｅ
F−
ＥＲ／０．９）＝ＥＲ／０．９となり、ＥFＥＲ／０
．９の場合にはＥVF＝０で
あるため、ＥFS＝ＥFとなり、第４図に示すよう
にＥＲ／０．９以上の成分がカツトされる。電圧調整器
８
の入力抵抗器R2をR1＝R2＝R4とすれば、電圧指
令信号ＥRは前記等価フイードバツク信号ＥFSの
平均値と等しくなるように電圧調整器８で制御さ
れる。このとき、等価フイードバツク信号ＥFSの
リツプルが低減されるために、電圧調整器８の出
力信号ＥVCのリツプルも低減され、この出力信号
ＥVCを電流基準信号として電流調整器９に入力す
るため、交流電源５に流れる電流を安定に制御で
きる。また、誘導電動機４の基本波成分を電圧指
令信号ＥRに比例して制御できるため、誘導電動
機４の磁束を安定に制御できる。 When E F ≦E R /0.9, the input current of the amplifier 12 is E F /R 5 −E R /R 6 =1/R 5 (E F −E R /0.
9) becomes 0, and this negative input current flows from the output terminal of the operational amplifier in the amplifier 12 through the diode D2 . Therefore, the output voltage of this operational amplifier becomes a positive voltage by the voltage drop of the diode D2 . At this time the diode
Since D 1 is blocked, the current flowing through resistor R 7 becomes zero, and the output voltage E VF of amplifier 12 becomes E
VF =0. Therefore, the output waveform E of the amplifier 12
The VF will look like Figure 4. Output signal E F of rectifier 7 applied to input resistors R 1 , R 4 of voltage regulator 8
The equivalent feedback signal E FS which is the composite voltage of the output signal E VF of the amplifier 12 and the output signal E VF of the amplifier 12 is E F
>E R /0.9, E FS =E F +E VF =E F −(E
F - E R /0.9) = E R /0.9, and E F E R /0
．． In the case of 9, E VF =0, so E FS = EF , and as shown in FIG. 4, components of E R /0.9 or more are cut out. If the input resistor R2 of the voltage regulator 8 is set to R1 = R2 = R4 , the voltage command signal E R is controlled by the voltage regulator 8 so as to be equal to the average value of the equivalent feedback signal EFS . Ru. At this time, since the ripple of the equivalent feedback signal EFS is reduced, the ripple of the output signal EVC of the voltage regulator 8 is also reduced, and this output signal EVC is input to the current regulator 9 as a current reference signal. , the current flowing through the AC power source 5 can be stably controlled. Further, since the fundamental wave component of the induction motor 4 can be controlled in proportion to the voltage command signal ER , the magnetic flux of the induction motor 4 can be stably controlled.
なお、上記実施例では増巾器１２の入力抵抗器
の比を簡単のため、Ｒ６／０．９＝R5＝R7に選んだ場合
を
例にとり説明したが、入力抵抗の比ｋ（Ｒ６／ｋ＝R5
＝R7）として電流形インバータの交流出力の基本
波成分のピーク値以上をカツトするように、フイ
ードバツク信号ＥFSの平均値とピーク値との比す
なわち
に選定することが望ましい。このように選定すれ
ば、サージ電圧成分は等価フイードバツク信号Ｅ
FSにはほとんど生じなくなる。 In the above embodiment, the ratio of the input resistors of the amplifier 12 was chosen to be R 6 /0.9=R 5 =R 7 for simplicity. However, the ratio of the input resistors k( R 6 /k = R 5 = R 7 ), the ratio of the average value to the peak value of the feedback signal E FS is determined so as to cut out the peak value or more of the fundamental wave component of the AC output of the current source inverter. It is desirable to select With this selection, the surge voltage component becomes the equivalent feedback signal E.
It almost never occurs in FS .
以上のようにこの発明によれば、電流形インバ
ータの交流出力電圧の基本波のピーク値以上のサ
ージ電圧成分を極性反転させて取出す増巾器を備
え、この増巾器の出力で電流形インバータの転流
時のサージ電圧成分を打消すようにしたので、電
流の変動が少なく、出力電圧の基本波成分の制御
が行なえ、負荷の電動機の磁束を安定に制御で
き、安定した運転が行なえる効果がある。 As described above, according to the present invention, there is provided an amplifier that inverts the polarity of the surge voltage component that is higher than the peak value of the fundamental wave of the AC output voltage of the current source inverter and extracts it, and the output of the amplifier is used to drive the current source inverter. Since the surge voltage component at the time of commutation is canceled, current fluctuations are small, the fundamental wave component of the output voltage can be controlled, the magnetic flux of the load motor can be stably controlled, and stable operation can be achieved. effective.
第１図は従来の電圧制御装置を示す回路構成
図、第２図は第１図の動作波形図、第３図はこの
発明の一実施例による電圧制御装置を示す回路構
成図、第４図は第３図の動作波形図、第５図は電
流形インバータの回路構成図、第６図はその動作
波形図である。
図中、１…インバータ、２…直流リアクトル、
３…サイリスタ整流器、４…誘導電動機、５…交
流電源、６…絶縁変圧器、７…整流器、８…電圧
調整器、９…電流調整器、１０…ゲート制御装
置、１１…電流検出器、１２…半波整流増巾器。
尚、図中同一符号は同一又は相当部分を示す。
FIG. 1 is a circuit configuration diagram showing a conventional voltage control device, FIG. 2 is an operation waveform diagram of FIG. 1, FIG. 3 is a circuit configuration diagram showing a voltage control device according to an embodiment of the present invention, and FIG. 4 3 is an operating waveform diagram, FIG. 5 is a circuit configuration diagram of a current source inverter, and FIG. 6 is an operating waveform diagram thereof. In the figure, 1...inverter, 2...DC reactor,
3... Thyristor rectifier, 4... Induction motor, 5... AC power supply, 6... Isolation transformer, 7... Rectifier, 8... Voltage regulator, 9... Current regulator, 10... Gate control device, 11... Current detector, 12 ...Half-wave rectifier amplifier.
Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
流器と、上記直流電力を周波数可変な交流電力に
変換する電流形インバータとからなるサイリスタ
変換器、上記電流形インバータの交流出力電圧検
出信号を整流する整流器、入出力間にフイードバ
ツク抵抗を並列接続し、第１の入力抵抗を介して
与えられる上記整流器の直流出力電圧信号と第２
の入力抵抗を介して外部から与えられる電圧指令
信号との偏差を入力とし、上記偏差と半波整流す
る増幅器、この増幅器の出力信号と上記整流器の
直流出力電圧信号を合成し、この合成電圧と電圧
指令信号との偏差により電圧を調整する電圧調整
器、この電圧調整器の出力に基いて上記サイリス
タ整流器を制御するサイリスタ整流器制御装置を
備え、上記電圧指令信号を、上記合成電圧の平均
値に等しい値に設定し、上記第１の入力抵抗と上
記第２の入力抵抗の比が、上記電流形インバータ
の交流出力の基本波成分のピーク値と上記平均値
との比とほぼ等しく、かつ上記第１の入力抵抗の
比と上記フイードバツク抵抗の比がほぼ１となる
ように上記第１の入力抵抗、第２の入力抵抗、フ
イードバツク抵抗の比を選定したことを特徴とす
る電圧制御装置。1. A thyristor converter comprising a thyristor rectifier that converts AC power to DC power, and a current source inverter that converts the DC power to frequency variable AC power, a rectifier that rectifies the AC output voltage detection signal of the current source inverter, A feedback resistor is connected in parallel between the input and output, and the DC output voltage signal of the rectifier given through the first input resistor and the second
The input is the deviation from the voltage command signal given from the outside through the input resistance of the input resistor, the amplifier performs half-wave rectification with the deviation, the output signal of this amplifier is synthesized with the DC output voltage signal of the rectifier, and this synthesized voltage and A voltage regulator that adjusts the voltage according to the deviation from the voltage command signal, and a thyristor rectifier control device that controls the thyristor rectifier based on the output of the voltage regulator, and the voltage command signal is adjusted to the average value of the composite voltage. the ratio of the first input resistance to the second input resistance is approximately equal to the ratio of the peak value of the fundamental wave component of the AC output of the current source inverter to the average value, and A voltage control device characterized in that the ratios of the first input resistance, the second input resistance, and the feedback resistance are selected so that the ratio of the first input resistance to the feedback resistance is approximately 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13202678A JPS5557918A (en) | 1978-10-25 | 1978-10-25 | Voltage controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13202678A JPS5557918A (en) | 1978-10-25 | 1978-10-25 | Voltage controller |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5557918A JPS5557918A (en) | 1980-04-30 |
| JPS6223326B2 true JPS6223326B2 (en) | 1987-05-22 |
Family
ID=15071762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13202678A Granted JPS5557918A (en) | 1978-10-25 | 1978-10-25 | Voltage controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5557918A (en) |
-
1978
- 1978-10-25 JP JP13202678A patent/JPS5557918A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5557918A (en) | 1980-04-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0779700B1 (en) | DC power supply with enhanced input power factor | |
| US3913002A (en) | Power circuits for obtaining a high power factor electronically | |
| EP0500789B1 (en) | An uninterrupted power supply system having improved power factor correction circuit | |
| US4831508A (en) | Power supply system having improved input power factor | |
| US4885675A (en) | Transformer isolated AC to DC power conditioner with resistive input current | |
| EP0431778A1 (en) | AC to DC power conversion circuit with low harmonic distorsion | |
| US5216585A (en) | Switching power source device | |
| JPS5924442B2 (en) | Pulse width modulation voltage regulator converter and power converter | |
| US4054827A (en) | Voltage boost circuit for DC power supply | |
| JPH0523040B2 (en) | ||
| US4519022A (en) | Ripple reduction circuit for an inverter | |
| JPH06209574A (en) | Power supply circuit | |
| US5239453A (en) | DC to DC converter employing a free-running single stage blocking oscillator | |
| JP2515650B2 (en) | Power factor correction circuit and switching power supply circuit using the power factor correction circuit | |
| JPS6223326B2 (en) | ||
| JP2990867B2 (en) | Forward converter | |
| US5434769A (en) | Multi-phase adaptable AC-DC converter | |
| JPH0242075Y2 (en) | ||
| JPH0686539A (en) | Converter circuit | |
| JPH0686553A (en) | Power supply circuit | |
| JPH10127046A (en) | Control circuit for step-up converter | |
| JPH08331849A (en) | Rectifying circuit | |
| JP3400132B2 (en) | Switching power supply | |
| JPH0652998B2 (en) | Method and device for controlling control voltage of three-phase inverter for AC motor power supply | |
| JPS61132071A (en) | Power source |