JPS62230315A - Electric source control system - Google Patents
Electric source control systemInfo
- Publication number
- JPS62230315A JPS62230315A JP61071779A JP7177986A JPS62230315A JP S62230315 A JPS62230315 A JP S62230315A JP 61071779 A JP61071779 A JP 61071779A JP 7177986 A JP7177986 A JP 7177986A JP S62230315 A JPS62230315 A JP S62230315A
- Authority
- JP
- Japan
- Prior art keywords
- output
- power supply
- circuit
- signal
- supply circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 208000000260 Warts Diseases 0.000 description 1
- 201000010153 skin papilloma Diseases 0.000 description 1
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電源制御方式に関し、時に複数の直流′ｌｌＥ
源回路で構成され７ｔ ’ｉｔ源装置’を制御する大型
コンビエータ用の電源制御方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply control method, and sometimes a plurality of direct currents
The present invention relates to a power supply control method for a large comviator that is configured with a power supply circuit and controls a 7t 'IT power supply device'.
従来の電源制御方式は第２図に示す工うＫｎ個の直流電
源回路ｄ、〜ｄｎの出方が共通接続され、負荷に供給す
る工うに構成されている。直流電源回路ｄ、−ｄｎの各
々は出力が過電圧である時に過電圧信号Ｏｖ、〜０Ｖｎ
ｉ出力し、出力が不足電圧である時に不足電圧信号ＵＶ
、〜ＵＶｎ ｋ出力し、出力が過電流である時に過電流
信号ＱＣ，〜ＯＣｎ ’ｒ：出力し、出力が不足電流で
ある時に不足電流信号Ｕ（、ｔ〜ＵＣｎｋ出力する。ま
た電圧安定化制御回路ｄ、は直流電源回路の共通出方が
過電圧である時に過電圧信号Ｏｖを出方し、前記共通出
力が不足電圧である時に不足電圧信号ＵＶを出力する。In the conventional power supply control system, the outputs of the Kn DC power supply circuits d, to dn shown in FIG. 2 are commonly connected and supplied to a load. Each of the DC power supply circuits d and -dn generates overvoltage signals Ov and ~0Vn when the output is overvoltage.
i output, and when the output is undervoltage, the undervoltage signal UV
, ~UVn k is output, and when the output is overcurrent, overcurrent signal QC, ~OCn 'r: is output, and when the output is undercurrent, undercurrent signal U (, t~UCnk is output. Also, voltage stabilization The control circuit d outputs an overvoltage signal Ov when the common output of the DC power supply circuit is overvoltage, and outputs an undervoltage signal UV when the common output is undervoltage.
過電圧信号Ｏｖ１〜ＯＶｎはオア回路１に入力され、不
足電圧信号Ｕｖ、〜ＵＶｎはオア回路２に入力さｎ１オ
ア回路１の出力と過電圧便号ｏｖがアンド回路３に入力
され、オア回路２の出方と不足電圧信号ＵＶがアンド回
路４に人力さｎ１アンド回路３の出力とアンド回路４の
出力がオア回路５に入力さｎる。アンド回路５の出力Ａ
ＬＭが出力されｔ時、直流電源回路ｄ１〜ｄｎｔそｎぞ
ｎ遮断し、出力全零にする０過電流回路ＯＣＩ〜ＯＣｎ
及び不足電流回路ＵＣ，〜ＵＣｎはオア回路６に入力さ
ｎ、オア回路６の出力ＷＡＲが出力されｔ時、直流電源
回路ｄ、〜ｄｎを遮断せずに出力は供給し続けることが
出来る。The overvoltage signals Ov1 to OVn are input to the OR circuit 1, and the undervoltage signals Uv and ~UVn are input to the OR circuit 2. The output and the undervoltage signal UV are input to the AND circuit 4, and the output of the AND circuit 3 and the output of the AND circuit 4 are input to the OR circuit 5. Output A of AND circuit 5
When LM is output, the DC power supply circuits d1 to dnt are shut off and the output is completely zero.0 Overcurrent circuits OCI to OCn
The undercurrent circuits UC, -UCn are input to the OR circuit 6, and when the output WAR of the OR circuit 6 is output, the output can continue to be supplied without interrupting the DC power supply circuits d, -dn.
すなわち、直流電源回路ｄ１〜ｄｎの少なくとも一つの
出力が過電圧となり、かつ直流電源回路ｄ、〜ｄｎの共
通出力が過電圧となつｔ時、あるいは直流電源回路ｄ１
〜ｄｎの少なくとも一つの出力が不足電圧となり、かつ
直流電源回路ｄ１〜ｄｎの共通出力が不足電圧となり九
時に信号ＡＬＭが出力さｎ１直流電源回路ｄ１〜ｄｎは
遮断さｎる。また、直流電源回路ｄ８〜ｄｎの過電流及
び不足電流のうち少なくとも１つが出力さｎｆｃ時に警
報信号ＷＡＲが出力さｎ％厘導電源回路ｄ、〜ｄｎの少
なくとも１台が故障し九ことがわかる０〔発明が解決し
ょうとする問題点〕
上述しｔ従来の電源制御方式は直流電源回路ｄ。That is, at the time t when at least one output of the DC power supply circuits d1 to dn becomes overvoltage and the common output of the DC power supply circuits d, to dn becomes overvoltage, or the DC power supply circuit d1
At least one output of ~dn becomes an undervoltage, and the common output of the DC power supply circuits d1~dn becomes an undervoltage, and a signal ALM is output at 9:00, and the DC power supply circuits d1~dn are cut off. Furthermore, when at least one of the overcurrent and undercurrent of the DC power supply circuits d8 to dn is outputted, the alarm signal WAR is outputted. 0 [Problems to be solved by the invention] As mentioned above, the conventional power supply control method is a DC power supply circuit.
〜ｄｎが負荷に対して冗長を持たせているため、直流電
源回路ｄｌ−ｄｎのうち、＠流電源回路ｄ。~dn has redundancy for the load, so of the DC power supply circuits dl-dn, @current power supply circuit d.
が過電流又は不足電流となると直ちに自分自身の出力を
遮断し、残りの直流電源回路ヴｄ２〜ｄｎが出力定格を
越えて過電流で検出するまで働き得る。ところが残りの
直流電源回路ｄ！〜ｄｎの出力容量を越える場合は直流
電源回路ｄ、〜ｄｎのうち検出レベルが早い１台が過電
流となり遮断となる０これを繰り返して直ちに残りの丁
ぺて直流電源回路ｄ、〜ｄｎが遮断となる。したがって
個々の直流電源回路の定格を越えて過電流を検出する間
の出力電流で運転を続ける可能性がるり、Ｉｔ流電源回
路ｄ、〜ｄｎの素子が電気的、熱的に過負荷となり、便
頼度が落ちる恐ｎがある。When an overcurrent or undercurrent occurs, it immediately cuts off its own output, and the remaining DC power supply circuits Vd2 to dn can continue to operate until the output rating is exceeded and an overcurrent is detected. However, the remaining DC power supply circuit d! If the output capacity of ~dn is exceeded, one of the DC power supply circuits d and ~dn with the earliest detection level will overcurrent and be cut off.Repeat this and immediately turn off the remaining DC power supply circuits d and ~dn. It becomes a blockage. Therefore, there is a possibility that each DC power supply circuit continues to operate with an output current that exceeds the rating and during the detection of an overcurrent, and the elements of the It current power supply circuits d, to dn become electrically and thermally overloaded. There is a risk that the level of convenience will decrease.
本発明の電源制御方式は七ｎそれの出力を接続した共通
出力を負荷に供給するｍ個の直流電源回路と、前記ｍ個
の直流電源回路のうちあらかじめ設定し九ｆｆＮ個（但
しＮ１ｍ）の数の直流電源回路の出力が過電流まｔに不
足電流の時は警報信号を出力する警告手段と、前記ｍ個
の直流電源のうち前記Ｎｔ−越える個数の直流電源回路
が過電流または不足電流の時は前記ｍ個の直流電源回路
上遮断する遮断手段とを含んで構成される。The power supply control system of the present invention includes m DC power supply circuits that supply a common output to the load by connecting their outputs, and 9ffN (N1m) of the m DC power supply circuits that are set in advance. a warning means for outputting an alarm signal when outputs of a number of DC power supply circuits are overcurrent or undercurrent; In the case of , it is configured to include a cutoff means for cutting off the m DC power supply circuits.
次に、本発明の実施例について図面上参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示す。第１図において１本
実施例はｎ個の直流電源回路Ｄ１〜Ｄｎの出力が共通接
続されていて負荷（ｌ！８１示略）に供給するように構
成されている０この直流電源回路り、−Ｄｎの各々は出
力が過電圧である時に過電圧信号Ｏｖ、〜ＯＶｎ ｆ
出力し、出力が不足電圧である時に不足電圧１ｇ号ＵＶ
、〜ＵＶｎｋ出力し、出力が過電流である時に過電流信
号ＱＣ，〜０Ｃｎｔ出力し、出力が不足電流である時に
不足電流信号ＵＣｎ 〜ＵＣｎ ’（出力する。過′ａ
Ｌ流１６号ＯＣ１〜０Ｃｎｔ！、２人カオア回路９．〜
９ｎの片方に不足電流信号ＵＣＩ〜ＵＣｎは前記オア回
路９１〜９ｎの残りの一方に入力される。制御回路ｄ０
は直流電源回路の共通出力が過電圧である時に過電圧信
号Ｏｖを出力し、不足電圧である時に不足電圧信号ＵＶ
會比出力る０
過電圧信号Ｏｖｌ〜ＯＶｎはオア回路７に入力され、不
足電圧信号ＵＶ、〜ＵＶｎはオア回路８に入力され、オ
ア回路７の出力と過電圧信号Ｏｖがアンド回路９に入力
され、オア回路８の出力と不足電圧信号ＵＶがアンド回
路１０に入力さｎる。FIG. 1 shows an embodiment of the invention. In FIG. 1, the present embodiment is a DC power supply circuit in which the outputs of n DC power supply circuits D1 to Dn are connected in common and are configured to supply a load (l!81 not shown). -Dn are overvoltage signals Ov, ~OVn f when the output is overvoltage.
output, and when the output is undervoltage, the undervoltage 1g UV
, ~UVnk are output, and when the output is an overcurrent, an overcurrent signal QC, ~0Cnt is output, and when the output is an undercurrent, an undercurrent signal UCn ~UCn' (output.
L flow No. 16 OC1~0Cnt! , 2-person Chaoa circuit 9. ~
The undercurrent signals UCI-UCn are input to one of the OR circuits 91-9n. control circuit d0
outputs an overvoltage signal Ov when the common output of the DC power supply circuit is overvoltage, and outputs an undervoltage signal UV when it is undervoltage.
The overvoltage signals Ovl to OVn are input to the OR circuit 7, the undervoltage signals UV to UVn are input to the OR circuit 8, the output of the OR circuit 7 and the overvoltage signal Ov are input to the AND circuit 9, The output of the OR circuit 8 and the undervoltage signal UV are input to an AND circuit 10.
オア回路９．〜９ｎの出力は信号数比較回路１２に入力
さｎ１信号数比較回路１２に入力された数Ｎと比較され
、オア回路９１〜９ｎの出力信号の有為な数が、比較回
路１２に入力された数Ｎより多い場＠ｒは信号１３ｔ−
出力し、オア回路９．〜Ｐｎの出力信号の有為な数が比
較回路１２に入力されｔ数Ｎの時には警報信号ＷＡＲを
出力する。OR circuit 9. The outputs of the OR circuits 91 to 9n are input to the signal number comparison circuit 12 and compared with the number N input to the signal number comparison circuit 12, and a significant number of the output signals of the OR circuits 91 to 9n are input to the comparison circuit 12. If there are more than the number N, @r is the signal 13t-
Output and OR circuit 9. A significant number of output signals of ~Pn are input to the comparison circuit 12, and when the number t is N, an alarm signal WAR is output.
オア回路９の出力と、オア回路１０の出力と信号数比較
回路１２の出力１３の出力はオア回路１１に入力される
オア回路１１の出力ＡＬＭが出力され九時、［流電算回
路り、〜Ｄｔｌｔ−そｎぞｎ遮断し出力を零とする。す
なわち、直流電源回路り。The output of the OR circuit 9, the output of the OR circuit 10, and the output of the output 13 of the signal number comparison circuit 12 are input to the OR circuit 11. Dtlt- is shut off and the output is set to zero. In other words, it is a DC power supply circuit.
〜Ｄｎの少なくとも一つの出力が過電圧となり。At least one output of ~Dn becomes overvoltage.
かつ、直流出力電源回路Ｄ１〜Ｄｎの共通出力が過電圧
となり九時、あるいは直流電源回路り。Also, the common output of the DC output power supply circuits D1 to Dn becomes overvoltage, causing the DC power supply circuit to fail.
〜Ｄｎの少なくとも一つの出力が不足電圧となりかつ直
流電源回路り、〜Ｄｎの共通出力が不足電圧となった時
、あるいは信号数比較回路１２に入力し友数Ｎよりも多
くの台数の直流電源回路Ｄ１〜Ｄｎにおいて過電流ま友
は不足電流が生じ友時に遮断信号ＡＬＭ’に出力し直流
電源回路Ｄ１〜Ｄｎは遮断される。When at least one output of ~Dn becomes undervoltage and the DC power supply circuit is connected, and the common output of ~Dn becomes undervoltage, or when the number of DC power supplies input to the signal number comparison circuit 12 is greater than the number N In the circuits D1 to Dn, when an overcurrent or undercurrent occurs, a cutoff signal ALM' is output, and the DC power supply circuits D1 to Dn are cut off.
また、信号数比較回路に入力した数Ｎの台数の直流電源
回路り、〜Ｄｎにおいて過電流ま九は不定電流が生じた
時に警報信号ＷＡＲｔ−出力し自身過電流又は不足電流
になっ友もの以外は遮断されなく負荷に電源を供給し続
けることが出来る。In addition, when an overcurrent or an undefined current occurs in the DC power supply circuit of the number N input to the signal number comparison circuit, an alarm signal WARt is output when an undefined current occurs in the DC power supply circuit ~Dn. can continue to supply power to the load without being interrupted.
本発明は以上説明しｔ工うに、そｎぞれが接続あれＬｍ
個の直流電源回路の任意のＮ個（但しＮ＜ｍ）の出力が
停止となっ友場曾には、負荷には電流を１個あたりの直
流電源回路の定格の範囲内で供給し続けることが出来る
工うにＮｔ−選んである為、Ｎ個の出力が停止した場会
には警報信号により過電流等の状態を知ることが出来る
ので、運転している個々の信頼度ｔ−＝さないでシステ
ムの信頼［−高めることが出来る。As described above, the present invention has been explained above.
If the output of any N (N < m) DC power supply circuits is stopped, the current must continue to be supplied to the load within the rated range of each DC power supply circuit. Since Nt- is selected for the method that allows system reliability can be increased.
第１図は本発明の一冥流側會示すブロック図、第２図は
従来の電源制御方式を示すブロック図である。
Ｄ１〜Ｄｎ 、ｄ、〜ｄｎ・・・・・・直流電源回路、
Ｄｏ。
ｄｏ・・・・・・電圧安定化回路、ｏｖ、ｏｖ、〜ＯＶ
ｎ・・・・・・過電圧信号、ＵＶ、ＵＶ、〜ＵＶｎ・・
・・・・不足電日号、ＯＣ１〜ＯＣｎ・・・・・・過電
流信号、ＵＣ，〜ＵＣｎ・・・・・・不足電流信号、１
．２．５，６，７，８，１１゜９１〜９ｎ・・・・・・
オア回路、３，４．９．１０・旧・・アンド回路、１２
・・・・・・信号数比較回路、１５・・・・・・比較数
入力端子、ＡＩ、Ｍ・・・・・・遮断出力、ＷＡＲ・・
・・・・警報信号出力。
′ｙｆ５′Ｉ図
′ｊｆ５ｚ図FIG. 1 is a block diagram showing one undercurrent side of the present invention, and FIG. 2 is a block diagram showing a conventional power supply control system. D1~Dn, d, ~dn...DC power supply circuit,
Do. do...Voltage stabilization circuit, ov, ov, ~OV
n...Overvoltage signal, UV, UV, ~UVn...
....Date of power shortage, OC1~OCn...Overcurrent signal, UC, ~UCn...Undercurrent signal, 1
．． 2.5, 6, 7, 8, 11°91~9n...
OR circuit, 3, 4.9.10, old...AND circuit, 12
... Signal number comparison circuit, 15... Comparison number input terminal, AI, M... Cutoff output, WAR...
...Alarm signal output. 'yf5'I diagram'jf5z diagram
Claims (1)
個の直流電源回路と、前記ｍ個の直流電源回路のうちあ
らかじめ設定した数Ｎ個（但しＮ≦ｍ）の数の直流電源
回路の出力が過電流または不足電流の時は警報信号を出
力する報告手段と、前記ｍ個の直流電源回路のうち前記
Ｎを越える個数の直流電源回路が過電流または不足電流
の時は前記ｍ個の直流電源回路を遮断する遮断手段とを
含むことを特徴とする電源制御方式。Supply a common output to the load by connecting each output m
Outputs an alarm signal when the outputs of the DC power supply circuits and a preset number N (N≦m) of the m DC power supply circuits are overcurrent or undercurrent. and a cutoff means for cutting off the m DC power supply circuits when more than N of the m DC power supply circuits are overcurrent or undercurrent. power control method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61071779A JPS62230315A (en) | 1986-03-28 | 1986-03-28 | Electric source control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61071779A JPS62230315A (en) | 1986-03-28 | 1986-03-28 | Electric source control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62230315A true JPS62230315A (en) | 1987-10-09 |
Family
ID=13470393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61071779A Pending JPS62230315A (en) | 1986-03-28 | 1986-03-28 | Electric source control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62230315A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62126827A (en) * | 1985-11-25 | 1987-06-09 | 日本電気株式会社 | Source control method |
-
1986
- 1986-03-28 JP JP61071779A patent/JPS62230315A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62126827A (en) * | 1985-11-25 | 1987-06-09 | 日本電気株式会社 | Source control method |
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