JPS62226745A - Data transmission equipment - Google Patents

Abstract

PURPOSE:To quicken the data transmission and fault detection by allowing a data return means of a slave station to send a return data instantly at the time of an address of the transmission data from a master station is coincident with one's own address and allowing a fault detection means of the master station to detect a fault of the slave station depending on the presence of prescribed in formation of the said return data. CONSTITUTION:A data processing unit 7 of a master station 3 generates a transmission frame RD added with address information of a slave station 5 and sends the result to the desired slave station 5. The address information is compared with its one's own address information from an own station SA generating circuit 55 by an SA coincidence detection circuit 57 of the slave station 5, and when both the information are coincident, the slave station 5 starts a transmission data edition circuit 41 from the circuit 57 instantly from the circuit 57 via a transmission start circuit 47 and returns the return frame SD from a data processing unit 39 to the master station 3. Thus, the transmission of the frame SD is quickened and a fully duplex transmission line 1 is used efficiently. When the slave station 5 is at fault, no frame SD is sent. Such a result is decided by using an FS reception end timeout detection circuit 23 to detect that a prescribed field of the frame SD is not received within a prescribed timeout time by an FS extraction circuit 21.

Description

Detailed Description of the Invention [First aspect of the invention] (Field of industrial application) The present invention relates to a data transmission device for transmitting data between a master station and a slave station connected to a full-duplex transmission line, for example. .

(Prior art) As shown in FIG.
In a 1-to-N/l"! data transmission device in which a slave station 5 and a cold number slave station 5 are connected, each slave station 5 is sequentially transmitted from the master station 3, and the information from each slave station 5 is transmitted to the master station 3. A polling method of data transmission called transmission is carried out.More specifically, in this data transmission, the master station 3 includes the address information of the slave station 5 to be called. Send (
g data, that is, a transmission frame, is transmitted to the downlink 1a of the transmission path 1, and each slave station 5 receives this transmission frame,
J3 in each slave station 5 compares the slave station address information included in this received frame with its own address, and only the slave stations 5 with matching addresses are sent to the master station via the uplink 1b of the transmission path 1. 3, a return frame is sent.

In this case, the timing of the return frame from the slave station 5 with respect to the transmission frame from the parent station J, i3 is as shown in FIG. The slave station 5 transmits the return frame SD to the master station 3 after all the frames have been completely received and the transmission frame RD has been completely sent.

In addition, the master station 3 sent a transmission frame 1] to the child JY 5, but for example, because a failure occurred in the slave station 5, the slave station 5 sent a return frame SI) to the master station 3.
If this is not transmitted, the master station 3 must detect this failure in the slave station 5 and promptly take countermeasures against the failure. Conventionally, in order to detect such a failure in the slave station 5 at the master station 3, the master station 3 transmits an iF frame RD, and the response frame SD is Point I!ll5D- is aware that there is no transmission from slave station 5 that could be accepted, but this return frame S D
Detection of the absence of transmission is performed at timing Tsd after the return frame SD is completed, as shown in FIG. 8. In addition, in Fig. 8, J'3 is the return frame SD.
The time Tm from the break point Ten of the transmission violation to the 1!5 point 1''sd is the fault detection margin time.

(Problems to be Solved by the Invention) As described above, in response to the transmission frame RD from the master station 3, the return frame SD from the slave station 5 is transmitted by receiving the transmission frame RD by the slave station 5. However, since it is carried out after the transmission frame RD has been completely transmitted, it takes time even though it is full-duplex transmission line 1, and because of this, it is necessary to wait until either full-duplex transmission line 1 Since one side is always vacant, there is a problem that it is inefficient and uneconomical.

The timing of failure detection in the J3LJ slave station 5 in the master station 3 is, as described above, at the I+,'i point 1-sd after the timing of the return frame SD from the slave station 5 has ended, and There is a problem in that the failure detection units 114 become closer for a time corresponding to the transmission time of the return frame SI), making it impossible to detect failures quickly.

The object of the present invention has been made in view of the above, and its object is to provide a data transmission device capable of quick and efficient one-day transmission and failure detection. It is about providing.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the objective stated in [], the present invention provides a means for receiving transmission data transmitted from a master station by a data return means provided to a slave station. Then, when the address information () in the transmitted data matches its own address information, it immediately returns 1 to the master station.
- the master station receives the return data from the slave station at the first stage of failure detection in the master station, and the return data includes 1
3. Detects failure of the slave station based on the presence or absence of predetermined information in 1"
The main point is to

(For fI) In the data transmission device of the present invention, J3 in the slave station receives transmission data transmitted from the master station, and when the address information in the transmission data matches its own address information, the master station immediately It sends return data to the master station, receives the return data from the additional slave station, and detects a failure in the slave station based on the presence or absence of predetermined information included in the returned data. .

(Example) The present invention will be described in detail below with reference to the drawings.

FIG. 3 is an overall configuration diagram to which a data transmission device according to an embodiment of the present invention is applied, and FIGS. 1 and 2 respectively show a master station 3 used in the data transmission device of the present invention. i
FIG. 2 is a configuration diagram of an embodiment of a slave station 5. FIG.

The master station 3 shown in FIG. The data is supplied to a data processing device 7. The data transmitted from this data processing device 7 to the slave station 5 is supplied to a parallel-serial (PS) conversion circuit 11 via a transmission data editing circuit 9, where it is converted from a 116-column signal to a serial signal. The received signal is modulated and transmitted to the downlink 1a of the full-duplex transmission path 1 as a transmission frame RD. A transmission start circuit 31 is connected to the transmission data editing circuit 9, and the transmission data editing circuit 9 starts a data transmission operation under the control of the transmission start circuit 31.

Further, the data transmitted from the c slave station 5 via the uplink 121b, that is, the return frame SD, is sent to the master station 3 via the demodulation circuit 15 in a serial-parallel (Sl) format.
) The signal is supplied to a conversion circuit 17, where it is converted from a serial signal 8 to a parallel signal 5, and further supplied to a data processing device 7 via a received data editing circuit 19.

By the way, in this data transmission device, J3 has 1-IDL.
Data transmission is performed according to the C (-J/r high level data link control) protocol, but this Hl)
A frame, which is a unit of data transmission in the LC protocol, has a frame structure as shown in FIG. This I-I DLC frame has a flag sequence field FS, a station address field SA
, control field C1 data field D, ...
- Consists of frame inspection jitance field ORC, etc. The flag sequence field FS is used to indicate the beginning of a frame. Further, the station address field SA is a part in which the address of the destination of the frame transmitted on the transmission path 1 is set, and in the case of a frame transmitted from the master station 3, the address of the slave station 5 is set. Control field C is used to control the sea lions, and data field D is the transmission data portion. The frame check sequence field CQC is used to check errors in data using CRC.

Therefore, when the base station 3 receives a frame based on such an l-I DLC protocol from the uplink 1b, the base station 3 receives this received frame, 'IK
In order to detect the flag sequence field FS in the return frame S I) of the slave stations 5/) 11, etc., the S
The output signal of the P conversion circuit 17 is monitored by the FS extraction circuit 21. Therefore, an FS reception completion timeout detection circuit 23 is connected to the output of the FS extraction circuit 21, and the FS reception completion timeout detection circuit 23 is connected to the output of the FS extraction circuit 21. , [: If J3 is in the S oil output circuit 21 and the flag sequence field "S" is not received within a predetermined time, the FSS
Reception completion timer 1 to timeout from output circuit 23 (
No. i2 is output, and the transmission start circuit 31 is controlled by No. i1) to stop arc transmission, and at the same time, a timeout signal from the PS receiver (ffi completion timeout detection circuit 2) is output. The abort sequence (Δ
S)'1ffi circuit 25 is activated, and from this As insertion time 'tFI 25, an abort sequence signal is transmitted to downlink 1a via I) S conversion circuit 11 to terminate data transmission.

Further, a normal reception end detection circuit 27 is connected to the output of the received data editing circuit 19.
7 is connected to the transmission start circuit 31 and the normal reception end timeout detection circuit 29. In addition, the output of the transmission start circuit 31 is transmitted to the normal reception end timeout detection circuit 29.
It is connected to the FS reception completion timeout detection circuit 23 and starts each timer at the start of transmission. The output of the normal reception end quimout 1 detection circuit 29 is connected to the transmission start circuit 31.

Next, referring to FIG. 2, regarding the configuration of -C-7- station 5,
explain.

The transmission frame RD transmitted from the master station 3 via the downlink 1a is demodulated by the demodulation circuit 33, converted into 11&column 13 by the S l) conversion circuit 35, and sent to the received data editing east circuit 37. 1 supplied to the processing device 39, and data transmitted from this data processing device d39 to the master station 3, that is, the return frame SD, is supplied to the S conversion circuit 43 via the transmission data editing east circuit 41. The signal is transmitted through the modulation circuit 45 and converted into a serial signal.
b, and is transmitted to the parent 143. A transmission start circuit 47 is connected to the transmission data editing east circuit 41, and data transmission is performed from the transmission data editing circuit 41 under the control of the transmission start circuit 47.

Further, an error detection circuit/19 and an SΔ output circuit 53 are connected to the output of the S I'') conversion circuit 35.
The error is detected by monitoring the transmitted frame RD sent from (1+). This detection signal -1 is the AS insertion circuit 51
Drive - Goru. When the slave station 5 is transmitting, the ΔS insertion circuit 51 transmits the appointment signal ΔS to the parent station 7a3 via the I)S conversion circuit 43, and receives the data from the slave station 5. Abort transmission.

On the other hand, the extraction circuit 53 to S monitors the transmission frame RD transmitted from the master station 3, extracts the station address field SA therein, and sends the address information of the extracted station address field SA to the own station S. Self from generation circuit 55):? The address information of z is compared with the SA number configuration circuit 57 to detect a transmission frame RD containing the same address information as the address information of the own station. When the transmission frame RD containing the same address information as the own station address is detected, the SA-number configuration circuit 57
sends the matching signal for the first time! 1f) supplying the circuit 47;
Drive the transmission data editing circuit 41 from the transmission start circuit 47 to send the return frame SD from the data processing FI+ device 39;
As mentioned above, the transmission data editing circuit 41.1)
It is supposed to be sent to.

Next, the operation of this embodiment will be explained with reference to the timing shifts shown in FIGS. 5 and 6.

In order for the master station 3 to transmit data to a desired slave station 5, the data processing device 7 creates a transmission frame RD in which the address information of the slave station 5 is set in the station address field SA. Then, this transmission frame RD is transmitted from the data processing Ill device 7 to the downstream Fl 11a via the transmission data 12 east circuit 9, PS conversion circuit 11, and modulation circuit 13 in a manner similar to the RD shown in FIG. This downlink ["If fa 1 transmitted frame 1 sent to 1"] is the final result of JN 5 and demodulation circuit 33 at J3.
The SΔΔ output circuit 53 of each slave station 5 extracts address information from the station address field SA of the transmission frame RD. This address information is sent to the own station S in the SA-number output circuit 57.
The address information of each slave station 5 from 5 to 5 is compared with the local address information of each slave station 5. Therefore, the child FJ5 whose address information does not match ignores the received transmission frame RD because it is not for its own station, but the child station 5 whose address information matches both immediately sends the SA-number when it detects this match. Activate the send 11 data editing circuit 41 from the configuration circuit 57 via the transmission start circuit/17,
Filter processing unit? J39 sends a return frame SD having the same configuration as shown in FIG.
PS conversion circuit/I3, modulation [shown as SO in Fig. 5 to uplink 1b via route 111 45'! Send it to J and send it back to master station 3.

Zunara, the slave station 5 receives the transmission frame RD from the rJJ station 3.
The timing from receiving the return frame SD to transmitting the return frame SD to the master station 3 is immediately after confirming the reception of the station address field SA of the transmission frame RD, as shown in FIG.

Therefore, as can be clearly seen from the comparison with the conventional timing shown in FIG.
! 1a and uplink 1b are used efficiently at the same time.

Next, transmission frame 1 is sent from the master station 3 to the desired slave station 5.
<1] was sent, but the return frame S l) was sent from slave station 5.
The operation of detecting the failure of the child 115 by detecting the absence of the child 115 on the master station 3 side will be described with reference to FIG.

As in the above case, if the master station 3 sends a transmission frame RD to a desired slave station 5 via the downlink 1a, if the slave station 5 is normal, the slave station 5 extracts the station address field SA of this transmission frame RD, detects a match in the address information, and sends the return frame S.
Climb up D! f! 111b to the master station 3 as shown in FIG. 5 or as shown by the dotted line in FIG.
) is sent at a predetermined timing, but if the slave station 5 is in trouble, this return frame SI
) will not be sent. This is the F of master station 3.
J3 is in the S I+b output circuit 21 and the return frame S I
) flag sequence field "S" is received within the predetermined timer l-11, 1 corresponding to the timing mentioned (
It is determined that the FS reception completion timeout detection circuit 23 detects that the FS reception completion timeout detection circuit 23 is unable to complete the Fi-J.
A timeout signal will be output from 3.

More specifically, referring to FIG. 6, at the timing of the return frame SD (not shown by the dotted line), the flag sequence field +"s h<if not present, the FS reception) is completed.Timeout 1~Detection circuit 23 It's time to go to J3
- An error detection margin time Tn corresponding to the time is provided after the time point -rfs when the flag sequence field l'S is detected, and when the flag sequence field FS of the return frame SD is not detected within this margin Tn, the slave station 5 is determined to be a failure, and the F'S reception completion timeout detection circuit 23 outputs a timeout period. Then, this timeout signal drives the above-mentioned J:uniAs insertion circuit 25 to send the abort sequence signal 3 to the downlink 1 via the S conversion circuit 11 and the modulation circuit 13.
Sending to a.

However, the failure of the slave station 5 is not determined after the master station 3 has completely transmitted the transmission frame Rl, but rather the failure is detected by the return frame S sent from the slave station 5 immediately after transmission.
The timeout period of D is monitored and the process is executed quickly.

[Function of 'fF, light] As explained above, according to the present invention, the child kW immediately sends back data at the point 14' at which address information is received without receiving all transmitted data from the master station. This allows for quick and efficient data transmission, and the parent J4 can check the presence or absence of specified information included in the returned data from the child station without having to wait until the completion of the returned data from the child station. C1 that detects a failure can quickly detect a failure in the child JIIJ.

[Brief explanation of drawings]

Claims (4)

[Claims] (1) A data transmission device that transmits data between a master station and a slave station, where the slave station receives transmission data sent from the master station, and the address information in the transmission data matches its own address information. a data return means for immediately transmitting return data to the master station when the master station receives the return data from the slave station, and detects a failure of the slave station based on the presence or absence of predetermined information in the return data; What is claimed is: 1. A data transmission device comprising: failure detection means. (2) The data transmission device according to claim 1, wherein the address information is provided at the front of the transmission data, and the predetermined information is provided at the front of the return data. . (3) The data transmission device according to claim 1 or 2, wherein the predetermined information is a flag sequence field in return data. (4) The data transmission device according to claim 2 or 3, wherein each of the data has a frame structure based on an HDLC (high level data link control) protocol.