JPS62224874A - Ic card read/write device - Google Patents

Abstract

PURPOSE:To prevent a damage on respective devices because of the shortcircuit between contact pins from being occurred by providing a means to detect the shortcircuit between all of the pins when an IC card is inserted. CONSTITUTION:The card transfer part 5 of the read/write device 2 is provided with six pieces of contact pins CLK-Vpp that contact the respective contact points of the IC card 1. Each pin is connected to each of the I/O terminals P2.2-P2.6 of a CPU9. The CPU9 detects the shortcircuit between optional two of the contact pins corresponding to a signal inputted to each I/O terminal when the contact points of the card 1 contact respective contact pins. When the CPU9 detects the shortcircuit the motor 19 of the part 5 is driven to transfer the card 1. As a result, the damage on respective devices owing to the shortcircuit between contact pins can be prevented from being occurred.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to an IC card reading/writing device.

(Prior art and its problems) Generally, an IC card has a built-in electrically rewritable non-volatile memory (EEPROM) and a CPU (central processing unit) that controls reading and writing of this memory. It is connected to the read/write device through the power input contact, ground contact, information input/output contact, reset contact, and clock contact provided on the exposed surface of the card. It has become.

On the other hand, the read/write device has a contact pin that makes electrical contact with the corresponding contact point of the IC card, and the IC card is
When the card is brought in, the contacts of the card are brought into contact with the contact pins to supply power, clock, and reset signals to the IC card, and to connect the IC card to the input/output terminals of the CPU.

It is configured to read and write to an IC card.

In such a conventional read/write device, when an IC card is brought in and the contacts of the IC card come into contact with the contact pins, power is immediately supplied to the IC card and the IC card is ready for reading and writing. If a conductive plate such as a steel plate is inserted as a result of mischief, or if there is a short circuit between the contacts of the IC card due to the adhesion of foreign matter, etc., there is a risk that the contact pins may be short-circuited, which may interfere with reading and writing processes. there were. In particular, if a short circuit occurs between the power supply contact pin and the ground contact pin, damage to the power supply circuit may occur, even if an overcurrent limiting circuit is used to prevent damage to the power supply circuit. There is a problem in that the power supply voltage remains at Ov, and unless a recovery operation is performed, the σ operation will stop from then on, which will impede read and write processing. Also, short circuits may occur between the information input/output contact pin and the ground contact pin, between the clock contact pin and the ground contact pin, or between the information input/output contact pin and the power supply contact pin, etc. In case, IC
There is a problem in that there is a risk of damage to the input/output circuits in the card and the continuous writing device.

(Object of the Invention) The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an IC card reading/writing device that can prevent damage to each device due to short circuit between contact pins.

(Means for solving problems) In order to achieve the above object, in the present invention.

A growing number of IC cards are provided with contact pins that contact each of a plurality of contact points provided on the IC card, and read/write processing of information in the IC card is performed via each of the contact pins. In the writing device, the above I
A detection means is provided for detecting a short circuit between all of the contact pins when the C card is carried in, and when it is detected that at least any two of the contact pins are short circuited. The configuration is such that the IC card is taken out.

(Example) An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 is an IC card, and 2 is an IC card reading/writing device.

The IC card 1 includes an electrically rewritable non-volatile memory 3 (EEPROM) and a CPU 4 that controls reading and writing of the memory 3.

Six contacts elk, ilo, rst, gn for connecting the memory 3 and CPU 4 to the reading/writing device 2
d.

vcc and vpp are provided exposed on the card surface. Contact clk is for clock signal input, contact i
/.

is for inputting and outputting information, contact rst is for inputting a reset signal, contact gnd is for grounding, contact vcc is for inputting operating power, and contact vpp is for inputting write power to the memory 3.

More and more writing devices! 2, the IC card 1 is placed in the card transport section 5.
six contact pins CLK, I that make electrical contact with the contacts of
10. It is equipped with R3T, GND, Vcc, and Vpp.

The contact pin CLK is for a clock signal and contacts the contact elk of the IC card 1. The contact pin I10 is for information input/output and makes contact with the contact i10 of the IC card 1.

The contact pin R8T is for a reset signal and contacts the contact rst of the IC card 1. The contact pin GND is for ground and makes contact with the contact GND of the IC card I.

The contact pin Vcc is for supplying operating power and is in contact with the contact Vcc of the IC card 1. The contact pin VPP is for supplying write power and is in contact with the contact point vpp of the IC card 1.

These contact pins are introduced into the read/write section 6 of the continuous write device 2.

Contact pin CLK is connected via tristate buffer 7 to an output terminal of oscillator 8 that provides a clock signal. The contact pin I10 is connected to the output terminal P1.1 and the input terminal P of the CPU 9 of the read/write unit 6 via an anti-parallel connected tri-state buffer 11.12.
Connected to L, 3. Contact pin R8T is
It is connected to the output terminal P1.5 of the CPU 9 via the tri-state buffer 10. Each tri-state buffer 7°, 10, 11.12 (7) control terminals are the output terminals PL, 0. Pl, 6. PL, 2
．． These control terminals are controlled by the CPU 9 to either the L level or the H level. Tri-state buffer 7, 10.11.
12 is.

When the control terminal is at the L level, the input signal is output as is, and when the control terminal is at the H level, the output becomes a high impedance state. Therefore, tristate buffer 7.10, 11,
When the output of 12 is in a high impedance state, contact pin CLK, I10°RST and contact e of IC card 1
lk, i10. Even if rst is in contact with I
C card 1 and CPU 9 are electrically disconnected (
off). Contact pin GND is grounded via a contact of relay 13. Contact pin Vcc
is connected to the power supply circuit 16 via the contacts of the relay 14. Contact pin VPρ is connected to power supply circuit 16 via a contact of relay 15. Each relay 1
3.14.15 each has a transistor Trt+Tr,, Tr as a relay driving element.

are connected in series and supplied with current from the battery.

The bases of the transistors Tr, Tr, and Tr are connected to the output terminals P1, 7, . R2,1°22.
Connected to 0. Therefore, each relay 13°14, 1
Each contact of 5 is a transistor T rl.

Opening/closing is controlled by the CPU 9 via Tr, Tr.

The CPU 9 controls multiple contacts el of the IC card according to the signals (voltages) input to the input/output terminals P2.2 to P2.6.
k, i10. rsL gnd, vcc, vpp
and each contact pin CLK, I10. R8T, GND,
Vcc.

When in contact with Vpp, a short circuit between any two of the contact pins is detected, and the input/output terminals P2.2 to P2.6 are connected to the specified locations below. be done. Input/output terminal P2.2 is connected between tristate buffer 7 and contact pin CLK. Input/output terminal P2.3 is connected between tristate buffer 1o and contact pin R8T.

Input/output terminal P2.4 is connected between the contact of relay 15 and contact pin VPP. Input/output terminal P2.5
is connected between the contact of the relay 14 and the contact pin Vcc.

The input/output terminal P2.6 is connected between the contact of the relay 13 and the contact pin GND. These input/output terminals P2.2. R2,3, R2,4, R2,5, R2,6
are grounded via resistors R2, R, , R4, R, , R, respectively.

On the other hand, a power supply circuit 16 is connected between the tristate buffers 11 and 12 and the contact pin I10 via a resistor R1.
A voltage Vcc from is applied.

Further, the CPU 9 inputs and outputs the input/output terminals P2.2. R2
, 3° R2,4, R2,5, or - or R2,6 is set to a high level.

Contact pin CLK, I10. R3T, GND.

The card transport unit 5 provided with VcctVpp includes an IC
A transfer roller 18 for loading and unloading the card 1, a motor 19 for driving the transfer roller 18, a limit switch 20 for detecting the insertion of the IC card 1, and a limit switch 21 for detecting the completion of loading the IC card 1. It is provided. The motor 19 is connected to the CP via a motor drive circuit 22.
It is under the control of U9. limit switch 20,
21 is connected to the CPU 9, thereby providing an I
C-card 1 insertion information and carry-in completion information are given.

It should be noted that the structure is such that the contact pins and the contacts come into contact after the IC card 1 is loaded.

FIG. 2 shows a flowchart of a read/write processing program executed within the CPUQ of the read/write device 2 of FIG.
The processing procedure of this program will be explained below.

When the read/write device 2 is powered on, first.

In step 1, the CPU 9 of the reading/writing section 6 is initialized. Next, in step 2, the CPU 9 sends the relays (RLYI to RLY
3) Set the contacts 13, 14, and 15 in the open state (open), and in step 3, the tristate buffers 7, 10, 1
1.12 and turn off the input/output terminals P2.2~P.
2. Set all 6 to high impedance state.

After this, the device enters a state of waiting for insertion of the IC card 1 (step 4).

Insertion of the IC card 1 is recognized by the operation of the limit switch 20, and upon this recognition, the process of importing the IC card 1 is performed (step 5). The carrying-in process is performed through drive control of the motor 19 based on the detection of the limit switches 2o and 21, whereby the contact pins of the continuous writing device 2 and the contacts of the IC card 1 are brought into contact.

In this state, the contact pins Vcc and Vpp are disconnected from the power supply circuit 16 by opening the relays 14 and 15, so when the IC card 1 is loaded.

Even if the contact pins Vcc and Vpp are short-circuited with the ground contact pin GND for some reason, the power supply circuit 16, IC card 1, reading band, and sending device 2 will not be damaged.

After the IC card 1 is carried in, first, in step 6, it is determined whether all input/output terminals P2.2 to P2.6 are at low level. In this case, the input/output terminals P2.2 to P2.6 are all set to high impedance in step 3, and the terminals P2.2 to P2.6 are grounded through the resistors R2 to R, respectively. Therefore, the contact pin I10 is the contact pin CL K r RS
T t VpP+ In a normal state without shorting to Vcc and GND, input/output terminals P2.2 to P2.
6 are all low level. However, contact pin I10 and contact pin CLK, , RST, Vp
When at least one of P, Vcc, and GND is short-circuited, voltage Vcc is applied via the short-circuited contact pin and resistor R0, so that input/output terminals P2.2 to P2.6 At least one of them will be at a high level.

The determination result in step 6 is negative (No). Incidentally, the resistance values of R to RG are determined in consideration of the input impedance of each contact of the IC card 1 so that the above-mentioned discrimination can be made.

If the determination result in step 6 is negative (NO), P2.
2 to P2.6, a high level one is detected.

As a result, contact pin I10 and contact pin CL
It detects which of K, RSTt VPP+ Vcc, and GND is short-circuited and stores it in a storage device (not shown) connected to CPU 9, and prevents the use of IC card 1 by alarm, display, etc. The status is communicated to the person (step 19).

After that, the card ejection process (
In step 18), the IC card 1 is taken out and the process returns to step 2.

If the determination result in step 6 is positive (Yes), input/output terminal P2.2 is set to high level (step 7
) A predetermined voltage is applied from the input/output terminal P2.2 to the contact pin CLK, and in the next step 8, the input/output terminal P2.
3 to P2.6 are all at low level. In this case, in step 6, the contact pin I10
and contact pins CLK, R8T, Vpp, Vcc, G
It has been confirmed that none of the NDs are short-circuited.

Contact pin CLK and contact pin R3T.

Unless there is a short circuit with at least one of Vpp, Vcc, and GND, all input/output terminals P2.3 to P2.6 are at a low level. However, contact pin CLK and contact pin RST, VPP+Vcc, G
When at least one of the input/output terminals P2.3 to P2.6 is short-circuited, at least one of the input/output terminals P2.3 to P2.6 becomes high level, and the determination result in step 8 is negative (No). Become.

When the determination result in step 8 is negative (No), P2.
The high level one among 3 to P2.6 is detected, and this causes contact pin CLK and contact pin R5T, V
Detect which one of pp, Vcc, GN, and D is short-circuited, memorize it, and communicate the status to the user as described above (step 20). In step 18, the IC card 1 is carried out, and the process returns to step 2.

If the determination result in step 8 is affirmative (Yes), input/output terminal P2.3 is set to high level (step 9
) A predetermined voltage is applied to contact pin R3T, and in the next step 10 it is determined whether all input/output terminals P2.4 to P2.6 are at low level. In this case, since it has been confirmed in steps 6 and 8 that the contact pins I10 and CLK are normal, the contact pins RS
Unless T is short-circuited with at least one of the contact pins VPP+Vcc and GND, all input/output terminals P2.4 to P2.6 are at a low level. However, contact pin R8T and contact pin v
PPy Vcc.

When at least one of the GNDs is short-circuited, the determination result in step 10 is negative (No).

If the determination result in step 10 is negative (NO), P2
．． The high level one among 4 to P2.6 is detected, and as a result, contact pin R8T and contact pin Vpp,
Which of Vcc and GND is short-circuited is detected and memorized, and the state is communicated to the user as described above (step 21). Thereafter, the IC card is carried out in step 18, and the process returns to step 2.

When the determination result in step 10 is affirmative (Yes), the input/output terminal P2.4 is set to high level (step 11), a predetermined voltage is applied to the contact pin VρP, and in the next step 12, the input/output terminal It is determined whether any of P2.5 and P2.6 are at low level. in this case,
In steps 6.8 and 10 above, contact pin I10.
Since CLK and RST have been confirmed to be normal, contact pin Vpρ and contact pins vcc and G
As long as at least one of the input/output terminals P2.5.ND is not short-circuited, the input/output terminals P2.5. Both P2.6 are at low level. However, when the contact pin VPP and at least one of the contact pins Vcc and GND are short-circuited, the determination result in step 12 is negative (NO).

If the determination result in step 12 is negative (NO), P2
．． 5. The high level one among P2.6 is detected, and the contact pin VPP and contact pin vcc are thereby detected.
, GND is detected and memorized, and the state is communicated to the user as described above (step 22).

Thereafter, the IC card 1 is carried out in step 18, and the process returns to step 2.

When the determination result in step 12 is affirmative (Yes), the input/output terminal P2.5 is set to high level (step 13), a predetermined voltage is applied to the contact pin Vcc, and in the next step 14, the input/output terminal It is determined whether P2.6 is at low level. In this case, steps 6, 8.
Contact pin 10°CLK, RST at 10 and 12
and VPP are confirmed to be normal, so unless the contact pin Vec and contact pin GND are short-circuited, the input/output terminal P2.6 will be at a low level. However, when contact pin Vcc and contact pin GND are short-circuited, the determination result in step 14 is negative (NO).

When the determination result in step 14 is negative (No), the fact that the contact pin vCC and the contact pin GND are short-circuited is memorized, and the state is communicated to the user as described above (step 2゛3). The IC card is carried out in step 18, and the process returns to step 2.

When the determination result in step 14 is positive (Yes), each contact pin CLK, I10. R5T.

Any two of G N D t Vcc, vPP
None of the contact pins are shorted, so step 1
5 tri-state buffer 7.10,11゜1
An L level signal is applied to the control terminal of P2, and the input signal is passed through as is, that is, it is in the ON state, and the input/output terminal P
2.2 to P2.6 are all set to high impedance state. Next, in step 16, the relay 13 is closed, the contact pin GND is grounded, and the relays 14.15 are closed, and the contact pin Vcc is grounded.
, VPP is connected to the power supply circuit 16. Thereafter, reading and/or writing is performed through contact between the contact pin I10 and the contact point i10 (step 17), and upon completion of this, the IC card 1 is ejected by reverse control of the motor 19 (step 18), and then the process returns to step 2. Then, preparations are made for processing the next IC card.

(Effects of the Invention) As described in detail above, the IC card successive writing device of the present invention is provided with contact pins that contact each of the plurality of contacts provided on the IC card. In an IC card continuous writing device that performs read/write processing of information in the IC card through each contact bin, short-circuits between all contact pins of the respective contact pins are prevented when the IC card is carried in. The IC card is equipped with a detection means for detecting, and when it is detected that at least any two of the contact pins are short-circuited, the IC card is taken out.
When a contact pin for power supply is short-circuited due to the insertion of an iron plate or the like or conductive deposits on the surface of an IC card, the contact pin and the power supply can be prevented from being connected.
Malfunctions and damage to the read/write device can be prevented.

In addition, even if any two contact pins are short-circuited, read/write processing can be prevented from being performed.
It is also possible to completely prevent damage to input circuits in IC cards and read/write devices.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the IC card continuous writing device of the present invention, and FIG. 2 is an operation flowchart of the device shown in FIG. 1...IC card, 2...Reading/writing device, CLK. Ilo, R5T, GND, Vcct vPP”':r'
tact pin, elk, ilo, rst, gnd,
vcc, vpp...contact, 13, 14, 15...relay, 16...power supply circuit.

Claims (1)

[Claims] 1. An IC card reader comprising contact pins that contact each of a plurality of contact points provided on an IC card, and reading and writing processing of information in the IC card is performed via each contact pin. The writing device includes a detection means for detecting a short circuit between all of the contact pins when the IC card is carried in,
An IC card reading/writing device, characterized in that the IC card is ejected when it is detected that at least any two of the contact pins are short-circuited.