JPS62221762A - Microcomputer - Google Patents

Abstract

PURPOSE:To attain an operating system OS which is free from error by reading out information set in response to each peripheral device and producing automatically the OS incorporating peripheral devices based on said information. CONSTITUTION:I/F cards 7 for peripheral devices are provided to all peripheral devices incorporated in a microcomputer system. When the computer system rises, a card information request command is inputted to a card information answer circuit 13 from a CPU card 1 loading an OS. Thus the card 7 transmits the card information and card name, i.e., those contents of an interruption number setting device 8, an I/O address setting device 9 and a memory address setting device 10. A peripheral deice I/F card recognizing circuit 5 stores the card information on answers in a card information store memory 4. Then a program is executed to incorporate the peripheral device corresponding to the card 7 to the OS. Thus the OS incorporating peripheral devices is obtained in accordance with the card information stored in the memory 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer system configured by incorporating various peripheral devices, and particularly to its operating system (hereinafter abbreviated as OS) VC.

[Conventional technology]

Conventionally, an OS for a microcomputer in which various peripheral devices (ie, input/output devices) are to be incorporated has been generated at the time when the specifications of the device to be incorporated have become clear. Therefore, the OS had to be changed every time the specifications of the peripheral device were changed.

[Problem to be solved by the invention 3 As mentioned above, in conventional microcomputers, the entire O8 must be rebuilt every time the specifications of peripheral devices are changed.
However, due to human error in the specifications of peripheral devices, an incorrect O8 may be generated, and work may be required to correct this error.

This invention was made to solve the above-mentioned problems, and it automatically reads the information set corresponding to each peripheral device and installs each peripheral device based on this read information. The object is to obtain a microcomputer that can automatically generate O8.

[Means for solving problems]

In this invention, each peripheral device is provided with a peripheral device interface card (hereinafter, the interface is abbreviated as ■β), and various data necessary for incorporating the peripheral device into the O8 are set in the installation part of the card. A setting device is provided to set each data, and the peripheral device ■24 is installed on the CPU card on which the O8 for this microcomputer is installed.
゛Equipped with a card recognition circuit and I/fi for each peripheral device.
A card information response circuit is provided in the card, and each card information response circuit and the peripheral device I/F card recognition N path are connected through a common card interconnection and 4゛ bus. By the command signal from the Ei' card recognition circuit,
Each card information response circuit reads the data set in the setting device of the corresponding peripheral device, 4゛ card, and
/Send as card information to F bus, for peripheral devices■74
74 Card Recognition The sent card information is written into the card information storage memory, and an OS is generated based on the contents of the card information storage memory.

[Effect]

O8 can be automatically generated by simply setting data for the peripheral device in the setting device of each peripheral device I/F card.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which (1) is a CPU card equipped with an OS, (2)
is a card number setter attached for card identification (hereinafter the number is abbreviated as grave) (3) is a 24゛ circuit between cards, (
4) is the memory for storing card information, +21, +31
, +41 INF card recognition circuit for peripheral devices (5
) Complete configuration. (6) is the inter-card I that connects all cards.
/F bus.

In addition, (7) is a 24゛ card for peripheral devices provided corresponding to each peripheral device of all the peripheral devices incorporated in this microcomputer system. Di8
1 is an interrupt setting device that specifies an interrupt to the CPU card (1), and (9) is an input/output device on the peripheral device I/F card (7) when accessed from the CPU card (1). (10) is the 1/F' card (7) for peripheral devices when accessing from the CP card 11).
+81, [91, (1,0) are collectively referred to as the setting device in this document, and the data set in the setting device is the memory address setting device that sets the address of the memory above. The various data required to generate the OS when the device is incorporated into this microcomputer system are called card information.

(11) Reads the contents of the setting device +8), +91, (10) Setting contents read ■ 74゛ 74, (12) Reads the settings contents ■ 74゛ 74 (11) Reads all the settings contents. This is a setting content reading and inter-card circuit that sends card information via all 24 busses (6) between cards. +21, (11), (12) Nyori card information response circuit (13)'.

Although only one peripheral device I/F card (+71-1) is shown in FIG. 7) is provided, and the card information response circuit (13) of each card is connected to the β bus (6) between the cards.
are connected in parallel with each other.

The Wjz diagram is a block diagram showing an example of the numbers that should be set in the card shop setting device of each card.
As a card shop, set the value to 0, and as a card shop for ■β card (7) for peripheral devices, set the value to 1,2°3,...i,
... All examples of setting Mk are shown. However, M represents the total number of peripheral devices that can be incorporated into this microcomputer system.

The operation will be explained below. Figure 3 shows the peripheral device I/
FIG. 4 is a flowchart showing the operation of the F card recognition (b) path (5), and FIG. 4 is a flowchart showing the operation of the card information response circuit (13).
(44) indicates each step.

When the hardware system is powered on or the hardware system is reset, the inter-card Iβ
The circuit operates to execute the steps shown in FIGS. 3 and 4. That is, in step (32) the card I/
A card information request command is sent from the F circuit (:3) to the card &i on the card interface β bus (6).

This command is input to all the card information response circuits (13) and transferred from steps (42) to (43).
1 Card A entered as the destination address of the self command
(i.e., the value of i) matches the card store set in the card setting device (2) in the card information response circuit (13). ) is executed and each setting device +8
1, +91, (10) Card information and setting self-answer reading ■, 41 circuit (card name fixedly set in LO) Send on 4゛ bus (6) .

If there is a response from step (44), the peripheral equipment module 4 card recognition circuit (5) stores the above response in the location corresponding to card store i in the memory for storing card information (4) in step (34). Store card information and step (3)
5) and return to step (32) via (36).

In the determination of step (33), the predetermined time T (step (3)
If a response does not come within a time period (measured by a timer from the time of execution of step 2), steps (38) and (39) are performed for a predetermined number of times (N in the example shown in FIG. 3).
retry) and there is no response, it is determined that Ai's card does not exist and steps (40) and (4
1) Go to step (35) after 'e. When the maximum number of peripheral devices that can be incorporated into this system is 'kM', if i=M as determined in step (35), the final card information bit is set to "1" in step (37) to extend the entire length of this program.

In this way, the card information of all peripheral device I/F cards (7) is stored in the card information storage memory (4).

The basic configuration of O8 is stored in an auxiliary storage device which is a non-volatile memory, and since this auxiliary storage device is one of the peripheral devices, its information is written in the card information storage memory (4). .

Bootstrap loader (bootstrap 1oa
der) searches for the above-mentioned auxiliary storage device in the card information storage memory (4) and loads the basic components of O8.

Next, a program to install peripheral devices corresponding to all the peripheral device I/F cards (7) into the O8 is executed, and the peripheral devices are installed according to the card information in the card information storage memo (January 4). The OS will be generated.

Although the above is a description of one embodiment of the present invention, the peripheral device I74 card recognition circuit (5) and card information response circuit (13) can be implemented using a one-chip microcomputer. In addition, there is also a 24゛ bus (6
) may transmit signals in a bit-parallel format or in a bit-serial format. The 'F circuit (12)' can be designed to suit the signal transmission format. Furthermore, the card shop setting device (2) does not need to be on the card, but can be assigned as a serial number to the card slot on the motherboard, as long as it can make the determination in step (43) in FIG.

〔Effect of the invention〕

As described above, according to the present invention, all card information is automatically stored in the card information storage memory when the system is started up, so there is no need to change the system program due to changes in peripheral devices, and there is no need to input data. It is possible to prevent errors at the time of use, and the system can be changed easily and quickly, resulting in an error-free O8.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an entire embodiment of the present invention, FIG. 2 is a block diagram showing an example of assignment of card shops to be set in the card shop setting device of each card, and FIGS. 3 and 4 are 2 is a flowchart showing the operation of the apparatus of FIG. 1; fil is CP [J card, (2) is card shop setting device, (
3) is the inter-card ■74゛ circuit, (4) is the memory for storing card information, (5) is the ■24゛ card recognition circuit for peripheral devices, (6) is the inter-card ■741 bus, and (7) is the peripheral device. I/F card for +81, +91. (]O0 is the setting device, (11) is the setting content readout I/F''
(b) Path, (12) is setting content reading and card inter-card 124
1 circuit. Note that the same reference numerals in each figure indicate the same or similar parts.

Claims (1)

[Scope of Claims] An interface card for each peripheral device provided corresponding to each peripheral device of all the peripheral devices incorporated in one microcomputer system, an interface card provided for each of the above-mentioned peripheral devices, and an interface card for each peripheral device provided for each of the peripheral devices to be incorporated in one microcomputer system. A setting device for setting various data required when incorporating into the operating system of the microcomputer system, an interface card recognition circuit for peripheral devices provided on the CPU card on which the operating system of the microcomputer system is installed, and each of the peripheral devices mentioned above. read out the data set by the setting device as response information corresponding to the card information request command sent from the peripheral device interface card recognition circuit as card information; an inter-card interface bus in which the peripheral device interface card recognition circuit and each of the card information response circuits are connected in parallel; the peripheral device interface card recognition circuit and each of the cards; A card number setter, each provided in the information response circuit, and each having a different identification number set in order to detect a match with the destination address of the signal on the inter-card interface bus, and the peripheral device interface card recognition circuit. a card information storage memory for storing card information sent from each of the card information response circuits; and a card information storage memory for storing card information corresponding to each of all of the peripheral devices at the time of system initialization. means for configuring an operating system of the microcomputer system according to the written card information.