JPS6222151A - Test control system - Google Patents

Abstract

PURPOSE:To simplify the test of a storage controller by providing a modification circuit to convert access identifier information from a tester circuit. CONSTITUTION:A tester circuit 2 in connection with a service processor SVP is incorporated in a storage controller 1. In supplying access identifier information corresponding to a central processing unit, e.g., a CPU#0 or #1, the information of 3 bits generated by the tester circuit 2 is fed to ports 6-0-6-3. In applying access identifier information (consisting of 8-bits) corresponding to a channel processing unit CHP, the 3-bit access identifier information circuit 9 and fed to the port 6-1. Thus, the test of the storage controller is conducted simply.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] In a test control method for testing the functionality of a storage control device, a service processor is connected to the left.

In addition to incorporating a tester circuit that tests the storage control device that deals with access requests from each access requesting device, the tester circuit's hardware uses the access identifier information of the access requesting device issued by the tester circuit as a single unit. It is disclosed that the hardware configuration can be simplified and test control can be performed easily.

[Industrial application field]

The present invention includes a built-in tester circuit that is linked to a service processor in testing the test control system, particularly the functions of a storage control device.

The present invention relates to a test control method that simplifies the hardware configuration of a tester circuit as much as possible.

[Conventional technology]

Conventionally, in the configuration of data processing devices, there is a connection between an access requesting device such as a central processing unit (CPU) or a channel processing unit (CHP) and a main storage device (MSO). A device is known in which a storage control unit (MCU) is arranged to mediate and control access requests.

In testing the functions of such a storage control unit (MCU) itself, a configuration as shown in FIG. 3 has conventionally been adopted.

In Figure 3, 1 is a storage control unit (MCU) to be tested, 2 is a tester circuit, 3 is a pseudo CPU circuit, and 4
is a pseudo CHP circuit, 5 is a pseudo MSU circuit, 6-0.6-
Reference numerals 1 and 6-2 represent ports, 7 represents a priority determination circuit/selection circuit, and 8 represents an access control pipeline within the storage control device. Note that the illustrated SvP represents a service processor (not illustrated).

Conventionally, the tester circuit 2 shown in FIG.
The storage control device 1 was to be tested. When testing using the tester circuit, tests can be performed under conditions where the central processing unit (CPU) is connected independently to the storage control device, or when the channel processing unit (CHP) is connected to the storage control device.
This was the extent to which it was possible to perform tests under conditions where the access requesting device was connected singly, such as under conditions where the access requesting device was connected singly to the storage control device. Therefore, for this reason, a pseudo CPU or a pseudo CHP is connected as appropriate, and tests from the pseudo CPU or the like are also used.

[Problem that the invention seeks to solve]

Conventionally, tests have been carried out under the configuration shown in FIG. 3, requiring pseudo units corresponding to various access request source devices. Further, when testing from the tester circuit, there is a problem that the test can only be performed in a state where each access requesting device is connected individually.

[Means for solving problems]

The present invention solves the above-mentioned problems, and FIG. 1 shows a basic configuration diagram of the present invention. Code 1 in the figure. 2. 6-1 and 7 correspond to FIG. 3, respectively, and 9 represents a modify circuit.

In the case of the present invention, the tester circuit 2 includes each port 6-0.6-
1.6-2.6-3 . . . are connected so that input can be made to each of them. Also, tester circuit 2.

The tester circuit 2 is configured to be able to issue access identifier information corresponding to each of various access request source devices, that is, a central processing unit (CPU) and a channel processing unit (CHP) when performing a test. In this case, the access identifier information is supplied as follows.

That is, the access identifier information corresponding to the central processing unit (CPU) is composed of 3 bits, and the access identifier information corresponding to the central processing unit (CPU) is composed of 3 bits.
Although the access identifier information corresponding to HP) is composed of 8 pins, the tester circuit 2 is configured to generate and output access identifier information of only 3 bits. When supplying access identifier information corresponding to the central processing unit, for example, CPU #O or CPU #1, the generated identifier information is supplied as is to ports 6-0 and 6-3, but the channel processing device ( When supplying access identifier information corresponding to CHP), the generated 3-bit identifier information is supplied to port 6-1, but at this time, the modify circuit 9 modifies the 3-bit identifier information. The 8-bit identifier information G is converted and the result is shown to the port 6-1.

[Effect]

The tester circuit 2 includes a service processor (S
VP), and if necessary, the tester circuit 2
(i) The illustrated access request source device CPU#0 and CPU#
1, CHP, etc. is not connected to the port, and a test corresponding to the case where there is an access request from any one access request source device can be performed, and (ii) the illustrated access request source device CPU #O, CPU #1, CH
By simulating a situation in which multiple access request source devices are connected under the condition that P, etc. are not connected to the port, if there is an access request from each access request source device, The corresponding tests can be performed and (
iii) testing may be performed under conditions in which one or more of the illustrated access requesting devices are connected to the port; and (iv) a pseudo test may be performed in place of one or more of the illustrated access requesting devices. It is possible to perform tests under conditions where the unit is connected. These are configured such that a service processor (SVP) supplies necessary information to each port via the tester circuit 2, sets test conditions, and causes the tester circuit to execute a desired test. , it can be considered that this has been realized.

When performing each of the above tests, modify circuit 9
3 supplied from the tester circuit 2 to generate access identifier information corresponding to the channel processing unit (CHP).
Bit information is converted to 8 bits.

〔Example〕

FIG. 2 shows the configuration of an embodiment of the present invention.

Code 1 in the figure. 2. 6-i, 7. 8 corresponds to FIG. 1 or 3, 9-1 represents a modifying section in the modifying circuit 9 shown in FIG. 1, and 9-2 similarly represents a selector.

The configuration and operation of the illustrated embodiment in FIG.
Although it is substantially the same as explained with reference to the figure, the first
The modifying circuit 9 in the illustration is a modifying section 9.
-1 and a selector 9-2. The illustrated modifying unit 9-1 is composed of a known bit change circuit, a register circuit that can easily change bits, etc., and converts the given 3 bits of information into 8 bits of information according to predetermined logic. Convert to The selector 9-2 is configured to selectively take in input information during the conversion process.

〔Effect of the invention〕

As described above, according to one aspect of the present invention, a desired test can be performed using a tester circuit after setting the same conditions as when a plurality of access request source devices are connected. For this reason, as in the conventional case, a pseudo CPU or a pseudo C
It is no longer essential to use HP, pseudo-MSU, etc. Furthermore, the tester circuit makes it possible to perform a test under conditions corresponding to a state in which a plurality of access request source devices are connected.

[Brief explanation of drawings]

FIG. 1 shows the principle configuration of the present invention, FIG. 2 shows the configuration of an embodiment of the present invention, and FIG. 3 shows the conventional configuration. In the figure, l represents a storage control device, 2 a tester circuit, 6 a port, and 9 a modify circuit.

Claims (1)

[Claims] Accepting access requests attached with access identifiers from one or more types of access request source devices, mediating access control to the main storage device, and transmitting the results of the accesses with the access identifiers attached. In a test control method for testing the functionality of a storage control device (1) that has a function of returning data to the access request source device, a tester circuit (2) is connected to the storage control device (1). At the same time, the tester circuit (2) is connected to the service processor, and after appropriately setting test conditions corresponding to the access request from the access requesting device, The tester circuit (2) is connected to a port (6) which is configured to test the access control function and which accepts an access request from the access requesting device, and A modifying circuit (9) for modifying information including information regarding the access identifier from the tester circuit (2) is provided corresponding to at least one, and the tester circuit (2) is adapted to the type of the access requesting device. A test control method characterized in that the test control method is configured to output information regarding a common access identifier regardless of the access identifier.