JPS62221111A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS62221111A
JPS62221111A JP6644786A JP6644786A JPS62221111A JP S62221111 A JPS62221111 A JP S62221111A JP 6644786 A JP6644786 A JP 6644786A JP 6644786 A JP6644786 A JP 6644786A JP S62221111 A JPS62221111 A JP S62221111A
Authority
JP
Japan
Prior art keywords
resist film
pattern
opening
mask
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6644786A
Other languages
Japanese (ja)
Inventor
Tatsumi Tsutsui
立美 筒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6644786A priority Critical patent/JPS62221111A/en
Publication of JPS62221111A publication Critical patent/JPS62221111A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To omit two mask aligning processes, by providing a photo masks, which has a specified opening pattern and an opening part pattern having a diameter shorter than the wavelength of an exposing light beam, on a resist film, performing exposure, and removing the exposed part with a resist-film removing agent. CONSTITUTION:On a resist film, the following parts are provided: an exposing pattern region 14 having an opening part 13 in a specified form; a pattern region 16 having a circular opening part 15, which has a diameter shorter than the wavelength of an exposing light beam; and a photo mask 18 having a pattern region 17 comprising a non-opening part region. After exposure, the exposed part is removed by using a resist removing agent. Then, a staircase shaped resist film 19 is formed. Thereafter, B<+> atom ions are implanted, and a channel region 20 is formed. The remaining resist film 19A is removed by ashing. With the resist film 19B as a mask, the B<+> atom ions are implanted, and two channel regions 20 and 21 having different impurity atom concentrations are formed.

Description

【発明の詳細な説明】 〔概要〕 所定のパターンに開口形成されたパターン領域と、露光
用光線の波長より短い寸法の直径、或いは一辺を有する
円形、或いは方形の開口部を有するパターン領域と、非
開口部領域とより成る露光用マスクをレジスト膜上に設
置して露光した後、レジスト膜除去剤で除去することで
、1枚のマスク、及び1回の露光工程で、同一基板上に
厚さの異なるレジスト膜を形成し、このレジスト膜をマ
スクとして用いて基板に不純物原子を導入することで、
基板に異なった濃度領域を形成する。
[Detailed Description of the Invention] [Summary] A pattern region having openings formed in a predetermined pattern, a pattern region having a circular or rectangular opening having a diameter or one side shorter than the wavelength of an exposure light beam; By placing an exposure mask consisting of a non-opening area on the resist film, exposing it to light, and then removing it with a resist film remover, a thick layer can be formed on the same substrate using one mask and one exposure process. By forming resist films with different thicknesses and using these resist films as masks to introduce impurity atoms into the substrate,
Forming regions of different concentrations on the substrate.

〔産業上の利用分野〕[Industrial application field]

本発明はレジスト膜のパターン形成方法に係り、使用す
る露光用マスクの数量と、露光工程に要するマスク合わ
せの回数を減少させた状態で、基板に不純物原子濃度の
異なる領域を形成する方法に関する。
The present invention relates to a resist film pattern forming method, and more particularly, to a method for forming regions with different impurity atom concentrations on a substrate while reducing the number of exposure masks used and the number of mask alignments required in the exposure process.

例えばMO3型半導体装置を形成する際に、MOSトラ
ンジスタのソース、及びドレイン領域、或いはチャネル
領域をイオン注入法等を用いて形成しているが、その際
不純物原子を所定の領域にイオン注入するためのマスク
としてレジスト膜が用いられている。
For example, when forming an MO3 type semiconductor device, the source and drain regions or channel regions of a MOS transistor are formed using an ion implantation method. A resist film is used as a mask.

特に1枚のシリコン(Si)ウェハに闇値電圧の異なる
MO5型トランジスタを形成するには、Siウェハに形
成されるゲート電極下のチャネル領域に導入される不純
物原子濃度を変化させて闇値電圧の異なるMOS型のト
ランジスタを形成している。
In particular, in order to form MO5 type transistors with different dark value voltages on a single silicon (Si) wafer, the dark value voltage is MOS type transistors of different types are formed.

(従来の技術〕 従来、このような注入された不純物原子濃度が異なるチ
ャネル領域を形成するには、第7図に示すようにSi基
板1上にポジ型のレジスト膜2を塗布後、第8図に示す
ように所定の面積の開口部3を有するホトマスク4をレ
ジスト膜除去液に設置し、該マスク4より紫外線を照射
してレジスト膜2を露光する。
(Prior Art) Conventionally, in order to form channel regions having different concentrations of implanted impurity atoms, as shown in FIG. As shown in the figure, a photomask 4 having an opening 3 of a predetermined area is placed in a resist film removing solution, and the resist film 2 is exposed to ultraviolet rays from the mask 4.

次いで露光した部分のレジスト膜をレジスト膜除去剤に
て除去し、第9図に示すレジスト膜のパターン2Aを形
成する。
Next, the exposed portion of the resist film is removed using a resist film remover to form a resist film pattern 2A shown in FIG.

次いでパターン領域グされたレジスト膜2Aをマスクと
して基板に矢印に示すようにB+原子をlXl0”原子
/cI02のドーズ量でイオン注入してチャネル領域5
を形成する。
Next, using the patterned resist film 2A as a mask, B+ atoms are ion-implanted into the substrate at a dose of 1X10'' atoms/cI02 as shown by the arrows to form the channel region 5.
form.

次いで第1O図に示すように、前記第8図に示したマス
ク4の開口部3より大面積の開口部6を有するホトマス
ク7を用いて、第9図に示したレジスト膜2Aを紫外線
で露光し、該露光した領域をレジスト膜除去液で除去し
て第11図に示すレジスト膜のパターン2Bを形成する
Next, as shown in FIG. 1O, the resist film 2A shown in FIG. 9 is exposed to ultraviolet light using a photomask 7 having an opening 6 with a larger area than the opening 3 of the mask 4 shown in FIG. 8. Then, the exposed area is removed with a resist film removing solution to form a resist film pattern 2B shown in FIG.

次いでこのレジストlll2BをマスクとしてB+原子
を2×10 原子/cm2のドーズ量でイオン注入して
チャネル領域8を形成する。
Next, using this resist lll2B as a mask, B+ atoms are ion-implanted at a dose of 2×10 5 atoms/cm 2 to form a channel region 8 .

するとチャネル領域9はB+原子が、ドーズ量が2X1
0  原子/c112と1×lO原子/a12の和のド
ーズ量でイオン注入された領域となる。
Then, the channel region 9 contains B+ atoms with a dose of 2X1.
The region is ion-implanted with a dose equal to the sum of 0 atoms/c112 and 1×1O atoms/a12.

このようにして不純物原子濃度の異なる2M類の領域を
、チャネル領域8,9として形成することで、2種類の
閾値電圧の異なるMO3型半導体装置を一枚のSiウェ
ハ内に形成するようにしていた。
In this way, by forming 2M type regions with different impurity atom concentrations as the channel regions 8 and 9, MO3 type semiconductor devices with two different threshold voltages can be formed in one Si wafer. Ta.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

然し、このような方法では、2枚のホトマスクと2回の
露光工程、即ち2回のマスク合わせ工程を必要とする。
However, such a method requires two photomasks and two exposure steps, that is, two mask alignment steps.

このマスク合わせ工程は、多くの時間を必要とし、この
マスク合わせ工程を減らすことが半導体装置の製造工数
の削減に必要となる。
This mask alignment process requires a lot of time, and reducing the mask alignment process is necessary to reduce the number of steps for manufacturing semiconductor devices.

本発明は上記した問題点を解決し、マスク合わせの回数
を削減し、製造工数の低下を図つた半導体装置の製造方
法を提供するのを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for manufacturing a semiconductor device that solves the above problems, reduces the number of mask alignments, and reduces the number of manufacturing steps.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の製造方法は、レジスト膜が塗布形
成されている基板上に所定領域が開口されている露光用
パターンと、露光用光源の波長よりも短い寸法の直径、
或いは一辺を有する円形、或いは方形の微少開口部が形
成されている露光用パターンと、非開口部領域よりなる
露光用マスクをレジスト膜上に設置し、該露光用マスク
上よりそれぞれのパターン領域を通して露光用光線をレ
ジスト膜上に照射する。
A method for manufacturing a semiconductor device according to the present invention includes: an exposure pattern having an opening in a predetermined area on a substrate coated with a resist film; a diameter shorter than the wavelength of an exposure light source;
Alternatively, an exposure pattern in which a circular or rectangular minute opening with one side is formed and an exposure mask consisting of a non-opening area are placed on the resist film, and the exposure mask is passed through each pattern area from above the exposure mask. A light beam for exposure is irradiated onto the resist film.

次いで開口部を有する露光用パターンを通して露光され
た領域のレジスト膜をレジスト膜除去液で除去して開口
部を形成するとともに、前記微少開口部を有する露光用
パターンを通して露光された領域のレジスト膜を所定の
厚さになるように除去する。
Next, the resist film in the area exposed through the exposure pattern having openings is removed with a resist film removing liquid to form an opening, and the resist film in the area exposed through the exposure pattern having minute openings is removed. Remove to a predetermined thickness.

次いで前記パターン形成されたレジスト膜の開口部を介
して基板に不純物原子を導入する。
Next, impurity atoms are introduced into the substrate through the openings in the patterned resist film.

更に微少な開口部のパターン領域を通して露光された領
域のレジスト膜を除去して該レジスト膜に開口部を形成
するとともに未露光のレジスト膜を所定厚さ除去する。
Further, the resist film in the area exposed through the pattern area of the minute opening is removed to form an opening in the resist film, and the unexposed resist film is removed to a predetermined thickness.

更に前記微少開口部のパターンで形成された開口部を介
して基板に不純物原子を導入する。
Further, impurity atoms are introduced into the substrate through the openings formed in the pattern of the minute openings.

〔作用〕[Effect]

本発明のレジス日賽の露光方法は、所定の開ロバターン
と、露光用光線より波長の短い寸法の直径を有する開口
部パターンを有するホトマスクをレジスト股上に設置し
、露光してレジスト膜除去剤で除去することで、1枚の
マスクと1回のマスク合わせの工程で、2種類の寸法の
開口部を有し、かつ部分的に厚さの異なる階段状のレジ
スト膜を形成する。
The resist sun exposure method of the present invention involves installing a photomask having a predetermined opening pattern and an opening pattern having a diameter shorter in wavelength than that of the exposure light onto the resist, and exposing the photomask to a resist film remover. By removing the resist film, a step-like resist film having openings of two different sizes and partially different thicknesses is formed with one mask and one mask alignment process.

そしてこの2種類の寸法の異なる開口部を介して不純物
原子を導入することで、基板に2種類の濃度の異なる領
域を形成する。
By introducing impurity atoms through these two types of openings with different dimensions, two types of regions with different concentrations are formed in the substrate.

〔実施例〕〔Example〕

以下図面を用いながら本発明の一実施例につき詳細に説
明する。
An embodiment of the present invention will be described in detail below with reference to the drawings.

まず第1図に示すようにN型のSi基板11上にポジ型
のレジスト膜12を塗布形成する。
First, as shown in FIG. 1, a positive resist film 12 is coated on an N-type Si substrate 11.

次いで第2図に示すように中央部に所定形状の開口部1
3を有する第1の露光用パターン領域14と、露光用光
線の波長より短い寸法lが直径となる円形の開口部15
を有する第2のパターン領域16と、非開口部領域領域
よりなる第3のパターン領域17を有するホトマスク1
8をレジスト膜12上に設置し、露光した後、コリン等
のレジスト膜除去剤を用いて露光された部分を除去する
Next, as shown in FIG. 2, an opening 1 of a predetermined shape is formed in the center.
3, and a circular opening 15 whose diameter is a dimension l shorter than the wavelength of the exposure light beam.
A photomask 1 having a second pattern region 16 having a non-opening region and a third pattern region 17 having a non-opening region.
8 is placed on the resist film 12 and exposed, and then the exposed portion is removed using a resist film remover such as choline.

するとパターン形成グされたレジスト膜の断面図は第3
図のようになり、開口部13下の領域のレジスト膜は除
去され、開口部15を有するパターン領域16下の領域
のレジスト膜19Aは、所定の厚さだけ除去され、非開
口部領域17の下の部分は、レジスト膜19Bのように
成って残留し、階段状の断面構造を有するレジスト膜1
9が形成される。
Then, the cross-sectional view of the patterned resist film is shown in the third figure.
As shown in the figure, the resist film 19A in the area below the opening 13 is removed, the resist film 19A in the area below the pattern area 16 having the opening 15 is removed by a predetermined thickness, and the resist film 19A in the area below the pattern area 16 having the opening 15 is removed, and the resist film 19A in the area below the pattern area 16 having the opening 15 is removed, and The lower part remains as a resist film 19B and has a stepped cross-sectional structure.
9 is formed.

第4図に示すように、このようなレジスト11m111
9を有する基板11上よりドーズ量がlXl0  原子
/e1m2でB+原子をイオン注入してチャネル領域2
0を形成する。
As shown in FIG. 4, such a resist 11m111
9, B+ atoms are ion-implanted at a dose of lXl0 atoms/e1m2 to form the channel region 2.
form 0.

更にこの基板を反応容器内に導入し、酸素ガスプラズマ
の雰囲気内で残留しているレジスト膜19^が除去でき
る程度に灰化除去する。
Furthermore, this substrate is introduced into a reaction vessel, and is ashed and removed in an oxygen gas plasma atmosphere to the extent that the remaining resist film 19^ can be removed.

すると第5図に示すように、レジスト19Bが残留した
状態となる。
Then, as shown in FIG. 5, the resist 19B remains.

次いで第6図に示すようにレジスト膜19Bをマスクと
して用いて該基板上よりドーズ量が2×lθ″′原子/
口2でB+原子をイオン注入することで、イオン注入量
が2×10 原子/cf112のチャネル領域21と、
イオン注入量が2×10 原子/備2と1×10  原
子/cI112とを合わせたチャネル領域22とが形成
され、不純物原子濃度が異なる2領域のチャネル領域2
0.21がそれぞれ形成される。
Next, as shown in FIG. 6, using the resist film 19B as a mask, a dose of 2×lθ″' atoms/
By ion-implanting B+ atoms at the port 2, a channel region 21 with an ion implantation amount of 2×10 atoms/cf112,
A channel region 22 with a combined ion implantation amount of 2×10 atoms/cI2 and 1×10 atoms/cI112 is formed, and two channel regions 2 with different impurity atom concentrations are formed.
0.21 are formed respectively.

このようにすれば、1枚のマスクと1回の露光工程で、
濃度領域が異なる2つの領域が形成され、従来の方法に
比べて半導体装置の製造工数が削減できる。
In this way, with one mask and one exposure process,
Two regions with different concentration regions are formed, and the number of steps for manufacturing a semiconductor device can be reduced compared to conventional methods.

尚、以上の実施例ではレジスト膜の厚さが2段階で形成
されて不純物濃度の異なる領域が2つの領域に形成され
たが、このレジスト膜の厚さを2段階以上の厚さにする
とそれにつれて不純物濃度の異なる領域が2つ以上の領
域に形成される。
Note that in the above embodiments, the resist film was formed in two thicknesses, and two regions with different impurity concentrations were formed. As a result, two or more regions having different impurity concentrations are formed.

また本実施例で用いたホトマスクは、説明の便宜上開口
部13を有するパターン領域14と開口部15を有する
パターン領域16とを隣接して形成したが、このそれぞ
れのパターン領域14と16は距離を隔てて形成しても
良い。
Further, in the photomask used in this example, for convenience of explanation, the pattern region 14 having the opening 13 and the pattern region 16 having the opening 15 were formed adjacent to each other, but the respective pattern regions 14 and 16 are separated by a distance. They may be formed separately.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明の方法によれば、不純物濃度
が異なる領域を形成するためのマスクとなるレジスト膜
の露光工程でマスク合わせの工数が削減されるため、半
導体装置の製造工数が低減できる効果がある。
As described above, according to the method of the present invention, the number of man-hours for mask alignment in the exposure process of the resist film, which serves as a mask for forming regions with different impurity concentrations, is reduced, so the number of man-hours for manufacturing semiconductor devices is reduced. There is an effect that can be done.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第3図より第6図迄は、本発明の方法の一
実施例を工程順に示す断面図、第2図は本発明の方法に
用いるホトマスクの平面図、 第7図、第9図、第11図は従来の方法を工程順に示す
断面図、 第8図および第10図は従来の方法に用いるホトマスク
の平面図である。 図に於いて、 11はSi基板、12はレジスト膜、13.15は開口
部、14、16はパターン領域、17は非開口部領域、
18はホトマスク、19.19A、 19Bはレジスト
膜、20.21.22はチャネル領域を示す。 ント4ト日月°のLジ°ズト71Jlj0I¥1iP 
工科の第 1 図 第 2 l 2FN!−θ襲乙シ”2: pisビ戸季≧Eエネ¥ふ
り第 3 図 才璃芒a月め千〒子ル々参1ブに〒リヘ′ニオIυゴ第
4図 、滞≠5所の(/ジ′l−テr壬工4丁m@5 図 第 6 図 U/1しジパスI−H遭1の婢I才trfJ@ 7 図 @ 8 図 @ 9 図
1 and 3 to 6 are cross-sectional views showing an embodiment of the method of the present invention in the order of steps, FIG. 2 is a plan view of a photomask used in the method of the present invention, FIGS. 7 and 9 11 are cross-sectional views showing the conventional method in the order of steps, and FIGS. 8 and 10 are plan views of photomasks used in the conventional method. In the figure, 11 is a Si substrate, 12 is a resist film, 13.15 is an opening, 14 and 16 are pattern areas, 17 is a non-opening area,
18 is a photomask, 19.19A and 19B are resist films, and 20.21.22 is a channel region. 71 Jlj0I¥1iP
1st figure of engineering 2nd l 2FN! -θ attack 2: pis bitoki ≧ E energy ¥furi 3rd drawing (/Ji'l-Ter Jingo 4-chom@5 Figure 6 Figure U/1 and Zipass I-H encounter 1's daughter I trfJ @ 7 Figure @ 8 Figure @ 9 Figure

Claims (1)

【特許請求の範囲】 レジスト膜(12)が塗布形成されている基板(11)
上に所定領域に開口部(13)を設けている露光用パタ
ーン領域(14)と、露光用光源の波長よりも短い寸法
の直径、或いは一辺を有する円形、或いは方形の開口部
(15)が形成されている露光用パターン領域(16)
と、非開口部領域(17)よりなる露光用マスク(18
)をレジスト膜(12)上に設置し、該露光用マスク(
18)上よりパターン領域(14)、(16)を通して
露光用光線をレジスト膜(12)上に照射する工程、前
記マスク(18)のパターン領域(14)を通して露光
された領域のレジスト膜をレジスト膜除去液で除去して
開口部を形成するとともに、前記パターン領域(16)
を通して露光された領域のレジスト膜を所定の厚さにな
るように除去する工程、 前記パターン形成されたレジスト膜の開口部を介して基
板に不純物原子を導入する工程、更にパターン領域(1
6)を通して露光された領域のレジスト膜を除去して該
レジスト膜に開口部を形成するとともに未露光のレジス
ト膜を所定厚さ除去する工程、 前記パターン形成された開口部を介して基板に不純物原
子を導入する工程を含むことを特徴とする半導体装置の
製造方法。
[Claims] A substrate (11) on which a resist film (12) is coated.
An exposure pattern area (14) having an opening (13) in a predetermined area on the top, and a circular or rectangular opening (15) having a diameter or one side shorter than the wavelength of the exposure light source. Formed exposure pattern area (16)
and an exposure mask (18) consisting of a non-opening area (17).
) is placed on the resist film (12), and the exposure mask (
18) A step of irradiating the resist film (12) with an exposure light beam from above through the pattern regions (14) and (16), and converting the resist film in the area exposed through the pattern region (14) of the mask (18) into a resist film. While removing with a film removal liquid to form an opening, the pattern area (16)
a step of removing the resist film in the area exposed through the pattern to a predetermined thickness; a step of introducing impurity atoms into the substrate through the opening of the patterned resist film;
6) removing the resist film in the exposed area to form an opening in the resist film and removing a predetermined thickness of the unexposed resist film; A method for manufacturing a semiconductor device, comprising a step of introducing atoms.
JP6644786A 1986-03-24 1986-03-24 Manufacture of semiconductor device Pending JPS62221111A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6644786A JPS62221111A (en) 1986-03-24 1986-03-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6644786A JPS62221111A (en) 1986-03-24 1986-03-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62221111A true JPS62221111A (en) 1987-09-29

Family

ID=13316035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6644786A Pending JPS62221111A (en) 1986-03-24 1986-03-24 Manufacture of semiconductor device

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Country Link
JP (1) JPS62221111A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10620529B2 (en) * 2016-09-06 2020-04-14 Samsung Electronics Co., Ltd. Photomasks
US10642150B2 (en) * 2016-03-31 2020-05-05 Lg Chem, Ltd. Photomask and method for manufacturing column spacer for color filter using the same
US20220146926A1 (en) * 2020-11-12 2022-05-12 United Microelectronics Corp. Photo-mask and semiconductor process

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10642150B2 (en) * 2016-03-31 2020-05-05 Lg Chem, Ltd. Photomask and method for manufacturing column spacer for color filter using the same
US10620529B2 (en) * 2016-09-06 2020-04-14 Samsung Electronics Co., Ltd. Photomasks
US20220146926A1 (en) * 2020-11-12 2022-05-12 United Microelectronics Corp. Photo-mask and semiconductor process
US11662658B2 (en) * 2020-11-12 2023-05-30 United Microelectronics Corp. Photo-mask and semiconductor process

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