JPS6221562U - - Google Patents
Info
- Publication number
- JPS6221562U JPS6221562U JP1985112726U JP11272685U JPS6221562U JP S6221562 U JPS6221562 U JP S6221562U JP 1985112726 U JP1985112726 U JP 1985112726U JP 11272685 U JP11272685 U JP 11272685U JP S6221562 U JPS6221562 U JP S6221562U
- Authority
- JP
- Japan
- Prior art keywords
- lamp
- view
- led lamp
- unit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002775 capsule Substances 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
第１図は本考案に係るＬＥＤランプの一実施例
を示す略示的断面図、第２図は同実施例の正面図
、第３図は同実施例に使用されたユニツトの正面
図、第４図は第３図の―線に沿う断面図、第
５〜１０図は同ユニツトの変形例を夫々示す略示
的正面図、第１１図は本考案に係るＬＥＤランプ
の他の実施例を示す第４図と同様の断面図、第１
２図は同実施例における各ＬＥＤの接続状態を示
す配線図、第１３図は従来例のＬＥＤランプの断
面図、第１４図は同ＬＥＤランプの正面図である
。 １……ランプ本体、２……口金、３……前面レ
ンズ、４，１４……プリント基板、５ａ，５ｂ，
５ｃ，５ｄ……ＬＥＤ、６……配線、７……直列
抵抗、８，８ａ……ユニツト、９，９ａ，９ｂ，
９ｃ，９ｄ，９ｘ……カプセル、１０……リード
線、１１……底部、１２……コンパウンド。
を示す略示的断面図、第２図は同実施例の正面図
、第３図は同実施例に使用されたユニツトの正面
図、第４図は第３図の―線に沿う断面図、第
５〜１０図は同ユニツトの変形例を夫々示す略示
的正面図、第１１図は本考案に係るＬＥＤランプ
の他の実施例を示す第４図と同様の断面図、第１
２図は同実施例における各ＬＥＤの接続状態を示
す配線図、第１３図は従来例のＬＥＤランプの断
面図、第１４図は同ＬＥＤランプの正面図である
。 １……ランプ本体、２……口金、３……前面レ
ンズ、４，１４……プリント基板、５ａ，５ｂ，
５ｃ，５ｄ……ＬＥＤ、６……配線、７……直列
抵抗、８，８ａ……ユニツト、９，９ａ，９ｂ，
９ｃ，９ｄ，９ｘ……カプセル、１０……リード
線、１１……底部、１２……コンパウンド。
Claims (1)
- 複数個のＬＥＤを適宜形状のカプセル内に並設
収納し透明又は着色したコンパウンドで固定して
ユニツトとし、該ユニツトを複数個用いてランプ
本体内に配設したプリント基板に取付けたことを
特徴とするＬＥＤランプ。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985112726U JPH0423336Y2 (ja) | 1985-07-23 | 1985-07-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985112726U JPH0423336Y2 (ja) | 1985-07-23 | 1985-07-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6221562U true JPS6221562U (ja) | 1987-02-09 |
| JPH0423336Y2 JPH0423336Y2 (ja) | 1992-05-29 |
Family
ID=30993866
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985112726U Expired JPH0423336Y2 (ja) | 1985-07-23 | 1985-07-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0423336Y2 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010003756A (ja) * | 2008-06-18 | 2010-01-07 | Panasonic Electric Works Co Ltd | Ｌｅｄ発光装置、プリント配線基板及び表示器具 |
-
1985
- 1985-07-23 JP JP1985112726U patent/JPH0423336Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010003756A (ja) * | 2008-06-18 | 2010-01-07 | Panasonic Electric Works Co Ltd | Ｌｅｄ発光装置、プリント配線基板及び表示器具 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0423336Y2 (ja) | 1992-05-29 |