JPS62213121A - Formation of contact of semiconductor substrate - Google Patents

Abstract

PURPOSE:To contrive the higher density of an integrated circuit by forming a p<+> region by ion-implanting boron on the bottoms of a trench and a contact hole, by exposing the Si surface of the side-wall of the contact hole and by connecting the p<+> region on the bottom of the hole and a wiring layer by filling the hole by selective growth of tungsten. CONSTITUTION:A photo resist 2 is spin-coated on the surface of a p-type Si substrate 1, a trench window 3 and a contact window 4 are opened, then a trench 5 for isolation and a contact hole 6 are formed by digging and cutting by RIE, then a thermal oxide film 7 is formed on the surface of the substrate including the surfaces of the trench 5 and the contact hole 6 thermally oxidizing the substrate 1 which is to be ion-implanted with boron, the ion of the boron implanted by the heat-treatment is diffused and activated and a p<+> region 8 is formed. Then, the thermal oxide film 7 which has no photo resist 2 is re moved by etching and the contact hole 6 is filled with tungsten 10 by the selec tive growth of the tunsten. The area of the contact formation region of the substrate is reduced since the contact of the substrate is formed by using a deep hole and the integration density of an integrated circuit can be improved.

Description

[Detailed Description of the Invention] [Summary] As shown in Fig. 2, in a trench isolation type MO3 integrated circuit, high concentration for channel stop is applied to the bottom of the contact hole as well as the isolation trench. A substrate contact is made by utilizing the formation of the region. Tungsten is selectively deposited on the Si wall surface of a contact hole whose depth is large compared to its diameter to fill the hole and form a contact electrode connected to a wiring layer.

[Industrial application field]

The present invention relates to the formation of substrate contacts for high-density integrated circuits, and more particularly to techniques for forming substrate contacts in a small area using a trench isolation formation process.

As the density of integrated circuits increases, not only the miniaturization of elements but also the miniaturization of isolation regions between elements is required. Therefore, isolation regions, which were conventionally formed by selective oxidation, are now formed by digging trenches and filling them with an insulating material.

This method is called trench isolation, and it became available because anisotropic etching techniques such as RIB were developed, making it possible to dig deep trenches with narrow widths. Insulator deposition methods with good coverage, such as high-temperature CVD methods, have been developed.

On the other hand, in MO3 integrated circuits, the potential of the bank gate region is controlled to speed up and stabilize the operation, and therefore it is essential to form a substrate contact.As the zero isolation region becomes narrower, the substrate contact region There is also a demand for a smaller size, but a method that satisfies this requirement has not yet been established.

For example, when using trench isolation in an n-MOS or CMO3 IC, the p
It is an inevitable requirement that the p diffusion process for stopping the diffusion channel be carried out in the same process, and the same applies to the fact that the trench forming mask and the p diffusion mask are the same.

In order to form a substrate contact in a micro area while meeting these requirements, (1) After opening a trench window, use some method to prevent RIB from progressing in the contact window area, but with the exception of ion implantation. (2) if the contact is drilled at the same time as the trench is excavated, a means of connecting the p-diffusion wiring at the bottom of the hole is provided; There must be.

However, it is almost impossible to perform the process (1) without increasing the photolithography process, and in the case of (2),
Since A7 sputter deposition has poor coverage, it is not possible to connect the edge and bottom of the hole to the required extent by itself, and this must be compensated for by some kind of treatment, but when the hole is deep compared to the diameter, There is no known method of depositing a conductive material with a simple process that satisfactorily fills the conductive material.

Therefore, a contact formation technique for a micro region that can be used in combination with trench isolation has not yet been established.

[Conventional technology]

As mentioned above, when employing trench isolation, since a satisfactory substrate contact formation technology has not yet been established, the diameter of the contact hole is increased and Alei! , the step coverage of the line layer is supplemented, or the formation of the MtIJl region and the formation of the substrate contact are performed in separate processes.

Although selective growth of RrE or tungsten is utilized in the presently disclosed embodiments, the characteristics and implementation conditions of these techniques are well known to those skilled in the art.

[Problem that the invention seeks to solve]

In view of the above-mentioned circumstances, an object of the present invention is to provide an integrated circuit employing trench isolation in which the P1 diffusion for substrate contact is the same process as the P' diffusion for channel stop, and the mask for trench formation and the p+ diffusion are The purpose of the present invention is to provide a contact formation method using the same mask, and furthermore, to drill a contact hole at the same time as a trench for isolation.
The objective is to provide a means to connect the p° diffusion at the bottom of the hole to the wiring layer.

[Means for solving problems]

The above object is achieved by the method of the present invention as set forth in the claims.To summarize the embodiments in order to facilitate understanding of the present invention, trenches for element isolation and contact holes are formed. After simultaneously excavating and forming by RIE and implanting boron ions into the bottom of the trench and contact hole to form a 99M region, the Si surface of the side wall of the contact hole is exposed, and the liquid hole is filled by selective growth of tungsten. This connects the p'' region wiring layer at the bottom of the hole.

[For production]

During selective growth of tungsten, since the other parts of the substrate including the trench are covered with an insulating film such as 5iOz, tungsten is deposited exclusively on the exposed Si surface in the contact hole, and only the contact hole is filled. The area of the Si surface is sufficiently large compared to the volume of the contact hole, and filling of the hole progresses quickly.

〔Example〕

FIG. 1 is a schematic cross-sectional view showing the process of an embodiment of the present invention, and will be described below with reference to the same figure. Formation of a MOS transistor here is performed after the isolation process. , this order does not limit the scope of the invention.

A photoresist 2 is spin-coated on the surface of a p-type S1 substrate 1, and a trench window 3 and a contact window 4 are opened (see figure (a)).

A trench 5 for isolation and a contact hole 6 are excavated using RIB (Figure (B)), and then boron ions are implanted (Figure (C)).

The substrate is thermally oxidized to form a thermal oxide film 7 on the substrate surface including the surfaces of the trenches and contact holes. By this heat treatment, the implanted boron ions are diffused and activated, and the p″ region 8
is formed. Further, the entire surface except for the contact hole portion is covered with photoresist 9 (see (d)). In this case, the mask alignment does not have to be strict, so the purpose of forming a contact in a minute area is not impaired.

The thermal oxide film not covered with the photoresist is removed by etching, and the contact hole is filled with tungsten 10 by selective growth of tungsten (see figure (e)).

The selective growth of tungsten carried out here is WF&+H
! -4W↓+HF The reaction proceeds at a processing temperature of 300 to 400℃, and is characterized by preferentially depositing tungsten on the surface of single crystal or polycrystalline Si. The contact hole is filled because the contact hole is only deposited.

This completes the filling of the contact hole, and the next step is to fill the trench with Sing.In order to protect the deposited tungsten, the entire surface is filled with Si0g by low-temperature CVD.
A film of about 1000λ is deposited. Since the treatment temperature is about 400° C. and for a short time, oxidation of the tungsten surface is slight. This low-temperature CvD film has poor coverage, so it does not coat the inside of the trench, and only the tungsten and the surface of the substrate are coated.

This state is shown in the if1 diagram and in Figure 0, the previously formed thermal oxide film is omitted, but the process continues with it remaining.

Subsequently, the trench is filled with Sing by high temperature CVD. This may be the same as the process normally performed, for example, S i
Using Ha and N20 as raw materials, the treatment is performed at 800°C. This high-temperature CVD film has extremely good coverage and is deposited on the inside of a trench with a width of about 1 μm in the same way as on the surface. The trench can be filled as shown.

By forming MOS transistors in the element regions separated by the trenches and providing AI wiring, a MOS integrated circuit is completed as shown in FIG.

In the above embodiment, the hole for substrate contact is formed at the same time as the isolation trench, but generally, the hole for contacting the substrate is formed at the same time as the step of excavating the semiconductor substrate and introducing an impurity of the same conductivity type as the substrate into the bottom of the hole. It should be understood that a contact hole and a high concentration region at the bottom thereof are formed.

Furthermore, in the above embodiment, the contact hole is provided independently from the isolation trench, but it is also possible to fill a part of the trench with tungsten to serve as a substrate contact, and it is also possible to use a conductor that can be selectively grown. In addition to tungsten, materials include Mo, Ti+Ta, AI, poly-Si, and the like.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to form a substrate contact hole by using a deep hole that is excavated at the same time as an element isolation trench, so that the area of the substrate contact formation region is reduced and The integration density of circuits can be improved.

[Brief explanation of drawings]

FIG. 1 is a schematic cross-sectional view showing the steps of an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view showing the structure of an integrated circuit formed according to the present invention. In the figure, l is a p-type Si substrate, 2.9 is a photoresist, 3 is a trench window, 4 is a contact window, 5 is a trench, 6 is a contact hole, 7 is a thermal oxide film, 8 is a p3 region, 10 is tungsten , 11 is a low temperature CVD oxide film, and 12 is a high temperature CVD oxide film. Fig. 1 is a schematic sectional view showing the process of an embodiment of the present invention. Fig. 1 is a schematic sectional view showing the process of an embodiment of the invention.

Claims (3)

[Claims] (1) A plurality of recesses (5, 6) are formed in a semiconductor substrate (1) of one conductivity type, the depth of which is larger than the width or diameter, and the substrate is formed at the bottom of the plurality of recesses in the semiconductor substrate. An impurity of the same conductivity type as (8) is introduced into some of the plurality of recesses (6).
), and selectively apply a conductive material (10
) to fill the recesses, and filling other recesses (5) of the plurality of recesses formed in the semiconductor substrate with an insulating material (
12) A method for forming a contact on a semiconductor substrate, comprising the step of filling. (2) The semiconductor substrate according to claim 1, wherein the semiconductor substrate (1) is a silicon substrate, and the conductive material (10) filling the part of the recess is tungsten. Contact formation method. (3) After carrying out the step of filling the conductor material, the surface of the conductor is covered with a protective film (11), and the other recesses (
3. The method of forming a contact on a semiconductor substrate according to claim 1 or 2, characterized in that the step of filling 5) with an insulating material (12) is carried out.