JPS6221127A - Driving device for active matrix type liquid crystal display body - Google Patents

Abstract

PURPOSE:To raise an effective voltage and to improve the contrast of images by driving respective signal electrodes by a sample holder circuit which samples and the holds a video data signal and a current amplifier which amplifies a current by its electric charge. CONSTITUTION:A start signal 102 is transferred in order with a transfer clock signal 103 to generate (n) pulses Pi which divide an effective picture period by (n) and further generate pulses PB in a synchronizing signal period after the effective picture data period. The analog switch SIi in a signal electrode driving circuit 105 turns on with a pulse PAi to sample and hold an image data signal in a capacitor Ci. When an analog switch SZi turns on with the pulse PB, the current amplifier Ai amplifies the current by its electric charge to output a voltage level corresponding to the voltage value of the video data signal to data signal lines 106. The time when data signal lines are charged and discharged electrostatically becomes long and all the signal lines are driven uniformly at a level close to the actual picture data signal voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for an active matrix liquid crystal display, and particularly to a drive circuit on the signal electrode side (generally referred to as the segment electrode side or the horizontal electrode side).

[Summary of the invention]

The present invention relates to an active matrix liquid crystal display (hereinafter referred to as
A sample holder circuit that samples and holds video data signals, and a sample holder circuit that samples and holds video data signals, and a sample holder circuit that samples and holds video data signals in a drive circuit for a liquid crystal display (abbreviated simply as a liquid crystal display), especially in multiple image data signal output circuits that drive the signal electrode side. By driving each signal electrode (outputting video signal data) using a current amplifier that amplifies the current using the generated charge, sufficient video signal data (usually voltage level) is supplied to the signal electrode, and therefore, display The goal is to improve the contrast of images by increasing the effective voltage applied to liquid crystals sealed inside the body.

[Conventional technology]

For example, an element with nonlinear voltage-current characteristics (hereinafter referred to as
A three-terminal type T? T (Th1
Regarding the drive circuit for the liquid crystal display when using the N711mTranstor, there is a known example (Reference 1 Yuki Oguchi et al., "Commercialized LCD Pocket Life Color TV", Nikkei Electronics, September 1984. 1
Day 0, P211-240).

An example of the circuit will be explained based on FIGS. 2 and 3.■ In FIG. 2, 201 is a shift register;
The sampling pulses 207, 208, .
..., generates 2o9. The sample holder 205 consists of an analog switch 210 and a capacitor 211. Here, 211 is a parasitic capacitance on the data signal electrode of the data signal line after the sample holder, or a capacitance artificially formed in the circuit @Analog switch One side of 210 is connected to the image data signal +11204, and the other side is connected to the capacitor 211. The analog switch 210 controls the pulse width Δt of the sampling pulse 207.
is turned on for a period of Δt, and charges the capacitor 211 to the voltage level of the 204 video signal within a period of Δt. Therefore, the charge on the capacitor 211 is reloaded seven times per horizontal video signal period TH. The sampled video signal level is held on the data signal line 213 by the capacitor 211 for a period of T. Further, the selection signal level is held for a period of ']'II. Also, the selection signal side is the fifth
As shown in the figure, TI! Each selection signal line is driven,
In the pixels on the signal line to which the selection signal is output through the selection signal line, the resistance of the nonlinear element 214 decreases, and the liquid crystal 216 and capacitor 215 are charged with the video signal level held on the data signal line. . As a result, the difference between the voltage due to the charge charged in the capacitor 215 and the voltage between the opposing electrode of the liquid crystal display is applied to the liquid crystal layer in each pixel, and a corresponding contrast can be obtained.

In another example, an image data signal output circuit is sampled as an active matrix liquid crystal display drive circuit.
An example configured with a holder and a current amplifier (Reference 2 N,
Kokado et al., Apooksta
ble 1quid-crystaltelevi
sion receiver, engineering 1! ! El! ! Tr
ansanction on Oonsume
rI! 1electranica, vol Cm-27
, Nog, AuP1981) ◎ In this example, there are two sample holders in the image data signal output circuit that drives each data signal line. and the output of the image data signal to the data signal line via the current amplifier are alternately repeated.

[Problems and objectives to be solved by the invention] However, the conventional liquid crystal display drive circuit had the following problems◇ As can be seen from Figures 2 and 3, the most The sample holders of the left and rightmost video signal lines are driven by sampling pulses 207 and 209, respectively, but since the selection signal line 212 is common, 21
There is a time difference from when 2 becomes the "1" level until the sample holder is driven.@Therefore, there is a time difference in the time for accumulating the image data signal level to the left image signal line, but there is a time difference when the image data signal level to the right image signal line is There is not much time for accumulating the image data signal level. This difference is the foot last difference between the left and right sides of the screen.

■If the number of pixels in the horizontal direction of the liquid crystal display is increased to improve the resolution, the sampling frequency of the sample holder will naturally increase, and the pulse width Δ1 of 207 in FIG. becomes narrower.

The sample holder of 205 is connected to the analog switch 210 (
7) Since it can be considered as an integrating circuit whose time constant is the product of ON resistance and capacitor 211, the sampling pulse width Δ
The gap between t and t is caused by the capacitor 211 within the sampling period.
This leads to a decrease in the amount of charge due to the image data signal level that should be stored, resulting in a decrease in the contrast of the liquid crystal display.

(2) So far, we have described the case where a three-terminal element is used as a non-linear element, but when a two-terminal element is used, the problem is even more severe in the drive circuit as described above. In an example where a two-terminal element is used as an active matrix nonlinear element,
Example using MIM type element (Reference document 3 DR-Bar
aff, etc., Engineering EKJID-28, 1981, P756~
739), and an example in which a diode element is configured in a ring shape (Publication Publication No. 59-57273).

In the case of a two-terminal non-linear element, the configuration of one pixel is as shown in Figure 4. In this case, the selection signal line 402 is connected to the opposite electrode side of the liquid crystal display, which is the element's operation. As a result, the voltage-current characteristics of the element are controlled by the voltage difference between the selection signal voltage 402 and the image/data signal voltage 401 (the image data signal voltage level is maintained).
An image data signal voltage level of 1 is applied to the liquid crystal 404 and maintained. Therefore, the voltage-current characteristics of the element are greatly influenced by the image data signal voltage. That is, the right side of the liquid crystal display (11ff (sampling in Figure 3, pulse 20
9), the image data signal voltage before TH is on the data signal line 401 for most of the "1" period of the selection signal 212, so it is greatly influenced by the video signal information before Ti, and the liquid crystal display This results in phenomena such as vertical crosstalk or a downward-sloping screen.

Furthermore, in the case of the conventional example shown in Reference 2, two sample holders are required for each image data signal output circuit, which increases the circuit scale. (Especially when the circuit is made monolithic, the capacitor for the sample holder occupies a large area in the circuit.) In addition, - the current amplifier is always operating during the horizontal image period, so the power consumption also becomes larger.

Furthermore, since an N-channel MO8-7FXT is used as a current amplifier, the operating formula for the saturation region of the N-channel MOS-IFICT (% formula %) is as follows: drain-source current VGs: gate-source voltage vth: threshold voltage β: lFET's As can be seen from the square-law characteristic of the beta value, its transconductance is smaller compared to that of a bipolar fist transistor. Therefore, in order to improve the characteristics of a current amplifier, such as suppressing the voltage drop between the gate and source and improving the slew rate, it is necessary to increase the β value, which is due to the MOS-IFIIiT itself. This means that the transistor size will increase.

The present invention solves the above-mentioned problems with drive circuits that drive conventional active matrix liquid crystal display bodies. ■ There is no difference in contrast between the left and right sides of the screen. ■ Good contrast even when the number of horizontal pixels is increased. Even in an active matrix liquid crystal display using a two-terminal non-II type element, there is no crosstalk and the screen does not slope downward to the right.

〇〇〇〇　〇　　　　　　　　　　　　　　　　　　　　　　Means for Solving the Problems〕]　〇 [Means for Solving the Problems]] In order to solve the above-mentioned problems, the active matrix type according to the present invention In the drive circuit of a liquid crystal display, 1) ■ vI that supplies image data signals to multiple signal electrodes;
Each of the several image data signal output circuits has a capacitor 04 (I=1) that temporarily holds the image data signal voltage.
．． 2. ...1%) ■First analog switch BA4 (
It is opened and closed by pulse F A,i. ) ■A current amplifier Ai that amplifies the current by the amount of charge held in the capacitor 0i (a second analog switch EJBi that supplies the output signal of the current amplifier A< to each of the plurality of signal electrodes)
(opened and closed by pulses Pal), and includes at least a circuit that generates one pulse PA1, PA2, . . . , PAi by dividing the effective image data period in the image data signal into nine; ) Furthermore, the above 1
), the current amplifier Ai has a base terminal connected to the capacitor 0a, a collector terminal connected to the positive power supply terminal, and an emitter terminal connected to the second analog switch SB<. I'm N
It is characterized by being composed of an emitter follower circuit of a PN transistor and an NPN transistor in which a constant current source is interposed between the emitter terminal and the negative power supply terminal,
) Further, in the drive circuit of 2) above, the operation of the constant current source is controlled by the n pulses PA11P. ..., P.A.
The present invention is characterized by having a constant current source control circuit that is stopped when the pulse FB occurs and activated when the pulse FB is generated. [Function] By adopting the above configuration, the present invention enables the following functions. .

In other words, n pulses P'I * P''2 s = '2 P' % obtained by dividing the effective image data period
Therefore, the first analog switch SAd and capacitor C
The image data signal voltage is sampled and held by a sample holder circuit constituted by Ai, and a current is amplified by a current amplifier Ai using the sampled and held charge.

Furthermore, an analog switch F3Bi is interposed between the current amplifier Aj and the signal electrode, and FJBi operates with the pulse PB present in the synchronization signal period after the valid image data period.
The video data signal voltage level once sampled and held in the capacitor Oj is output simultaneously for all signal electrodes through the current amplifier Ai. Therefore, it becomes possible to uniformly output the image data signal voltage level to each signal electrode in the horizontal direction.

Furthermore, by using the current amplifier At as an emitter follower of an HPN transistor with a constant current source connected to the emitter terminal, a current amplifier that can sufficiently charge and discharge the amount of current corresponding to the image data signal voltage level to the signal electrode can be realized. ,
Further, the entire drive circuit is constructed from a MOS-IFBT type integrated circuit, and the power consumption of the circuit can be reduced.

Further, the operation of the constant current source is controlled by the constant current source control circuit to produce a pulse PB that operates the second analog switch BB4.
Power consumption can be reduced by setting only the period j. [Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a liquid crystal display driving circuit according to the present invention, and FIG. 5 is a timing φ chart depicting signals of each part in FIG. 1.

101.degree. is a shift register as a pulse generating circuit, 102 is its start signal input, and 103 is a transfer lock signal input. As shown in FIG. 5, the start signal is transmitted, 102 is transmitted, and the lock signal 103 is transmitted sequentially, and the effective image data period is divided externally (n is the same as the number of signal electrodes in the horizontal direction of the liquid crystal display screen). n pulses P
i (i=1.2...9%), and further generates a pulse PB within a synchronization signal period after the end of the effective image data period.

The signal electrode drive circuit 105 has the following configuration.

One end is connected to the image signal data line, the other end is connected to the capacitor Ci and the current amplifier At, and the first analog switch 5xj (when pmu i is "1"
''), a current amplifier A< that amplifies the current with a charge corresponding to the voltage level of the image data signal held in the capacitor Ci, one end of which is connected to the output terminal of the current amplifier Aj, and the other end of which is connected to the output terminal of the data signal. It is connected to ll5 (signal electrode) and consists of a second analog switch F3zt which uses Ps as a control signal.

Analog switch SIj is turned on by pulse PAi to sample and hold the image data signal in capacitor Ci. With the charges sampled and held in aS, when the analog switch Szi goes OH with the pulse PB, the current amplifier Aj amplifies the current, and outputs the voltage level corresponding to the voltage value of the video data signal as the data signal 1106.

Unlike conventional liquid crystal display drive circuits, the image data signal is sequentially sampled and held in a sample holder circuit consisting of an analog switch S1i and a capacitor Ci using a pulse Phi, and all analog switches Szi are turned on during the pulse FB period, and the current amplifier is Af outputs the image data signal voltage to the data signal line at the same time, and the time to actually charge and discharge the data signal line is P compared to Δ11 (see Figure 3).
B pulse width Δt2 (can be as wide as the width of the 0 synchronization signal, see Figure 5), and all data signal lines can be driven uniformly and at a level sufficiently close to the actual image data signal voltage◇ In the conventional drive circuit, the capacitor 211 (see FIG. 2) connected to the data signal line required a relatively large capacitance value, but in the circuit according to the present invention, a current amplifier Ai that amplifies the current by the charge of the sample holder is used. Therefore, the value of the capacitor Ci of the sample holder does not need to be so large, and therefore the number of signal electrodes in the horizontal direction increases, and the pulse width of the pulse pA< that turns on the first analog switch SXi Δ1. (See FIG. 5), the time constant due to the ON resistance of Ci and SX (on resistance) can be made small, and the image data signal voltage can be sampled and held sufficiently.

FIG. 6 shows an example of the configuration of a current amplifier according to the present invention. Capacitor Ci is NPN transistor low 010 base terminal 6
A collector terminal 605 of the NPN transistor RO 01 is connected to the positive power supply terminal, and a constant current source 602 is distributed between the emitter terminal 606 and the negative power supply terminal (ground).

The output of the current amplifier is connected to the emitter terminal 606.
03, it is connected to an analog switch 5zz (not shown).

The voltage at the pace terminal 604 varies depending on the voltage of the image data signal. If the base terminal voltage increases, the NPN
The data signal line is charged with a positive voltage by the emitter follower circuit of transistor RO 01, and when the base terminal voltage drops, the data signal line is discharged by the constant current source 602. , 0, which is an example of the configuration of the constant current source 602 in FIG.
The 701ONPN transistor is common to the same transistor 601 in FIG. The constant current source is the constant voltage source 703 and N channel #MO8-'I! It is composed of ET702.

The gate voltage of FET 702 is made constant by constant voltage source 703, and as long as IPICT 702 is operating in the saturation region, the voltage between the gate terminal and source terminal of 702 is constant, so IFKT 702 operates as a constant current source. On the other hand, the gate terminal of the FET 702 is connected to the drain terminal of an N-channel MOS/FET 704 as a constant current source control circuit. IFII! The source terminal of T 704 is grounded, and the inverted signal PB of the pulse PB is input to the gate terminal. Therefore, the pulse FB is
0”, FET 704 is ON, and A If!
The gate terminal of T702 is almost equal to the ground level, and the FE
T702 does not operate as a constant current source but pulse P
If B is “1”, it’s IIFI! 1T704 is 0FIF, and a constant voltage from constant voltage source 703 is applied to the gate terminal of FI'l'702, and 71! +'l'' 702 operates as a constant current source. Therefore, the constant current source is driven intermittently, leading to a reduction in power consumption.

Next, the structure of an NPN transistor will be explained.@The case where the display drive circuit of the present invention is made into a monolithic MO8/MOS transistor will be described (see FIG. 8). 802 is engineering a
・N-type substrate ・Substrate potential is + side power supply terminal 8
01.

The N-type layer 804 is formed into a mold layer by a process such as thermal diffusion or ion implantation.@805 is a metal wiring having electrical connection with each diffusion layer of 803 and 804, and 806 is an oxide layer. 1802N type board is collector,
Tomorrow, an NPN transistor will be formed in which the 805P type layer is the base and the 804M type layer is the emitter.
This is possible in the manufacturing process of OS-Engineering A and does not require any additional steps.

〔Effect of the invention〕

As described above, according to the present invention, in a drive circuit for an active matrix liquid crystal display, a sample holder consisting of a first analog switch fJXi and a capacitor C (which samples and holds an image data signal with a pulse RAi); A current amplifier A t s that amplifies the current with a charge corresponding to the image data signal voltage level held in the al, and a second analog switch Sz that supplies the current amplified by ki to the signal electrode and is turned on by the pulse PR.
By forming an image data signal output circuit that supplies the image data signal to the signal electrode side, it is possible to output the image data signal voltage level for each signal electrode without any superiority difference, and thus the image contrast is uniform. You can maintain your sexuality. In addition, since the image data signal is output simultaneously for all signal electrodes and pulse FB, it is possible to prevent the phenomenon that the screen appears in the lower right corner, which is particularly common when a two-terminal non-linear element is used for the display. NPN with current amplifier Ai connected to the current source on the source terminal side
By using a transistor as an emitter follower, a current amplifier with a large current amplification factor and a high slew rate can be configured. Similarly to other drive circuit parts (shift registers, analog switches, etc.), it can be made monolithic with MOS/process 0. This allows the circuit to be made smaller.

Furthermore, the constant current source in the current amplifier Ai is operated by the constant current source control circuit only during the period when the second analog switch F3zt is ON, thereby reducing current consumption.

[Brief explanation of the drawing]

FIG. 1: Block diagram of a liquid crystal display drive circuit according to the present invention FIG. 2: Block diagram of a conventional liquid crystal display drive circuit FIG. 5: Timing chart diagram regarding FIG. 2 Figure 4: Pixel configuration using two-terminal nonlinear element No. 5
Figure: Timing chart for Figure 1 Figure 6: Configuration diagram of current amplifier (1) Figure 7: Configuration diagram of current amplifier (2) Figure 8: Configuration diagram of NPN transistor Cross-sectional view 101...Shift register 105...Image data signal output circuit SXi...First analog switch ai...Capacitor Aj...Current amplifier Szi...Second analog switch 601... Emitter follower type NPN transistor low 02... constant current source 704... N channel MO as constant current source control circuit
8-IFII! T 802...N-type substrate 803...P-type layer 804-...N-type layer 2, *:5-i failure? 5ttirzi of pixel for r begging
Figure 4 Figure 6 Figure 7

Claims (4)

[Claims] (1) a) Liquid crystal is sealed between two opposing substrates,
On the inside of at least one of the substrates, there are a plurality of signal electrodes into which image data signals are input, and an element having nonlinear voltage-current characteristics connected to the signal electrode on one side to receive the image data signals. b) Each of the plurality of image data signal output circuits supplying image data signals to the plurality of signal electrodes is configured such that (a) A capacitor C_i that temporarily holds the data signal voltage (i=1, 2, ..., n, n is the number of the plurality of signal electrodes, the same applies hereinafter.) (a) Image data signal voltage is applied to the capacitor C_i. The first analog switch S_A___i (pulse P
(C) A current amplifier A_i that amplifies the current by the amount of charge held in the capacitor C_i. (D) A second current amplifier A_i that supplies the output signal of the current amplifier A_i to each of the plurality of signal electrodes. analog switch S
c) The effective image data period excluding the synchronizing signal period during one horizontal scanning period of the image data signal is divided into n to produce n pulses P_A_1, P_A_2, etc.・、P_A＿＿i、・
・, P_A___n is generated, and the pulse P is generated during the synchronization signal period.
1. A drive circuit for an active matrix liquid crystal display, comprising at least a pulse generation circuit that generates _B. (2) a) In the drive circuit for an active matrix liquid crystal display according to claim 1, b) the current amplifier A_i has (a) a base terminal connected to the capacitor C_i;
(b) The collector terminal is connected to the positive power supply terminal, and (c) the emitter terminal is connected to the second analog switch S_B___i.
and (d) an emitter-follower circuit of the NPN transistor, which includes a constant current source interposed between the emitter terminal and the negative power supply terminal. A drive circuit for an active matrix liquid crystal display according to item 1. (3) a) In the drive circuit for an active matrix liquid crystal display according to claim 2, b) the operation of the constant current source is controlled by the n pulses P_A_1, P_A_
2..., P_A__i, . Driving circuit for type liquid crystal display. (4) In the drive circuit for an active matrix liquid crystal display according to claim 2 or 3,
The drive circuit of the active matrix type liquid crystal display is M
The NPN transistor has an N-type substrate as a collector, a P-type layer diffused in the N-type substrate as a base, and an N-type layer diffused in the P-type layer as an emitter. A driving circuit for an active matrix liquid crystal display according to claim 2 or 3, characterized in that: