JPS62210769A - Subscriber's circuit testing system - Google Patents

Subscriber's circuit testing system

Info

Publication number
JPS62210769A
JPS62210769A JP5423086A JP5423086A JPS62210769A JP S62210769 A JPS62210769 A JP S62210769A JP 5423086 A JP5423086 A JP 5423086A JP 5423086 A JP5423086 A JP 5423086A JP S62210769 A JPS62210769 A JP S62210769A
Authority
JP
Japan
Prior art keywords
circuit
subscriber
code
transmitted
test sound
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5423086A
Other languages
Japanese (ja)
Other versions
JPH0371828B2 (en
Inventor
Kiyoshi Shibuya
清 渋谷
Tokuji Koga
古賀 得二
Michio Suzuki
道夫 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5423086A priority Critical patent/JPS62210769A/en
Publication of JPS62210769A publication Critical patent/JPS62210769A/en
Publication of JPH0371828B2 publication Critical patent/JPH0371828B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To confirm the normalcy of a code decoding circuit in a subscriber's circuit being put in a vacant state, by transmitting a test tone of digital form to the subscriber's circuit through a channel network, after the power down state of the code decoding circuit is cancelled from the outside. CONSTITUTION:In the testing time of a code decoding circuit 23 in a subscriber's circuit 2 being put in the vacant state, a power supplying signal (p) is transmitted to the subscriber's circuit 2, and the power down state of the code decoding circuit 23 is cancelled. Next, the test tone of digital form is transmitted from a test tone generation circuit 4 to the subscriber's circuit 2 through a channel network 3, and the code decoding circuit 23 converts a transmitted test tone of digital form to the one of analog form, and transmits it to two-wire/four-wire conversion circuit 22. By receiving the test tone of digital form by a reception circuit 5, it can be confirmed that the code decoding function of the code decoding circuit 23 in the subscriber's circuit is executed normally.

Description

【発明の詳細な説明】 〔概要〕 ディジタル交換機において、加入者回路の符号復号回路
のパワーダウン状態を外部から解除可能とし、空き状態
にある加入者回路の符号復号回路に電力を供給した状態
で、通話路網を介して試験音を送り、符号復号回路およ
び二線四線変換回路を経由して返送されることにより、
符号復号回路の正常性を確認する。
[Detailed Description of the Invention] [Summary] In a digital exchange, the power-down state of the code/decoder circuit of a subscriber circuit can be canceled from the outside, and power is supplied to the code/decoder circuit of the subscriber circuit in an idle state. , by sending the test tone through the communication channel network and returning it via the code/decoding circuit and the two-wire/four-wire conversion circuit.
Check the normality of the code/decoder circuit.

〔産業上の利用分野〕[Industrial application field]

本発明はディジタル交換機における加入者回路試験方式
の改良に関する。
The present invention relates to improvements in subscriber circuit testing methods in digital exchanges.

ディジタル交換機においては、各加入者回路に収容電話
機から伝達されるアナログ形式の音声信号をディジタル
形式に変換して通話路網に伝達し、また通話路網から伝
達されるディジタル形式の音声信号をアナログ形式に変
換して電話機に伝達する符号復号回路が設けられている
Digital switching equipment converts analog voice signals transmitted from telephones to each subscriber circuit into digital format and transmits them to the communication network, and also converts digital voice signals transmitted from the communication network into analog A code/decoder circuit is provided for converting the data into a format and transmitting the data to the telephone set.

なお加入者回路が空き状態にある場合には、符号復号回
路を低電力化させる、所謂パワーダウン機能を具備させ
る場合が少な(ない。
Note that when the subscriber circuit is in an idle state, the encoder/decoder circuit is rarely provided with a so-called power-down function to reduce the power consumption.

かかるパワーダウン機能を具備する加入者回路に対して
も、符号復号回路の試験が空き状態において確実に行わ
れることが望まれる。
Even for subscriber circuits equipped with such a power-down function, it is desired that the code/decoder circuit be reliably tested in an idle state.

〔従来の技術〕[Conventional technology]

第3図は従来ある加入者回路の一例を示す図である。 FIG. 3 is a diagram showing an example of a conventional subscriber circuit.

第3図において、加入者回路2は収容電話機1に対し通
話電流を供給し、また電話機1のオンフック/オフフッ
タ状態を監視する給電・監視回路21と、二線式加入者
線と四線式通話路網3とを接続する二線四線変換回路2
2と、符号復号回路23とを有する。
In FIG. 3, the subscriber circuit 2 supplies a communication current to the accommodated telephone 1, and also includes a power supply/monitoring circuit 21 that monitors the on-hook/off-footer state of the telephone 1, and a two-wire subscriber line and a four-wire communication circuit. Two-wire four-wire conversion circuit 2 connecting to road network 3
2 and a code/decoder circuit 23.

更に加入者回路2はパワーダウン機能を有しており、電
話機1がオンフッタ状態にあり、加入者回路2が空き状
態にある場合には、給電・監視回路21から符号復号回
路23に対して電力供給信号pは伝達されず、符号復号
回路23はパワーダウン状態におかれる。
Furthermore, the subscriber circuit 2 has a power-down function, and when the telephone 1 is in an on-footer state and the subscriber circuit 2 is in an idle state, power is not supplied from the power supply/monitoring circuit 21 to the code/decoder circuit 23. The supply signal p is not transmitted, and the code/decoder circuit 23 is placed in a power-down state.

かかる状態で、給電・監視回路21が電話機1のオフフ
ックを検出すると、符号復号回路23に電力供給信号p
を伝達する。
In this state, when the power supply/monitoring circuit 21 detects off-hook of the telephone 1, the power supply signal p is sent to the code/decoding circuit 23.
Communicate.

電力供給信号pを受信した符号復号回路23はパワーダ
ウン状態を解除し、正常に符号復号機能を実行する。
The code/decoder circuit 23 that has received the power supply signal p releases the power-down state and normally executes the code/decode function.

次に空き状態にある加入者回路2の符号復号回路23を
試験する為に、中央制御装置6が通話路N43を介して
試験音発生回路4と試験音受信回路5とを加入者回路2
に接続し、試験音発生回路4が発生するディジタル形式
の試験音を加入者回路2に伝達しても、符号復号回路2
3はパワーダウン状態にある為、符号復号回路23の試
験は実行不可能である。
Next, in order to test the code/decoder circuit 23 of the subscriber circuit 2 which is in a vacant state, the central control unit 6 connects the test tone generating circuit 4 and the test tone receiving circuit 5 to the subscriber circuit 2 via the communication path N43.
Even if the digital test sound generated by the test sound generation circuit 4 is transmitted to the subscriber circuit 2, the code/decoding circuit 2
3 is in a power-down state, testing of the code/decoder circuit 23 cannot be performed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上の説明から明らかな如く、従来ある加入者回路にお
いては、符号復号回路23のパワーダウン状態は、給電
・監視回路21が伝達する電力供給信号pによってのみ
解除される為、空き状態にある加入者回路2の符号復号
回路23を試験することは不可能であった。
As is clear from the above description, in a certain conventional subscriber circuit, the power down state of the code/decoder circuit 23 is canceled only by the power supply signal p transmitted by the power supply/monitoring circuit 21, so that the subscriber circuit in the vacant state It was not possible to test the encoder/decoder circuit 23 of the operator circuit 2.

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明の原理を示す図である。 FIG. 1 is a diagram showing the principle of the present invention.

第1図において、2は、給電・監視回路21、二線四線
変換回路22および符号復号回路23を有し、且つパワ
ーダウン機能を有するディジタル交換機の加入者回路、
3は通話路網、4は試験音発生回路、5は試験音受信回
路である。
In FIG. 1, 2 is a subscriber circuit of a digital exchange which has a power supply/monitoring circuit 21, a two-wire/four-wire conversion circuit 22, and a code decoding circuit 23, and also has a power-down function;
3 is a communication path network, 4 is a test sound generating circuit, and 5 is a test sound receiving circuit.

100は本発明により設けられ、符号復号回路23のパ
ワーダウン状態を給電・監視回路21からのみならず、
外部からも解除可能とする解除手段である。
Reference numeral 100 is provided according to the present invention, and the power-down state of the code/decoder circuit 23 can be detected not only from the power supply/monitoring circuit 21, but also from the power supply/monitoring circuit 21.
This is a release means that can also be released from the outside.

〔作用〕[Effect]

空き状態にある加入者回路2の符号復号回路23を試験
する場合には、外部から符号復号回路23のパワーダウ
ン状態を解除した後、通話路網3を介して接続した試験
音発生回路4から送出されるディジタル形式の試験音を
加入者回路2に伝達する。符号復号回路23は伝達され
た試験音をアナログ形式に変換し、二線四線変換回路2
2に伝達するが、二線四線変換回路22は電話機lがオ
ンフッタ状態にある為、符号復号回路23から伝達され
るアナログ形式の試験音を符号復号回路23に返送する
。符号復号回路23は返送されたアナログ形式の試験音
をディジタル形式に変換し、通話路網3を介して試験音
受信回路5に伝達する。
When testing the code/decoder circuit 23 of the subscriber circuit 2 which is in an idle state, after canceling the power-down state of the code/decoder circuit 23 from the outside, the test tone generating circuit 4 connected via the communication channel network 3 The transmitted test tone in digital format is transmitted to the subscriber circuit 2. The code/decoder circuit 23 converts the transmitted test sound into an analog format, and converts the transmitted test sound into an analog format.
However, since the telephone 1 is in the on-footer state, the two-line and four-wire conversion circuit 22 returns the analog test tone transmitted from the code decoding circuit 23 to the code decoding circuit 23. The code/decoder circuit 23 converts the returned test sound in analog format into a digital format and transmits it to the test sound receiving circuit 5 via the communication channel network 3.

試験音受信回路5がディジタル形式の試験音を受信する
ことにより、加入者回路2の符号復号回路23の正常性
が確認される。
The normality of the code/decoding circuit 23 of the subscriber circuit 2 is confirmed by the test sound receiving circuit 5 receiving the digital test sound.

〔実施例〕〔Example〕

以下、本発明の一実施例を図面により説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第2図は本発明の一実施例による加入者回路試験方式を
示す図である。なお、全図を通じて同一符号は同一対象
物を示す。
FIG. 2 is a diagram showing a subscriber circuit testing method according to an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

第2図においては、加入者回路2内にゲート24が解除
手段100として設けられている。
In FIG. 2, a gate 24 is provided in the subscriber circuit 2 as a release means 100.

また第2図においては、二線四線変換回路22は増幅器
A1およびA2、並びに減算器A3等により構成されて
いることが示されている。符号復号回路23から増幅器
A1に入力されるアナログ信号は、給電・監視回路21
および減算器A3の反転入力端子(−)に伝達される。
Further, in FIG. 2, it is shown that the two-line and four-line conversion circuit 22 is composed of amplifiers A1 and A2, a subtracter A3, and the like. The analog signal input from the code/decoding circuit 23 to the amplifier A1 is sent to the power supply/monitoring circuit 21.
and is transmitted to the inverting input terminal (-) of subtracter A3.

電話機1がオフフッタ状態にある場合には、給電・監視
回路21は増幅器A1から伝達されたアナログ信号を電
話機1に伝達すると共に二線四線変換回路22の増幅器
A2を介して減算器A3の非反転入力端子(+)に入力
する。その結果減算器A3においては、増幅器A2から
伝達されるアナログ信号と増幅器A1から伝達されるア
ナログ信号とが相殺され、アナログ信号が符号復号回路
23に返送されることを阻止している。
When the telephone 1 is in the off-footer state, the power supply/monitoring circuit 21 transmits the analog signal transmitted from the amplifier A1 to the telephone 1, and also transmits the analog signal transmitted from the amplifier A1 to the telephone 1 via the amplifier A2 of the two-wire/four-wire conversion circuit 22 to the off-footer state of the subtracter A3. Input to the inverting input terminal (+). As a result, in the subtracter A3, the analog signal transmitted from the amplifier A2 and the analog signal transmitted from the amplifier A1 cancel each other out, thereby preventing the analog signal from being transmitted back to the code/decoding circuit 23.

第2図においても、加入者回路2はパワーダウン機能を
有しており、空き状態にある場合には、符号復号回路2
3はパワーダウン状態におかれる。
Also in FIG. 2, the subscriber circuit 2 has a power-down function, and when it is in an idle state, the code/decoder circuit 2
3 is placed in a power down state.

かかる状態で、給電・監視回路21が電話機1のオフフ
ッタを検出すると、ゲート24を介して符号復号回路2
3に電力供給信号pを伝達し、パワーダウン状態を解除
する。
In this state, when the power supply/monitoring circuit 21 detects an off-footer of the telephone 1, the power supply/monitoring circuit 21 sends the code to the code/decoding circuit 2 via the gate 24.
3 to release the power-down state.

次に空き状態にある加入者回路2の符号復号回路23を
試験する場合には、中央制御装置6は通話路!ii3を
介して加入者回路2に、試験音発生回路4と試験音受信
回路5とを接続すると共に、制御回路7に指示を与え、
加入者回路2に電力供給信号pを伝達させる。
Next, when testing the code/decoder circuit 23 of the subscriber circuit 2 which is in an idle state, the central control unit 6 selects the communication path! Connecting the test sound generating circuit 4 and the test sound receiving circuit 5 to the subscriber circuit 2 via ii3, and giving instructions to the control circuit 7;
A power supply signal p is transmitted to the subscriber circuit 2.

該電力供給信号pは、ゲート24を介して符号復号回路
23に伝達され、符号復号回路23のパワーダウン状態
を解除させる。
The power supply signal p is transmitted to the code/decoder circuit 23 via the gate 24 and causes the code/decoder circuit 23 to be released from the power-down state.

かかる状態で、試験音発生回路4から通話路網3を介し
て加入者回路2にディジタル形式の試験音が伝達される
と、符号復号回路23は伝達されたディジタル形式の試
験音をアナログ形式に変換し、二線四線変換回路22に
伝達する。
In this state, when a digital test sound is transmitted from the test sound generation circuit 4 to the subscriber circuit 2 via the communication path network 3, the code/decoder circuit 23 converts the transmitted digital test sound into an analog format. The signal is converted and transmitted to the two-wire/four-wire conversion circuit 22.

二線四線変換回路22においては、増幅器A1が受信し
たアナログ形式の試験音を給電・監視回路21および減
算器A3の反転入力端子(−)に伝達するが、電話機1
がオンフッタ状態にある為、給電監視回路21は増幅器
A1から伝達される試験音を増幅器A2に伝達しない。
In the two-wire/four-wire conversion circuit 22, the analog test sound received by the amplifier A1 is transmitted to the power supply/monitoring circuit 21 and the inverting input terminal (-) of the subtracter A3.
is in the on-footer state, the power supply monitoring circuit 21 does not transmit the test sound transmitted from the amplifier A1 to the amplifier A2.

その結果減算器A3は、増幅器A1から入力されたアナ
ログ形式の試験音を、折返し符号復号回路23に返送す
る。
As a result, the subtracter A3 returns the analog test sound input from the amplifier A1 to the return code decoding circuit 23.

符号復号回路23は、二線四線変換回路22から返送さ
れたアナログ形式の試験音をディジタル形式に変換し、
通話路網3を介して試験音受信回路5に伝達する。
The code/decoder circuit 23 converts the test sound in analog format returned from the two-wire/four-wire conversion circuit 22 into a digital format.
It is transmitted to the test sound receiving circuit 5 via the communication path network 3.

試験音受信回路5がディジタル形式の試験音を受信する
ことにより、加入者回路2内の符号復号回路23が正常
に符号復号機能を実行していることが確認される。
When the test sound receiving circuit 5 receives the digital test sound, it is confirmed that the code/decoding circuit 23 in the subscriber circuit 2 is normally performing the code/decoding function.

以上の説明から明らかな如(、本実施例によれば、空き
状態にある加入者回路2に制御回路7から電力供給信号
pを伝達し、符号復号回路23のパワーダウン状態を解
除した後、試験音発生回路4から伝達したディジタル形
式の試験音が試験音受信回路5に返送されることを確認
することにより、符号復号回路23の正常性が確認可能
となる。
As is clear from the above description (according to this embodiment, after transmitting the power supply signal p from the control circuit 7 to the subscriber circuit 2 in the idle state and canceling the power-down state of the code/decoder circuit 23, By confirming that the digital test tone transmitted from the test tone generating circuit 4 is returned to the test tone receiving circuit 5, the normality of the code/decoding circuit 23 can be confirmed.

なお、第2図はあく迄本発明の一実施例に過ぎず、例え
ば加入者回路2の構成は図示されるものに限定されるこ
とは無く、他に幾多の変形が考慮されるが、何れの場合
にも本発明の効果は変わらない。
Note that FIG. 2 is only one embodiment of the present invention, and for example, the configuration of the subscriber circuit 2 is not limited to that shown in the figure, and many other modifications may be considered. The effect of the present invention does not change even in this case.

〔発明の効果〕〔Effect of the invention〕

以上、本発明によれば、前記ディジタル交換機において
、空き状態にある加入者回路の符号復号回路の正常性が
確認可能となり、当該ディジタル交換機の信錬性が向上
する。
As described above, according to the present invention, in the digital exchange, it is possible to confirm the normality of the code/decoder circuit of an idle subscriber circuit, and the credibility of the digital exchange is improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の原理を示す図、第2図は本発明の一実
施例による加入者回路試験方式を示す図、第3図は従来
ある加入者回路の一例を示す図である。 図において、1は電話機、2は加入者回路、3は通話路
網、4は試験音発生回路、5は試験音受信回路、6は中
央制御装置、7は制御回路、21は給電・監視回路、2
2は二線四線変換回路、23は符号復号回路、24はゲ
ート、1ooは解除手段、A1およびA2は増幅器、A
3は減算器、畢 1 犯 苧 2 口
FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a diagram showing a subscriber circuit testing method according to an embodiment of the present invention, and FIG. 3 is a diagram showing an example of a conventional subscriber circuit. In the figure, 1 is a telephone, 2 is a subscriber circuit, 3 is a communication path network, 4 is a test sound generation circuit, 5 is a test sound reception circuit, 6 is a central control unit, 7 is a control circuit, and 21 is a power supply/monitoring circuit. ,2
2 is a two-wire/four-wire conversion circuit, 23 is a code decoding circuit, 24 is a gate, 1oo is a release means, A1 and A2 are amplifiers, and A
3 is a subtractor, 1 is a ram 2 is a mouth

Claims (1)

【特許請求の範囲】 給電・監視回路(21)と、二線四線変換回路(22)
と、符号復号回路(23)とを有し、且つパワーダウン
機能を有する加入者回路(2)を具備するディジタル交
換機において、 前記符号復号回路(23)のパワーダウン状態を、該加
入者回路(2)の外部から解除可能とする解除手段(1
00)を前記加入者回路(2)に設け、 空き状態にある前記加入者回路(2)のパワーダウン状
態を外部から前記解除手段(100)を介して解除した
後、通話路網(3)を介して試験音発生回路(4)と試
験音受信回路(5)とを接続し、 前記試験音発生回路(4)から送出される試験音が、前
記符号復号回路(23)および二線四線変換回路(22
)を介して前記試験音受信回路(5)に返送可能とする
ことを特徴とする加入者回路試験方式。
[Claims] Power supply/monitoring circuit (21) and two-wire/four-wire conversion circuit (22)
and a code/decoder circuit (23), and a subscriber circuit (2) having a power-down function, the power-down state of the code/decoder circuit (23) is determined by the subscriber circuit (2). 2) Cancellation means (1) that can be released from the outside
00) in the subscriber circuit (2), and after canceling the power down state of the vacant subscriber circuit (2) from the outside via the canceling means (100), the communication path network (3) The test sound generation circuit (4) and the test sound reception circuit (5) are connected via the Line conversion circuit (22
) A subscriber circuit testing method characterized in that the test sound can be returned to the test sound receiving circuit (5) via the test sound receiving circuit (5).
JP5423086A 1986-03-12 1986-03-12 Subscriber's circuit testing system Granted JPS62210769A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5423086A JPS62210769A (en) 1986-03-12 1986-03-12 Subscriber's circuit testing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5423086A JPS62210769A (en) 1986-03-12 1986-03-12 Subscriber's circuit testing system

Publications (2)

Publication Number Publication Date
JPS62210769A true JPS62210769A (en) 1987-09-16
JPH0371828B2 JPH0371828B2 (en) 1991-11-14

Family

ID=12964739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5423086A Granted JPS62210769A (en) 1986-03-12 1986-03-12 Subscriber's circuit testing system

Country Status (1)

Country Link
JP (1) JPS62210769A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7340662B1 (en) * 2003-04-30 2008-03-04 Mcelwee James Francis GBit/s transceiver with built-in self test features

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JP2006085862A (en) 2004-09-17 2006-03-30 Toshiba Corp Information storage medium, information recording method and device, and information reproducing method and device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7340662B1 (en) * 2003-04-30 2008-03-04 Mcelwee James Francis GBit/s transceiver with built-in self test features

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