JPS62208734A - Common signal line for digital signal - Google Patents

Common signal line for digital signal

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Publication number
JPS62208734A
JPS62208734A JP5050286A JP5050286A JPS62208734A JP S62208734 A JPS62208734 A JP S62208734A JP 5050286 A JP5050286 A JP 5050286A JP 5050286 A JP5050286 A JP 5050286A JP S62208734 A JPS62208734 A JP S62208734A
Authority
JP
Japan
Prior art keywords
signal line
shared signal
transmitting
connection point
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5050286A
Other languages
Japanese (ja)
Other versions
JPH077953B2 (en
Inventor
Yasuhiro Nakagawa
中川 安弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asia Electronics Co
Original Assignee
Asia Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asia Electronics Co filed Critical Asia Electronics Co
Priority to JP61050502A priority Critical patent/JPH077953B2/en
Publication of JPS62208734A publication Critical patent/JPS62208734A/en
Publication of JPH077953B2 publication Critical patent/JPH077953B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To decrease the transmission distortion by connecting respectively a resistor to plural connecting points connected to a common signal line, and making the combined resistance equal to the surge impedance of the common signal line. CONSTITUTION:The common signal line A has the surge impedance, its length depends on the sent frequency band, the wavelength lambda is used, and connecting points X1, X2, X3,...Xn are arranged in lengthwise direction. C1-Cn are digital signal transmission/reception equipments connected respectively to the points X1-Xn of the digital line A. A matching resistor (resistance R) is provided respectively to the connecting points between the signal line A and the equipments C1-Cn. n-Set of the matching resistors R are supplied to the connecting points, each resistor R has the resistance being n-time of the surge impedance to match the combined resistance with the surge impedance of the signal line A. Thus, the reflection of the wave at the connecting points is suppressed.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明はデジタル信号の共有信号線に係わり、デジタル
信号の送受信を行なう伝送路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a shared signal line for digital signals, and more particularly to a transmission path for transmitting and receiving digital signals.

送に用いられる共有信号線が、デジタル信号の集配信を
行なうためには、多くの入出力口を必要とする。この場
合共有信号線は高速信号線であるため、伝送する周波数
帯域によっては長さが限定される。更に共有信号線のも
つ波動インピーダンスによって整合をとる必要がある。
The shared signal line used for transmission requires many input/output ports in order to collect and distribute digital signals. In this case, since the shared signal line is a high-speed signal line, its length is limited depending on the frequency band to be transmitted. Furthermore, it is necessary to perform matching using the wave impedance of the shared signal line.

第4図においてAは共有信号線、01〜CIは送受信装
置、Bは信号の入出力口である。ここでλは伝送する周
波数帯域によって決まる信号線の長さとしているが、送
受信装置C1からCnに信号を送る場合、通常は整合を
とらないと、共有信号線経路における入出力口Bの接続
部のような不連続部分における波動の反射が生じて伝送
波形の歪が生じ、正しいデジタル信号の伝送ができない
In FIG. 4, A is a shared signal line, 01 to CI are transmitting/receiving devices, and B is a signal input/output port. Here, λ is the length of the signal line determined by the frequency band to be transmitted, but when sending signals from the transmitting/receiving device C1 to Cn, it is usually necessary to match the input/output port B connection on the shared signal line path. Reflection of waves at such discontinuous portions occurs, causing distortion of the transmitted waveform, making it impossible to transmit correct digital signals.

第5図において共有信号線Aは伝送する周波数帯域によ
って長さが決められ、波長λを有し、長さ的に接続点が
xl l  X2 *  X3 、・・・xnと配列さ
れている。xn点には共有信号線のもつ波動インピーダ
ンスに相当する整合抵抗器RO2が接続されている。デ
ジタル信号の送受信装置C1〜Cnは共有信号線Aにx
1〜xnの配列で接続されている。送受信装置01〜C
rLまでのいずれでも、送信モード、受信モードが各1
個選択され、送受信の回路が成立するようになっている
。共有信号線Aは伝送する周波数が高いため、送受信装
置の接続点x1〜xnの伝搬反射は出来るだけ少ない方
がよい。従って共有信号線Aは波動インピーダンスに対
して整合していた方がよい。
In FIG. 5, the length of the shared signal line A is determined by the frequency band to be transmitted, has a wavelength λ, and the connection points are arranged as xl l X2 * X3, . . . xn in terms of length. A matching resistor RO2 corresponding to the wave impedance of the shared signal line is connected to the xn point. The digital signal transmitting/receiving devices C1 to Cn are connected to the shared signal line A.
They are connected in an array of 1 to xn. Transmitting/receiving device 01-C
Up to rL, transmit mode and receive mode are 1 each.
A transmitting/receiving circuit is established. Since the shared signal line A transmits at a high frequency, it is better to minimize propagation reflections at the connection points x1 to xn of the transmitting and receiving devices. Therefore, it is better for the shared signal line A to match the wave impedance.

しかし次のような状態の場合には不都合な点が多い。例
えば送受信装置C3が送信に選ばれ、CrLが受信に選
ばれた場合、第6図に示すように波動が03から出発し
てCrLに到達する経路の主なものはa、b、cである
。この経路す、cでは、接続点x1においては■Ωイン
ピーダンスで終端であるので、この接続点で波動は10
0%反射となる。これらの接続点の反射が合成されてデ
ジタル信号の伝送歪となる。
However, there are many disadvantages in the following situations. For example, when transmitter/receiver C3 is selected for transmission and CrL is selected for reception, the main paths for the wave to depart from 03 and reach CrL are a, b, and c, as shown in Figure 6. . In this path c, the connection point x1 terminates with ■Ω impedance, so the wave at this connection point is 10
0% reflection. The reflections at these connection points are combined and become transmission distortion of the digital signal.

第7図は経路a、b、c上の接続点を波動が通過すると
きの減衰率を示した図表である。これにもとずいて説明
すると 経路a:送信装置C3から出力されたデジタル信号は(
この場合C3の出力インピーダンスはOΩ)接続点X3
で分岐し、接続点xn方向に曲がり、振幅は70%にな
り、接続点xnに達し、整合された抵抗器RO2を通過
し、受信装置CrLに到達する。
FIG. 7 is a chart showing the attenuation rate when waves pass through connection points on paths a, b, and c. Based on this, route a: The digital signal output from the transmitting device C3 is (
In this case, the output impedance of C3 is OΩ) connection point X3
It branches off at , turns in the direction of the connection point xn, has an amplitude of 70%, reaches the connection point xn, passes through the matched resistor RO2, and reaches the receiving device CrL.

経路b;送信装置C3から出力されたデジタル信号は接
続点x3に達し、分岐して接続点x1方向に曲がり、振
幅は70%になり、X3点で反射率+100%で接続点
x3方向に反射し、再びX3点を通過し、接続点xn方
向に更に振幅が70%になり、xnに達し、受信装置C
rLに到達する。時間ダイアグラム上では、X、とX3
点の間の往復時間分伝搬時間が増加する。
Path b: The digital signal output from the transmitter C3 reaches the connection point x3, branches and bends in the direction of the connection point x1, the amplitude becomes 70%, and is reflected in the direction of the connection point x3 with a reflectance of +100% at the X3 point. Then, it passes through point X3 again, and the amplitude further increases to 70% in the direction of connection point xn, reaches xn, and receiver
Reach rL. On the time diagram, X, and X3
The propagation time increases by the round trip time between points.

経路C:送信装置C3から出力されたデジタル信号は接
続点x3を分岐通過し、振幅70%になり、接続点x1
方向に向かい、X3点で+100%反射し、再びX3点
をC3方向に振幅70%で通過し、送信装置C3で−1
00%反射し、再びX3点を受信装置CrL方向に振幅
70%で通過し、接続点xnに達し、整合抵抗器RO2
を+100%で通過し、受信装置CrLに到達する。時
間ダイアグラム上では、aの経路の場合に比べてX1+
x3間の往復時間と、X 1 + C3間の時間が増加
する。
Path C: The digital signal output from the transmitter C3 branches through the connection point x3, has an amplitude of 70%, and then passes through the connection point x1.
direction, reflects +100% at point X3, passes point X3 again in direction C3 with an amplitude of 70%, and -1 at transmitter C3
00% reflection, passes point X3 again with an amplitude of 70% in the direction of the receiving device CrL, reaches the connection point xn, and connects the matching resistor RO2.
The signal passes through +100% and reaches the receiving device CrL. On the time diagram, X1+
The round trip time between x3 and the time between X 1 + C3 increase.

即ち上記の分だけ、送信装置C3と受信装置CrL間の
共有信号線上におけるデジタル信号の伝送歪が増加する
ものである。
That is, the transmission distortion of the digital signal on the shared signal line between the transmitting device C3 and the receiving device CrL increases by the above amount.

(発明が解決しようとする問題点) 本発明は上記実情に鑑みてなされたもので、歪の少ない
デジタル信号の共有信号線を提供しようとするものであ
る。
(Problems to be Solved by the Invention) The present invention has been made in view of the above-mentioned circumstances, and aims to provide a shared signal line for digital signals with less distortion.

[発明の構成) (問題点を解決するための手段と作用)本発明は、信号
の送受信を行なう共有信号線を設け、この共有信号線に
接続される複数個の送受信装置を設け、この送受信装置
を選択して信号の送信、受信を行なわせ、前記複数個の
送受信装置と共有信号線の接続点にはそれぞれ抵抗器を
接続し、該抵抗器の合成抵抗値が共有信号線の波動イン
ピーダンスと等価性を具備したことを特徴とする。即ち
共有信号線の整合抵抗器をn倍にし、n個の整合抵抗器
を上記のように使用することによって、接続点x1〜x
nにある反射点に平等に整合抵抗器を分配することによ
り(いうならば分散マツチング)共存信号線を伝送する
デジタル信号の総合的な伝送歪を軽減するものである。
[Structure of the Invention] (Means and Effects for Solving the Problems) The present invention provides a shared signal line for transmitting and receiving signals, a plurality of transmitting and receiving devices connected to this shared signal line, and a shared signal line for transmitting and receiving signals. A device is selected to transmit and receive signals, and a resistor is connected to each connection point between the plurality of transmitting/receiving devices and the shared signal line, and the combined resistance value of the resistors is the wave impedance of the shared signal line. It is characterized by having equivalence with . That is, by increasing the matching resistor of the shared signal line by n times and using n matching resistors as described above, the connection points x1 to x
By equally distributing matching resistors to the reflection points located at n (dispersion matching, so to speak), the overall transmission distortion of digital signals transmitted through coexisting signal lines is reduced.

(実施例) 以下図面を参照して本発明の一実施例を説明する。第1
図においてAは共有信号線であり、波動インピーダンス
を有する信号線である。共有信号線Aは伝送する周波数
帯域によって長さが決められ、波長λを有し、長さ的に
接続点がXl。
(Example) An example of the present invention will be described below with reference to the drawings. 1st
In the figure, A is a shared signal line, which is a signal line having wave impedance. The length of the shared signal line A is determined by the frequency band to be transmitted, has a wavelength λ, and has a connection point Xl in terms of length.

X2.X3.・・・xnと配列されている。01〜Cr
Lは共有信号線AにX1〜xrLの配列で接続されたデ
ジタル信号の送受信装置である。送受信装置C1〜cn
までのいずれでも送信モードと受信モードが各1個選択
され、送受信回路が成立するようになっている。共有信
号線Aと送受信装置01〜CrLとの接続点には、それ
ぞれRなる整合抵抗を有する。即ち第5図、第6図に見
られる整合抵抗器RO2は有していない。C1〜cnま
でn個ある送受信装置に対して、共有信号線Aには送受
信装置の接続点にRなる整合抵抗器が合計n個あり、整
合の機能を有している。この各Rは、波動インピーダン
スに対してn倍(nXR2o )の抵抗値を有するよう
に選んであり、合成抵抗値が共有信号線Aの波動インピ
ーダンスに整合されるようになっている。
X2. X3. ...xn. 01~Cr
L is a digital signal transmitting/receiving device connected to the shared signal line A in an arrangement of X1 to xrL. Transmitting/receiving devices C1 to cn
In any of the above, one transmission mode and one reception mode are selected, and a transmission/reception circuit is established. Connection points between the shared signal line A and the transmitting/receiving devices 01 to CrL each have a matching resistor R. That is, the matching resistor RO2 shown in FIGS. 5 and 6 is not included. For the n transmitting/receiving devices C1 to cn, the shared signal line A has a total of n matching resistors R at the connection points of the transmitting/receiving devices, and has a matching function. Each R is selected to have a resistance value n times the wave impedance (nXR2o), so that the combined resistance value is matched to the wave impedance of the shared signal line A.

第1図の特徴を第2図により述べると、従来行なわれて
いた共有信号線上のxrL点にあった整合抵抗器RO2
の代りに、送受信装置の接続数n個と同数またはその付
近の個数を乗じた抵抗値をもつ整合抵抗器を各接続点x
1〜xn又はその付近に接続する。これにより従来用い
られていた集中された整合抵抗器による波動に対する不
平等性を平等にして、接続点における波動の反射をおさ
える。この場合の接続点の反射率はrK−1−1/rL
Jとなるので、従来実施されていた方法に対してデジタ
ル信号の伝送歪を少なくすることができる。
To describe the characteristics of FIG. 1 with reference to FIG. 2, the matching resistor RO2 at point xrL on the shared signal line,
Instead, a matching resistor with a resistance value equal to or close to the number n of connected transmitting/receiving devices is installed at each connection point x.
Connect to or around 1 to xn. This equalizes the unevenness of waves due to the conventionally used concentrated matching resistor and suppresses wave reflections at the connection point. In this case, the reflectance of the connection point is rK-1-1/rL
J, the transmission distortion of the digital signal can be reduced compared to the conventional method.

第3図に本実施例の経路a、b、c (主要部のみ記す
)上の接続点を、波動が通過するときの減衰率を記入し
た図表を示す。以下この図表にもとずいて説明する。
FIG. 3 shows a chart in which the attenuation rate when a wave passes through the connection points on paths a, b, and c (only the main parts are shown) of this embodiment is shown. The explanation below will be based on this chart.

経路a:送信装置C3から出力されたデジタル信号は接
続点x3で分岐し、接続点xn方向に曲がり、振幅は7
0%になり、接続点X4.X5を通過する毎にrl−1
/rLJ即ちrK−1−(1/rL) Jで振幅が減少
しながらxn点に達し、受信装置CrLに到達する。
Path a: The digital signal output from the transmitter C3 branches at the connection point x3, bends in the direction of the connection point xn, and has an amplitude of 7.
0%, and connection point X4. rl-1 every time it passes through X5
/rLJ, that is, rK-1-(1/rL) J, the amplitude decreases until it reaches point xn, and reaches the receiving device CrL.

経路b=送信装置C3から出力されたデジタル信号は接
続点x3で分岐し、接続点x1方向に向かい、接続点x
2を通過するとに%に振幅が減少し、X1点でに%反射
して再びX2点をに%で通過し、X3点で振幅が70%
に減少し、x4゜X5.・・・を通過する毎にrl−1
/rLJ即ちに%ずつ減衰しながら接続点xrLに達し
、受信装置Cnに到達する。
Path b = The digital signal output from the transmitter C3 branches at the connection point x3, heads toward the connection point x1, and returns to the connection point x
When it passes through 2, the amplitude decreases to %, it reflects to % at point X1, passes through point X2 again at %, and the amplitude decreases to 70% at point X3.
It decreases to x4° x5. rl-1 every time it passes...
/rLJ, that is, reaches the connection point xrL while attenuating by %, and reaches the receiving device Cn.

経路C:送信装置C3から出力されたデジタル信号は接
続点x3で分岐を通過し、振幅は70%になり、接続点
x1方向に向かい、接続点X2を通過し、K%の振幅に
なり、X1点でに%反射し、X2点を通過し、K%振幅
が減少し、X3点で分岐し、振幅が70%減少し、送信
装置c3方向に向かい、C3で−100%反射し、X3
点方向に向かい、再びX3点で振幅が70%減衰しなが
ら接続点xn方向に向かい、x4 、x5 * ・・・
を通過する毎にに%振幅が減衰しながらxn点を通過し
、受信装置CrLに到達するものである。
Path C: The digital signal output from the transmitting device C3 passes through a branch at the connection point x3, the amplitude becomes 70%, heads toward the connection point x1, passes through the connection point X2, and becomes the amplitude K%, % reflected at point X1, passed through point X2, decreased K% amplitude, branched at point
It heads in the direction of the point, and the amplitude attenuates by 70% again at point X3, and heads in the direction of the connection point xn, x4, x5*...
It passes through point xn while the % amplitude attenuates each time it passes through, and reaches the receiving device CrL.

上記のように、デジタル信号の伝送歪の原因となるXl
、X3点間の往復時間・とX3.C3間の時間にに%の
減衰を生じるため、伝送歪が減少するものである。
As mentioned above, Xl causes transmission distortion of digital signals.
, the round trip time between X3 points and X3. % attenuation occurs during the time between C3, thereby reducing transmission distortion.

[発明の効果] 以上説明した如く本発明によれば、共有信号線の整合抵
抗器をn倍にし、n個の整合抵抗器を上記のように使用
することによって(いうならば分散マツチング)、接続
点X1〜xnにある反射点に平等に整合抵抗器を分配し
、共有信号線を伝送するデジタル信号の伝送を、従来方
式に比べてに%の減衰を生じさせることにより、総合的
な反射及び減衰が改善され、伝送歪を軽減することがで
きるものである。
[Effects of the Invention] As explained above, according to the present invention, by increasing the number of matching resistors on the shared signal line by n times and using n matching resistors as described above (distributed matching in other words), By distributing matching resistors equally to the reflection points at connection points X1 to Attenuation is improved and transmission distortion can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の構成図、第2図。 第3図は同構成の動作説明図、第4図、第5図は従来の
デジタル信号の共有信号線の構成図、第6図、第7図は
同構成の動作説明図である。 A・・・共有信号線、01〜CrL・・・送受信装置、
x1〜xrL・・・接続点、R・・・抵抗。 出願人代理人 弁理士 鈴江武彦 第1図 第4図 第5図 第6図 第7図
FIG. 1 is a configuration diagram of an embodiment of the present invention, and FIG. FIG. 3 is an explanatory diagram of the operation of the same configuration, FIGS. 4 and 5 are configuration diagrams of a conventional shared signal line for digital signals, and FIGS. 6 and 7 are explanatory diagrams of the operation of the same configuration. A...shared signal line, 01-CrL...transmitter/receiver,
x1~xrL...Connection point, R...Resistance. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 4 Figure 5 Figure 6 Figure 7

Claims (1)

【特許請求の範囲】[Claims] 信号の送受信を行なう共有信号線を設け、この共有信号
線に接続される複数個の送受信装置を設け、この送受信
装置を選択して信号の送信、受信を行なわせ、前記複数
個の送受信装置と共有信号線の接続点にはそれぞれ抵抗
器を接続し、該抵抗器の合成抵抗値が共有信号線の波動
インピーダンスと等価性を具備することを特徴とするデ
ジタル信号の共有信号線。
A shared signal line for transmitting and receiving signals is provided, a plurality of transmitting and receiving devices are provided connected to the shared signal line, and the transmitting and receiving device is selected to transmit and receive signals, and the plurality of transmitting and receiving devices are connected to each other. A shared signal line for digital signals, characterized in that a resistor is connected to each connection point of the shared signal line, and the combined resistance value of the resistors is equivalent to the wave impedance of the shared signal line.
JP61050502A 1986-03-10 1986-03-10 Shared signal line for digital signals Expired - Fee Related JPH077953B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61050502A JPH077953B2 (en) 1986-03-10 1986-03-10 Shared signal line for digital signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61050502A JPH077953B2 (en) 1986-03-10 1986-03-10 Shared signal line for digital signals

Publications (2)

Publication Number Publication Date
JPS62208734A true JPS62208734A (en) 1987-09-14
JPH077953B2 JPH077953B2 (en) 1995-01-30

Family

ID=12860726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61050502A Expired - Fee Related JPH077953B2 (en) 1986-03-10 1986-03-10 Shared signal line for digital signals

Country Status (1)

Country Link
JP (1) JPH077953B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7154954B1 (en) 2000-07-18 2006-12-26 Honda Giken Kogyo Kabushiki Kaisha Communication system
CN104129690A (en) * 2014-06-19 2014-11-05 深圳市海浦蒙特科技有限公司 Elevator communication build-out resistor access control method and elevator communication build-out resistor access control system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS549565A (en) * 1977-06-02 1979-01-24 Fujitsu Ltd Terminating circuit

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US7154954B1 (en) 2000-07-18 2006-12-26 Honda Giken Kogyo Kabushiki Kaisha Communication system
CN104129690A (en) * 2014-06-19 2014-11-05 深圳市海浦蒙特科技有限公司 Elevator communication build-out resistor access control method and elevator communication build-out resistor access control system

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