JPS62205623A - Position alignment pattern - Google Patents

Abstract

PURPOSE:To prevent the decrease of alignment accuracy due to the contraction and expansion of an alignment pattern, by constituting an alignment pattern in the form wherein similar figures are arranged in a telescopic system. CONSTITUTION:An alignment pattern of mask side 1 is constituted in the form wherein three squares, namely an outside square, j-l, a middle square, e-h, and an inside square a-d are arranged in a telescopic system. A black shadowed portion between the outside square and the middle square is an opaque region, a white portion between the middle square and the inside square is a transparent region, and the whole by the inside square are an opaque region. In the similar manner, an alignment pattern of wafer side 3, is constituted in the form wherein two squares, namely an outside square, s-v, and an inside square, o-r, are arranged in a telescopic system. A shaded portion between the outside square and the inside square is a negative or positive region whose reflection index is different from other parts of the wafer.

Description

Detailed Description of the Invention [Field of the Invention] The present invention provides an alignment pattern for aligning two objects in a predetermined relationship, and in particular, an alignment pattern that facilitates visual alignment of a mask and a wafer in an exposure apparatus for manufacturing semiconductor integrated circuits. This relates to the structure of the alignment pattern.

[Prior Art] For example, in an exposure apparatus used for manufacturing large-scale integrated circuits such as VLSI, when manually aligning a mask and a wafer, alignment patterns provided on each of the mask side and the wafer side are observed through a monitor. Then, by overlapping these two patterns in a predetermined relationship, the mask and wafer are aligned.
The figure shows a conventional mask-side alignment pattern and a wafer-side alignment pattern. Reference numeral 8 indicates an alignment pattern on the mask side, and lO indicates an alignment pattern on the wafer side. The state in which these two alignment patterns are superimposed is shown in the bottom row of FIG. 2, and alignment is performed by adjusting the relative positions so that the gaps between the two alignment patterns are evenly distributed. However, during the manufacturing process of integrated circuits, the alignment pattern on the wafer side expands and contracts due to thermal deformation, etc., the gap increases or decreases, and the alignment accuracy changes accordingly, or in some cases, the gap disappears and alignment cannot be achieved. The problem was that I couldn't do it. Reference numeral 9 shows an expanded alignment pattern on the wafer side, and a state in which the alignment pattern 8 on the mask side is superimposed thereon is shown. In this case, there will be no gap and alignment will no longer be achieved. Reference numeral 11 shows the alignment pattern on the shrunk wafer side, and below it shows how it is superimposed on the alignment pattern 8 on the mask side. In this case, the gap between the nests becomes too large.

[Object of the Invention] An object of the present invention is to solve the above-mentioned problems with conventional alignment patterns, and to allow a certain amount of variation in alignment accuracy due to expansion and contraction of the alignment pattern on the wafer side, for example, in the integrated circuit manufacturing process. The goal is to create an alignment pattern that allows alignment to be achieved even if the range of expansion and contraction of the alignment pattern on the wafer side increases.

This purpose is achieved by configuring the alignment pattern on the first object side, which is a mask, for example, and the alignment pattern on the second object side, which is a semiconductor wafer, in the form of nested similar figures, and by overlapping both patterns. This is achieved by determining the sizes of the similar figures of both patterns so that the figures of the other alignment pattern are arranged in a nested relationship with the nesting gap of one alignment pattern and the periphery of that alignment pattern. .

[Example] Hereinafter, a case where the present invention is applied to an exposure apparatus for semiconductor manufacturing will be described as an example.

FIG. 1 shows an alignment pattern according to an embodiment of the present invention and how it is used. In the figure, 1 is an alignment pattern on the first object (hereinafter referred to as a mask) side, 3 is an alignment pattern on the second object (hereinafter referred to as a wafer) side, and when these two patterns are superimposed, the state shown in the bottom row of FIG. 1 is obtained.

As shown in the figure, the alignment pattern 1 on the mask side has three squares, namely the outer square i.

j, u, middle squares e, f, g, h, and inner squares a, b, c, d are arranged in a nested manner, and the area between the outer square and the middle square is filled with black. The part is an opaque area, the white part between the middle square and the inner square is a transparent area, and the inner square is entirely opaque. At the same times t and u, the alignment pattern 3 on the wafer side has two squares, namely outer squares s, t, u, v.
, and inner squares o, p, q, and r are arranged in a nested manner, and the shaded area between the outer square and the inner square has a different reflectance (negative or positive) with respect to other parts of the wafer. ) area. When looking at both patterns, the nesting gap (white part) of alignment pattern 1 on the mask side
and the periphery of its alignment pattern i −j −k−λ
The sizes of the squares of both patterns are determined so that the shapes of the alignment pattern on the wafer side, that is, the outer square and the inner square, are arranged in a nested relationship.

When performing alignment, the relative position is determined so that the area surrounded by the middle squares e, f, g, h of the alignment pattern on the mask side and the inner squares 0゜p, q, r of the alignment pattern on the wafer side are divided. The mask and wafer are aligned by adjusting. In FIG. 1, reference numeral 2 indicates an expanded alignment pattern on the wafer side, and a state in which it is superimposed with alignment pattern 1 on the mask side is shown below. In this case, the inner squares a and b of the alignment pattern on the mask side.

c, d and the inner square 0 of the alignment pattern on the wafer side. Alignment is performed so that the area surrounded by p, q, and r is divided. In addition, in Fig. 1, numeral 4 indicates the alignment pattern on the shrunk wafer side, and below it is the alignment pattern 1 on the mask side.
This shows the state in which these are superimposed. In this case, the outer squares i, j, and 11 of the alignment pattern on the mask side and the outer square S of the alignment pattern on the wafer side.

Alignment is performed so that the area surrounded by t, u, and v is divided.

In the embodiment, a square is shown as a similar figure, but it may be a polygon such as a triangle or a pentagon, or a circle, a cross, a star, or a sector.

[Effects of the Invention] By configuring an alignment pattern according to the present invention, it is possible to avoid a situation where alignment accuracy is decreased or alignment is impossible due to contraction/expansion of the alignment pattern.

[Brief explanation of drawings]

FIG. 1 shows an alignment pattern of a mask and a semiconductor wafer according to the present invention and its use. FIG. 2 shows a conventional mask-to-semiconductor wafer alignment pattern and how it is used. 1: Alignment pattern on the mask side 2.3, 4: Alignment pattern on the wafer side 8: Conventional alignment pattern on the mask side 9, 10.11: Alignment pattern on the wafer side Patent applicant Canon Co., Ltd. Agent Patent attorney Ito Tatsuo Attorney General Patent Attorney Tetsuya Ito 2nd RGF

Claims (1)

[Claims] 1. An alignment pattern for aligning a first object and a second object in a predetermined relationship, wherein the alignment pattern on the first object side and the alignment pattern on the second object side are similar to each other. When the shapes are arranged in a nested manner and both patterns are overlapped, the shapes of the other alignment pattern are arranged in a nested relationship with respect to the gap between the nests of one alignment pattern and the periphery of that alignment pattern. A position alignment pattern characterized in that the sizes of similar figures of both patterns are determined. 2. The alignment pattern according to claim 1, wherein the similar figure is a polygon. 3. The alignment pattern according to claim 2, wherein the polygon is a square or a quadrangle. 4. Claim 1, wherein the similar figure is circular.
The alignment pattern described in section.