JPS62194766A - Phase modulator - Google Patents

Abstract

PURPOSE:To obtain a stable phase modulator against temperature change, secular change and frequency change by using an automatic level control circuit so as to control an output level. CONSTITUTION:A part of an output of an amplifier 10 is extracted and inputted to a detection circuit 12, where an output signal level is converted into a DC voltage. The detection output of the circuit 12 corresponds to a QPSK modulator output level and the fluctuation of the QPSK modulator output level is detected as the fluctuation of the detected output. The detected output is inputted to a voltage comparison/integrator 13, compared with an output level control voltage from a terminal 21, the difference is amplified and integrated and fed back to a variable attenuator 9. As a result, the automatic level control circuit is constituted, where the output level control voltage is used as a reference. The correction to each circuit is not required for temperature and frequency change and only the temperature characteristic of the DC conversion of the detection circuit has only to be compensated.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention makes it possible to make the output of a four-phase phase modulator used in digital satellite communications etc. extremely stable against changes in temperature, changes over time, changes in frequency, etc. , relates to a phase modulator that can switch the output level widely.

(Prior art) In recent years, with the increase in communication capacity, digitization of wireless communications, especially satellite communication δ, etc., has progressed, and a four-phase phase (hereinafter referred to as QPSK) modulation and demodulation system has been used as the digital modulation and demodulation system. The transmission capacity is increased by increasing the transmission capacity. And the transmission signal (UP-LINK) required for satellite communication
Higher quality is required than in general terrestrial communications. In particular, the output level of the transmission A3 signal must not only have high stability against temperature changes and changes over time, but also be able to switch the transmission frequency, change the output level, and stop the output (MUTE) using a control signal. is required.

An outline of such an up-converter that converts the frequency of the modulated output signal into a QPS that outputs the transmission (3(, i) signal and the modulated output signal to the 14 GHz band will be explained with reference to FIG. 4.

In Fig. 4, 1.2 is a double balanced mixer (hereinafter referred to as DBM), 3 is a splitter that divides the input (IK signal into two signals with a 90 degree phase difference), and 5 is a voltage -
Controlled oscillator (hereinafter referred to as VCO), 7 (combiner for No. 2 synthesis, 15°16, IIs, 20.21
．． :15.3B is terminal 525 is switch circuit, 211
．． 29 is an amplifier; 27. :ll is a band pass filter (hereinafter referred to as BPF), 28 is a QPSK modulator, 30
The mixer 532 is a power amplifier, and 33 is a multiplier. Q
The PSK modulator 28 has an oscillation frequency of 1400 by the frequency control voltage (FREQCONT) input to the terminal 18.
The output stop control voltage (MUTE
) is input to the splitter 3 through the switch circuit 25 operated by the splitter 3, which divides the signal into two signals having a phase difference of 90 degrees, and inputs the signals to the DBMI, 2, respectively. DBMI, 2 is data I from terminal 15.16.

A digital signal of data Q is input, and the output of the splitter 3 is modulated to produce a 0 degree/180 degree phase modulated wave and a 90 degree/90 degree/phase modulated wave.
A 270 degree phase modulated wave is obtained. and DBMI, 2
The phase modulated wave output from
The K modulated wave is connected to the output level control voltage (LEV) from terminal 21.
The gain is controlled by an amplifier 26 whose gain changes depending on ELCONT), and outputted via a BPF 27. Furthermore, QP
The upconverter 34 to which the SK modulated wave is input amplifies the QPSK modulated wave using the amplifier 29 and inputs the amplified QPSK modulated wave to the mixer 30 for frequency conversion. Further, the oscillation number 1.3 having high frequency stability inputted to the terminal 35 is inputted to the multiplier 33 to be frequency-multiplied, and the frequency-multiplied number 15 is inputted to the mixer 30. Then, the frequency of the QPSK modulated wave is converted by the signal multiplied by the mixer 30, and inputted to the power amplifier 32 via the BPF:II that passes the 14 GHz band. The power amplifier 32 amplifies the required power and outputs it as a transmission output (UP-LINK) signal to the two satellites. As shown in the figure.

In FIG. 3, 4 is a buffer amplifier, 6 is a fixed frequency divider, 8.10 is a high frequency amplifier, 9 is an iIT variable attenuator,
11 is an attenuator/low-pass filter, 17.22 is a terminal,
24 is a high frequency switch circuit.

The oscillation frequency of vcos changes in the range of 1400 to 1600 MHz depending on the frequency control voltage from the terminal 18, and
The output of the cos is input to the buffer amplifier 4 and the fixed frequency divider 6, and the divided output of the fixed frequency divider 6 is sent from the terminal 17 to a variable frequency divider, a reference oscillator, a phase comparator, and a loop filter (not shown). It is input to the VCO 5 from the output terminal f-18 of the phase-locked loop. In addition, VC
The oscillation frequency of O5 is changed by changing the division ratio of the variable frequency divider of the phase-locked loop. The output of the buffer amplifier 4 is input to a switch circuit 24 that operates with a modulation output stop voltage from a terminal 20. For example, if the voltage is at a high level, the switch circuit 24 is turned off and 13 The switch circuit 24 turns on (and inputs the signal A to the splitter 3 if the signal is low level. The splitter 3 divides the signal into two signals 13 with a phase difference of 90 degrees, so the degree of coupling is adjusted. 3
It is composed of a dB directional coupler or a branch coupler, etc., and two signals with a phase difference of 90 degrees maintained over the frequency band of 1400 to 1600 MHz are obtained, and these two signals are output to the DBMI, 2. DBMI and 2 each have data! , data I of data Q is terminal 15,
16 and 0 in DBM1 where data I is input.
A phase modulated wave of degrees/180 degrees is obtained, and a phase modulated wave of 90 degrees/270 degrees is obtained at DBM2 where data Q is input.
QPSKf harmonics are obtained by inputting the output of the DBMI 2 to the combiner 7 and combining the signals. The output of the combiner 7 is input to an amplifier 8 and amplified, and then input to a variable attenuator 9. The variable attenuator is composed of a pin diode, etc., and the attenuation 1 is changed by the output level control' quasi-pressure from the terminal 7-21, and the level control of the modulated wave is performed on the QPS. The signal is input to a low-pass filter 11 to reduce high frequencies and reduce the modulator output return loss, and a QPSK modulated wave is output from a terminal 22.

(Problem to be solved by the invention) The QPSXF regulator used for satellite communication has a temperature change of 0 to 7.
±0.5 dl of output level fluctuation for 0 degree, ±0.5 dll of output level fluctuation for frequency change from 1400 to 1600 MHz, -15 dll when output level is stopped.
High stability such as 0 dB attenuation is required. Change from conventional QPS, i&! In the L-device 28, as unstable elements with respect to temperature, the temperature change of the phase modulation efficiency of DBMI, 2, v
Temperature change in oscillation output level of cos, each amplifier 8, lO
There are temperature changes in the gain of the variable attenuator 9, temperature changes in the amount of attenuation of the variable attenuator 9, etc. For this reason, in order to keep the QPSK modulator 28 within ±0.5 dB due to temperature changes, it is necessary to suppress the fluctuation of each g:element to within ±0.1 dll, and strict temperature control and There was a problem in that a large-scale temperature compensation circuit and the like were required. For example, in the variable attenuator 9 without a temperature compensation circuit using a vinyl diode or the like, approximately ±1 dB
It is difficult to suppress the fluctuations below, and the amplifier 8.
Even in lO, it is extremely difficult to suppress fluctuations to less than ±0, 1 dB. In addition, in the conventional QPS, the frequency characteristics of the oscillation output level of the VCO 5, the gain frequency characteristics of the valley amplifier 8 and IO, and the frequency characteristics of the attenuation amount of the variable attenuator 9 are included as unstable factors in the output level with respect to frequency changes of the modulator 28. etc. For this purpose, the frequency fluctuation of the QPSK modulator 28 is reduced to ±0.
．． To keep it below 5dB, change the fluctuation of each element to ±O, ldB.
The problem was that it was extremely difficult to do so. Furthermore, -50d when the output level stops
l1M is determined by the isolation performance of the high-frequency switch circuit when it is off, and the operating frequency is 1400~
In order to obtain an isolation of 50 dl1 or more at a high frequency of 1600 MHz, it is necessary to connect diodes with excellent high frequency characteristics in multiple stages, which poses a problem of high cost.

The purpose of the present invention is to solve the problems in the conventional QPSK converter:
In addition to keeping the output level stable against changes over time, the frequency characteristics are also stabilized, and the 50d
The object of the present invention is to provide a phase modulator that can obtain a large attenuation of B or more.

(Means for Solving the Problems) In order to achieve the above object, the phase modulator according to the present invention connects a high frequency amplifier and a variable attenuator in series, and detects the output of this series circuit with a detection circuit. The detected output and the reference level control voltage are input to an automatic level control circuit, and the output of the automatic level control circuit controls the amount of attenuation of the variable voltage generator. The automatic level control circuit is provided with a switch means for controlling the supply of drive power input to the automatic level control circuit, and is configured to largely switch the output level by controlling the switch means.

(Function) The output of the series circuit of the high frequency amplifier and the variable attenuator is detected by the detection circuit, this detection output and the standard level control voltage are input to the automatic level control circuit, and the difference between the detection output and the level control voltage is A signal corresponding to the output voltage is output from the automatic level control circuit and inputted to the variable attenuator to control the amount of attenuation, and the output level can be kept constant despite changes in temperature, changes over time, and changes in frequency. In addition, since the drive power supplied to the high frequency amplifier and automatic level control circuit is stopped by the switch means, the operation of the high frequency amplifier is stopped and the amount of attenuation of the variable attenuator increases, resulting in a large attenuation of the output level and the overall It can reduce the noise by more than 50dB,
Output can be stopped.

(Description of Examples) Examples of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a block circuit diagram of one embodiment of the phase modulator of the present invention, and FIG. 2 is a block circuit diagram of an embodiment of the phase modulator of the present invention.
This is a physical circuit diagram. Note that in FIGS. 1 and 2, circuits that are the same as those in FIGS. 3 and 41 are marked with the same numerals as "1" and redundant explanations will be omitted.

In Figure 1, 12 is a detection circuit, 13 is a voltage comparison circuit, 6
1 divider 14 is a DC switch circuit. amplifier 1
A part of the zero output is taken out and input to the detection circuit 12, which converts the output signal level into a DC voltage. The detection output of this detection circuit 12 corresponds to the QPS modulator output level, and fluctuations in the QPSK modulator output level can be detected as fluctuations in the detection output. This detection output is input to the voltage comparator/integrator 13, and the voltage is compared with the output level iDI+control voltage (LEVELCONT) from Q:f-21, and the difference is amplified and divided by 81 to variable attenuation P! ! Give feedback to 9. As a result, an automatic level control circuit based on the output level control voltage is constructed. Here, a detailed circuit example of the variable attenuator 9 and the voltage comparison/integration 13 is shown in FIG. Variable attenuator 9 is resistor R1
It consists of ~R5 and pin diodes DI~D3, etc., and also voltage comparison and integration? +13 is a circuit consisting of an operational amplifier OP, a Zener diode D4 as a reference voltage source, a thermistor TH for temperature compensation, etc., and operates only with a positive voltage source (10B). For example, if the output level control voltage is +IO
When the QPSK modulator output level is OdLlm, the detection output VD and the comparison voltage VC applied to the operational amplifier OP by the reference voltage VR, resistors R8 to R11 and thermistor TH are matched, and the output level control voltage is set to Ov. At times, the QPS is set so that the detection output VD with a modulator output level of -10 dBm and the comparison voltage VC match. Note that the resistor R12 and the Ri3° capacitor CI are elements that determine the sensitivity and time constant of voltage comparison by the operational amplifier OP. The degree of amplification of the operational amplifier OP in direct current is set very high, and its output is fed back to the variable attenuator 9 through the resistor R14. When the pin diode DI is turned off by the output signal of the operational amplifier OP fed back to the variable attenuator 9, the pin diode D
2. A forward current determined by resistors R2 to R5 flows through D3, and the equivalent resistance of pin diode D2゜D3 is approximately 50.
Set it so that it is Ω. In this state, the variable attenuator 9 can obtain the maximum gQfft, and the turnout return loss is 20
dB or more.

Also, when a forward current flows through the pin diode DI due to feedback No. 15 and turns on the pin diode DI, the pin diode o2. o+t also flows a smaller forward current than in the above case, and after the equivalent resistance of the pin diode DI is 10Ω, the pin diodes D2 and D3
Set the equivalent resistance of approximately several hundred Ω. In this state, the beam range aP59 forms a π-type attenuator, and the amount of the range a becomes the minimum, and the return loss of the crowd also becomes 20 dB or more. In this manner, the automatic level control circuit controls the g position of the variable attenuator 9 to obtain a constant output level. In particular, high stability against changes over time and frequency changes can be obtained. Also,
Thermistor T
Since the automatic level control circuit is configured to perform temperature correction at H, temperature compensation of the QPSK modulator output level can be easily achieved with a simple configuration. Note that temperature changes in the input offset voltage of the operational amplifier OP, temperature changes in the reference voltage of the diode D4, and temperature changes in each resistance value are very small, so there is no need for temperature compensation, and the thermistor TH can suffice for temperature compensation.

Next, output level stop control will be explained. The output stop control voltage (MUTE) is input from the terminal 20 to the switch circuit 14, and the switch circuit 14 is turned off and the amplifier 8. lO
And the supply of drive power to the voltage comparator/integrator I3 is stopped. As a result, amplifier 8,t.

and variable 04. The operation of the display unit 9 is stopped and output stop control is performed. The switch circuit 14 is composed of transistors Trl and Tr2 as shown in FIG.
The transistor Trl is turned on by the output stop control voltage from the transistor Tr1, the transistor Tr2 is turned off, and the supply of drive power is stopped F. As described above, since output stop control can be performed using the switch circuit 14 constituted by a DC circuit, the problem of isolation when output is stopped can be solved. Incidentally, if the driving power supply for the amplifiers 8 and 10 is simply stopped, the automatic level control circuit operates and the variable attenuator 9 is in the minimum attenuation state, and the output level can only be reduced slightly.
In the present invention, since the operation of the operational amplifier OP of the voltage comparator/integrator 13 is stopped and the variable attenuator 9 is set to the maximum attenuation amount, it is possible to increase the total attenuation of the amplifiers 8 and 10 and the variable attenuator 19. It is possible to attenuate the output level by more than 50 d[lF.

(Effects of the Invention) As explained above, according to the phase modulator of the present invention, the output level is controlled by the automatic level control circuit.
The BM is similar to the conventional example in response to temperature changes and frequency changes.
The automatic level control circuit can absorb output level fluctuations caused by the , VCO1 amplifiers and variable attenuators, eliminating the need for temperature compensation for each of these circuits. Temperature compensation can be performed using a thermistor for only the temperature characteristics of the DC conversion in the detection circuit. The output level can be easily stabilized with a simple configuration.

In addition, output stop control is performed by stopping the operation of the amplifier and variable attenuator to attenuate the output level, making it easier to obtain sufficient isolation and requiring less complicated It has an excellent effect of being able to be designed without having to consider high frequency characteristics.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram of one embodiment of the phase modulator of the present invention, FIG. 2 is a specific circuit diagram of the main part of FIG. 1, and FIG. FIG. 4 is a block circuit diagram of a modulator, and FIG. 4 is a block circuit diagram schematically showing a conventional Q P S Kf31 device and an up-converter. 1.2 = double balanced mixer, 3 splitter, 4: Huffer amplifier, 5: voltage controlled oscillator, 6: fixed frequency divider, 7: combiner, 8.1
0: Amplifier, 9: Variable attenuator, 11: Attenuator low-pass filter, 12: Detection circuit, 13
: Voltage comparator/integrator, 14: Switch circuit. lto1ma

Claims (1)

[Claims] A high frequency amplifier and a variable attenuator are connected in series, and the detection output obtained by detecting the output of this series circuit with a detection circuit and a reference level control voltage are input to an automatic level control circuit, and this automatic level control is performed. A switch means is provided for controlling the amount of attenuation of the variable attenuator by the output of the circuit, and further for controlling the supply of drive power input to the high frequency amplifier and the automatic level control circuit, and the output level is controlled by the control of the switch means. A phase modulator characterized by large switching.