JPS62188802U - - Google Patents

Info

Publication number
JPS62188802U
JPS62188802U JP7713786U JP7713786U JPS62188802U JP S62188802 U JPS62188802 U JP S62188802U JP 7713786 U JP7713786 U JP 7713786U JP 7713786 U JP7713786 U JP 7713786U JP S62188802 U JPS62188802 U JP S62188802U
Authority
JP
Japan
Prior art keywords
microstrip
slot line
short
main surface
circuited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7713786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7713786U priority Critical patent/JPS62188802U/ja
Publication of JPS62188802U publication Critical patent/JPS62188802U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第5図は本考案の各実施例を示す図、
第6図は本考案を適用したバランス型ミキサの構
成例を示す図、第7図〜第9図は従来技術を示す
図である。 主要部分の符号の説明、1……マイクロストリ
ツプ線路、2……スロツト線路、S……誘電体基
板、C……交点、F〜F,FM,FS……フ
イルタ。
1 to 5 are diagrams showing each embodiment of the present invention,
FIG. 6 is a diagram showing a configuration example of a balanced mixer to which the present invention is applied, and FIGS. 7 to 9 are diagrams showing the prior art. Explanation of symbols of main parts: 1...Microstrip line, 2...Slot line, S...Dielectric substrate, C...Intersection, F1 to F8 , FM, FS...Filter.

Claims (1)

【実用新案登録請求の範囲】 (1) 誘電体基板の一主表面に形成され一端が開
放(若しくは短絡)されたマイクロストリツプ線
路と、前記誘電体基板の他主表面の所定箇所にて
前記マイクロストリツプ線路と直交するようにこ
の他主表面に形成され一端が短絡(若しくは開放
)されたスロツト線路とを有するマイクロストリ
ツプ/スロツト線路変換器であつて、これ等両線
路の交点とこれ等各線路の前記一端との間にフイ
ルタを夫々挿入してなることを特徴とするマイク
ロストリツプ/スロツト線路変換器。 (2) 前記両線路の交点から前記フイルタをみた
ある周波数に対するインピーダンスが、前記マイ
クロストリツプ線路では短絡状態となり、かつ前
記スロツト線路では開放状態となるように構成さ
れていることを特徴とする実用新案登録請求の範
囲第1項のマイクロストリツプ/スロツト線路変
換器。
[Claims for Utility Model Registration] (1) A microstrip line formed on one main surface of a dielectric substrate with one end open (or short-circuited) and a predetermined location on the other main surface of the dielectric substrate. The microstrip/slot line converter has a slot line formed on the main surface so as to be orthogonal to the microstrip line, and one end of which is short-circuited (or open). A microstrip/slot line converter characterized in that filters are inserted between the intersection point and the one end of each of these lines. (2) The filter is characterized in that the impedance for a certain frequency viewed from the intersection of both lines is such that the microstrip line is in a short-circuited state, and the slot line is in an open state. A microstrip/slot line converter according to claim 1 of the utility model registration claim.
JP7713786U 1986-05-22 1986-05-22 Pending JPS62188802U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7713786U JPS62188802U (en) 1986-05-22 1986-05-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7713786U JPS62188802U (en) 1986-05-22 1986-05-22

Publications (1)

Publication Number Publication Date
JPS62188802U true JPS62188802U (en) 1987-12-01

Family

ID=30924861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7713786U Pending JPS62188802U (en) 1986-05-22 1986-05-22

Country Status (1)

Country Link
JP (1) JPS62188802U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005101651A1 (en) * 2004-04-12 2005-10-27 Murata Manufacturing Co., Ltd. High frequency active device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005101651A1 (en) * 2004-04-12 2005-10-27 Murata Manufacturing Co., Ltd. High frequency active device

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