JPS62187278A - Detecting circuit for light shield quantity - Google Patents
Detecting circuit for light shield quantityInfo
- Publication number
- JPS62187278A JPS62187278A JP61030038A JP3003886A JPS62187278A JP S62187278 A JPS62187278 A JP S62187278A JP 61030038 A JP61030038 A JP 61030038A JP 3003886 A JP3003886 A JP 3003886A JP S62187278 A JPS62187278 A JP S62187278A
- Authority
- JP
- Japan
- Prior art keywords
- light
- circuit
- output
- photodetectors
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 230000035945 sensitivity Effects 0.000 abstract description 3
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Landscapes
- Geophysics And Detection Of Objects (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、光の遮光によって物体の有無を検知する検出
回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a detection circuit that detects the presence or absence of an object by blocking light.
従来、この種の光検出回路の受光器の感度の誤差は、そ
れぞれの増幅器の利得を半固定抵抗などによって可変と
する事によって補正を行っていた。Conventionally, errors in the sensitivity of the photodetector of this type of photodetector circuit have been corrected by making the gain of each amplifier variable using a semi-fixed resistor or the like.
しかしながら、経年変化、光源の劣化、および機械的振
動による光源と受光器との対向のズレなどによシ補正の
狂いが生じ易いという問題があった。However, there is a problem in that the correction tends to be incorrect due to changes over time, deterioration of the light source, and misalignment of the light source and light receiver due to mechanical vibration.
従って本発明の目的は、受光器の感度の誤差tリアルタ
イムで補正することのできる遮光量回路を提供すること
にある。Therefore, an object of the present invention is to provide a light shielding amount circuit that can correct the sensitivity error t of a light receiver in real time.
本発明によれば、興射光量を検出する複数の受光器と、
この受光器から一つの受光器の信号を選ぶアナログスイ
ッチと、受光器のアナログ信号をデジタル信号に変換す
るA/Dコンバーターと、補正用のデータを格納するメ
モリーと、メモリーの値と読み取った実際の値とで演算
を行い出力を得る演算回路と、それぞれの受光器に光を
与える光源と、光源に電圧を印加する電源と、各部のタ
イミングを制御するクロック制御回路とを備えることt
特徴とする遮光量検出回路が得られる。According to the present invention, a plurality of light receivers detecting the amount of emitted light;
An analog switch that selects the signal of one of the receivers, an A/D converter that converts the analog signal of the receiver into a digital signal, a memory that stores correction data, and an actual value that is read from the memory value. A calculation circuit that performs calculations with the value of and obtains an output, a light source that provides light to each light receiver, a power source that applies voltage to the light source, and a clock control circuit that controls the timing of each part.
A characteristic light shielding amount detection circuit is obtained.
すなわち、本発明は、遮光しない状態でのそれぞれの受
光器の出力で実際に遮光した時の出力の除算を行い出力
レベルの誤差を取シ除くことt−特徴とする。That is, the present invention is characterized in that the output when the light is actually shielded is divided by the output of each photoreceiver when the light is not shielded, thereby eliminating errors in the output level.
次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.
本発明の一実施例のブロック図である第1図を参照する
と光源部1の光源1は受光部2の受光器1に光音照射す
る。同様に光源2は受光器2に光源Nは受光器Nにそれ
ぞれ光を照射する。受光部2は照射された光量に従った
アナログ出力をアナログスイッチ3に与える。アナログ
スイッチ3はクロック制御回路7からのアドレス信号1
03に従って受光部2のN個の受光器の出力から1つを
選択しA/Dコンバータ4に出力101を供給する。Referring to FIG. 1, which is a block diagram of an embodiment of the present invention, a light source 1 of a light source section 1 irradiates light sound onto a light receiver 1 of a light receiving section 2. As shown in FIG. Similarly, the light source 2 irradiates light to the light receiver 2, and the light source N irradiates light to the light receiver N, respectively. The light receiving section 2 provides an analog output to the analog switch 3 according to the amount of irradiated light. Analog switch 3 receives address signal 1 from clock control circuit 7
03, one of the outputs of the N light receivers of the light receiving section 2 is selected and the output 101 is supplied to the A/D converter 4.
A/Dコンバータ4は供給されたアナログデータ101
をデジタルデータ102に変換し、メモリー回路5と演
算回路6とに供給する。メモリー回路5はクロック制御
回路7のアドレス信号103で示されるアドレスにA/
Dコンバータ4の出力102の情報をクロック制御回路
7からの書込タイミングパルス104によって書込む。The A/D converter 4 receives the supplied analog data 101
is converted into digital data 102 and supplied to the memory circuit 5 and the arithmetic circuit 6. The memory circuit 5 outputs A/A to the address indicated by the address signal 103 of the clock control circuit 7.
Information on the output 102 of the D converter 4 is written using a write timing pulse 104 from the clock control circuit 7.
A/D:yンパータ4は書込時以外線アドレス信号10
3で示されるアドレスのデータを出力し補正用データと
して演算回路6 VC与える。演算回路6はA/Dコン
バータ4の出力102とメモリー回路5の出力データ1
05とで所定の演算、(102/105)xG(G=一
定)を行い、その結果を出力データ106として出力す
る。電源8は通常は読取動作に必要な光賦金得るに相当
する電圧を光源部1に供給しているが、クロック制御回
路7からの電源制御信号107によって通常時のl/1
0の光量を得るに相当する電圧忙光源部2に供給する。A/D:y parameter 4 is line address signal 10 except during writing.
The data at the address indicated by 3 is output and given to the arithmetic circuit 6 VC as correction data. The arithmetic circuit 6 receives the output 102 of the A/D converter 4 and the output data 1 of the memory circuit 5.
05 performs a predetermined calculation, (102/105) x G (G=constant), and outputs the result as output data 106. The power supply 8 normally supplies the light source unit 1 with a voltage equivalent to obtaining the optical charge necessary for the reading operation, but the power supply control signal 107 from the clock control circuit 7 reduces the voltage to 1/1 during normal operation.
A voltage corresponding to obtaining a light amount of 0 is supplied to the light source section 2.
第2図は第1囚の動作を示″′t、lt1イミング図で
ある。第1図のブロック図に電源が供給されると、クロ
ック制御回路7よシミ源制御信号107が電源8に与え
られ光源部1に通常読取時のl/10の光量に相当する
電圧が供給される。次に第2図に示すようにクロック制
御回路7よシアナログスイッチ3とメモリー回路5に対
して受光器lを示すアドレス信号103が与えられる。FIG. 2 is a timing diagram showing the operation of the first prisoner. When power is supplied to the block diagram of FIG. A voltage corresponding to the light intensity of 1/10 during normal reading is supplied to the light source section 1. Next, as shown in FIG. An address signal 103 indicating l is applied.
アナログスイッチ3はA/Dコンバータ4に対して受光
器1のアナログ出力を与える。A/Dコンバータ4は受
光器1の出力をデジタルデータに変換しメモリー回路5
に与える。アドレス信号103とA/Dコンバータ4の
出力102が安定後クロック制御回路はメモリー回路5
に対して書込信号104を与え通常読取時の1/10の
光量の時の受光器1の出力データを書き込む。Analog switch 3 provides an analog output of light receiver 1 to A/D converter 4 . The A/D converter 4 converts the output of the light receiver 1 into digital data and sends it to the memory circuit 5.
give to After the address signal 103 and the output 102 of the A/D converter 4 are stabilized, the clock control circuit is transferred to the memory circuit 5.
A write signal 104 is applied to the light receiver 1 to write the output data of the light receiver 1 when the light intensity is 1/10 of that of normal reading.
次にクロック制御回路7よシ受光器2を示すアドレス信
号103がアナログスイッチ3とメモリー回路5に与え
られ前記と同様にして受光器2の通常読取時の1/10
の光量の時の出力データをメモリー回路5に書込む。以
下同様にして受光器Nまでの通常読取時の1710の光
量の時の出力データをメモリー回路5に書込む。Next, the clock control circuit 7 gives the address signal 103 indicating the photoreceiver 2 to the analog switch 3 and the memory circuit 5, and in the same manner as described above, the address signal 103 indicating the photoreceiver 2 is 1/10 of the normal reading time of the photoreceiver 2.
The output data at the time of the light intensity is written into the memory circuit 5. Thereafter, in the same manner, output data at a light intensity of 1710 during normal reading up to the light receiver N is written into the memory circuit 5.
次に通常読取動作に いる為にクロック制御回°路7よ
シミ源8に与えていたML源制御・18号107を断に
して電源8から光源部1に対して通常読取時の光量に相
当する電圧を供給する。次にメモリー書込時と同様にク
ロック制御口yI&7かもアナログスイッチ3とメそリ
ー回路5にアドレス信号103を与えるアナログスイッ
チ3に選ばれた受光器の出力はA/Dコンバータ4によ
ってデジタル信号102に変換され演算回j166に与
えられる。Next, in order to enter the normal reading operation, the clock control circuit 7 turned off the ML source control No. 18 107 that was being applied to the stain source 8, and the power supply 8 sent the light source 1 to the light amount equivalent to the amount of light during normal reading. supply voltage. Next, in the same way as when writing to the memory, the clock control port yI & 7 gives an address signal 103 to the analog switch 3 and memory circuit 5.The output of the light receiver selected as the analog switch 3 is converted into a digital signal 102 by the A/D converter 4. It is converted into and given to the calculation circuit j166.
メモリー回路5はあらかじめ記憶された通常読取時の1
/10の光量の時の受光器の出力データ演算回路の補正
値入力データ105として与える。The memory circuit 5 has a pre-stored value 1 for normal reading.
It is given as correction value input data 105 to the output data calculation circuit of the light receiver when the light intensity is /10.
次に演算回路6は与えられた信号102と信号105の
2つのデータから(信号102/信号105)xu(G
は利得で一定値ンの演算を行い、出力データ106とし
て外部装置に与える。Next, the arithmetic circuit 6 calculates (signal 102/signal 105) xu(G
calculates a constant value n with gain and provides it to an external device as output data 106.
以上説明した様にあらかじめ受光器毎のパンツキを1/
10の光量を与えてメモリー回路に記憶しておき実際の
測定時に入力データとメモリーデータの演算を行い、リ
アルタイムでバラツキを補正したデータが得られる。As explained above, the pan-skip for each receiver is set to 1/1 in advance.
A light intensity of 10 is given and stored in a memory circuit, and the input data and memory data are calculated during actual measurement to obtain data with variations corrected in real time.
第3図は本実施例の効果を示した図である。第3図(a
)は非遮光時光量1/10の時の受光器1−3の出力で
メモリーに記憶しておく。第3図(b)は非遮光時、通
常読取時の受光器1−3の演算前出力であシ受光器によ
ってバラツキがあるのが見られる。第3図(C)は演算
後の出力であシバラツキは補正されている。FIG. 3 is a diagram showing the effect of this embodiment. Figure 3 (a
) is the output of the light receiver 1-3 when the light intensity is 1/10 when not shaded and is stored in the memory. FIG. 3(b) shows the output before calculation of the light receiver 1-3 during normal reading when light is not shielded, and it can be seen that there are variations depending on the light receiver. FIG. 3(C) shows the output after calculation, and the variations have been corrected.
この様に、受光器の出力レベルの変動がリアルタイムで
補正される為光源と受光器の間に遮光量を測定したい媒
体を挿入すれば誤差の少い測定データが得られる。In this way, fluctuations in the output level of the light receiver are corrected in real time, so by inserting a medium whose amount of light shielding is to be measured between the light source and the light receiver, measurement data with little error can be obtained.
本発明は以上説明した様に、あらかじめ受光器毎の出力
誤差を記憶し、実際の測定時の入力データと演算を行う
事によシ誤差の少いデータを得る効果がある。As explained above, the present invention has the effect of obtaining data with less error by storing the output error of each light receiver in advance and performing calculations with the input data during actual measurement.
第1図は本発明の一実施例のブロック図、第2図はこの
ブロック図の動作を示すタイミングチャート、第3図は
受光器の出カケ示す図である。
1・・・・・・光源部、2・・・−・・受光部、3・・
・・・・アナログスイッチ回路、4・・・・・・A/D
変換器、5・−・・・・メモリー回路、6・・・・・・
演算回路、7・・・・・・クロック制御回路、8・・・
・・・光源用電源。
(6乙)(bン
笥3図
/ z 3
A0FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of this block diagram, and FIG. 3 is a diagram showing the output of the light receiver. 1...Light source section, 2...--Light receiving section, 3...
...Analog switch circuit, 4...A/D
Converter, 5...Memory circuit, 6...
Arithmetic circuit, 7... Clock control circuit, 8...
...Power supply for light source. (6 Otsu) (bunsha 3 figure/z 3 A0
Claims (1)
から一つの受光器の信号を選ぶアナログスイッチと、前
記受光器のアナログ信号をデジタル信号に変換するA/
Dコンバータと、補正用のデータを格納するメモリーと
、前記メモリーの値と読み取った実際の値とで演算を行
い出力を得る演算回路と、前記受光器のすべてに光を与
える光源と、前記光源に電圧を印加する電源と、各部の
タイミングを制御するクロック制御回路とを具備するこ
とを特徴とする遮光量検出回路。a plurality of light receivers that detect the amount of irradiated light; an analog switch that selects a signal from one of the light receivers; and an analog switch that converts the analog signal of the light receiver into a digital signal.
a D converter, a memory that stores correction data, an arithmetic circuit that performs arithmetic operations on the memory value and the read actual value and obtains an output, a light source that provides light to all of the light receivers, and the light source. What is claimed is: 1. A light shielding amount detection circuit comprising: a power source that applies a voltage to the circuit; and a clock control circuit that controls the timing of each part.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61030038A JPS62187278A (en) | 1986-02-13 | 1986-02-13 | Detecting circuit for light shield quantity |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61030038A JPS62187278A (en) | 1986-02-13 | 1986-02-13 | Detecting circuit for light shield quantity |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62187278A true JPS62187278A (en) | 1987-08-15 |
Family
ID=12292653
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61030038A Pending JPS62187278A (en) | 1986-02-13 | 1986-02-13 | Detecting circuit for light shield quantity |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62187278A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0381689A (en) * | 1989-08-24 | 1991-04-08 | Oki Electric Ind Co Ltd | Medium detecting device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5850487A (en) * | 1981-09-21 | 1983-03-24 | Brother Ind Ltd | Detecting device for substance to be detected |
JPS5875084A (en) * | 1981-10-30 | 1983-05-06 | Fujitsu Ltd | Optical detection system |
JPS6054986B2 (en) * | 1980-01-24 | 1985-12-03 | 松下電工株式会社 | Phenol resin molding material |
-
1986
- 1986-02-13 JP JP61030038A patent/JPS62187278A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6054986B2 (en) * | 1980-01-24 | 1985-12-03 | 松下電工株式会社 | Phenol resin molding material |
JPS5850487A (en) * | 1981-09-21 | 1983-03-24 | Brother Ind Ltd | Detecting device for substance to be detected |
JPS5875084A (en) * | 1981-10-30 | 1983-05-06 | Fujitsu Ltd | Optical detection system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0381689A (en) * | 1989-08-24 | 1991-04-08 | Oki Electric Ind Co Ltd | Medium detecting device |
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