JPS62183234U - - Google Patents
Info
- Publication number
- JPS62183234U JPS62183234U JP6893386U JP6893386U JPS62183234U JP S62183234 U JPS62183234 U JP S62183234U JP 6893386 U JP6893386 U JP 6893386U JP 6893386 U JP6893386 U JP 6893386U JP S62183234 U JPS62183234 U JP S62183234U
- Authority
- JP
- Japan
- Prior art keywords
- sub
- bus
- connector
- circuit board
- electronic circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Combinations Of Printed Boards (AREA)
Description
第1図はこの考案の1実施例のバスライン装置
を模式的に示した図、第2図は基板を水平にマザ
ーボードに実装している場合の側面図、第3図は
第2図の―矢視拡大図、第4図は従来例を模
式的に示した図である。
1……主電子回路基板、4a〜4d……バスラ
イン、5a,5b……バスドライバ、6a,6b
……バスレシーバ、7……スイツチ、11……副
電子回路基板、12……主コネクタ、12a〜1
2d……主コネクタの端子、13……副コネクタ
、13a〜13h……副コネクタの端子。
Fig. 1 is a diagram schematically showing a bus line device according to one embodiment of this invention, Fig. 2 is a side view when the board is mounted horizontally on the motherboard, and Fig. 3 is the same as Fig. 2. FIG. 4, an enlarged view in the direction of arrows, is a diagram schematically showing a conventional example. 1... Main electronic circuit board, 4a to 4d... Bus line, 5a, 5b... Bus driver, 6a, 6b
... Bus receiver, 7 ... Switch, 11 ... Sub-electronic circuit board, 12 ... Main connector, 12a-1
2d...Terminal of main connector, 13...Sub connector, 13a to 13h...Terminal of sub connector.
Claims (1)
クタとを有するマザーボードと、いずれかのバス
ラインと主コネクタのいずれかの端子との間を電
気的に開閉するバスドライバと、他のバスライン
と主コネクタの他の端子との間を電気的に開閉す
るバスレシーバと、上記バスドライバとバスレシ
ーバとを制御するスイツチとを具備するバスライ
ン装置において、 上記バスドライバと、バスレシーバと、スイツ
チとを副電子回路基板に実装して、この副電子回
路基板を上記マザーボードに取付けた副コネクタ
に挿抜するようにし、上記バスラインと副電子回
路基板との間、前記主コネクタの端子と副電子回
路基板との間を、上記副コネクタの端子を介して
接続したことを特徴とするバスライン装置。[Claim for Utility Model Registration] A motherboard that has a bus line and a main connector for inserting and removing the main electronic circuit board, and a bus driver that electrically opens and closes between any bus line and any terminal of the main connector. , a bus receiver that electrically opens and closes between another bus line and another terminal of the main connector, and a switch that controls the bus driver and the bus receiver, the bus line device comprising: , a bus receiver, and a switch are mounted on a sub-electronic circuit board, and the sub-electronic circuit board is inserted into and removed from a sub-connector attached to the motherboard, and between the bus line and the sub-electronic circuit board, the main A bus line device characterized in that a terminal of the connector and a sub-electronic circuit board are connected via the terminal of the sub-connector.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6893386U JPS62183234U (en) | 1986-05-08 | 1986-05-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6893386U JPS62183234U (en) | 1986-05-08 | 1986-05-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62183234U true JPS62183234U (en) | 1987-11-20 |
Family
ID=30909202
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6893386U Pending JPS62183234U (en) | 1986-05-08 | 1986-05-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62183234U (en) |
-
1986
- 1986-05-08 JP JP6893386U patent/JPS62183234U/ja active Pending
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