JPS6218171A - Method and circuit for processing picture - Google Patents

Abstract

PURPOSE:To distinguish a region such as picture region requiring contrast expression from a region important for resolution in an excellent way by discriminating automatically a black level and setting a parameter to an optimum value. CONSTITUTION:Picture information read from an original is processed sequentially while being written in picture memories 1, 2 depending on the position of switches 9, 10. One block picture information is transferred from a memory 1 to a block memory 3 and a picture element having a maximum level and that of minimum level are discriminated from the content by a region deciding circuit 5. The difference is compared with a reference value P outputted from a latch circuit 12 to discriminate whether binarization is applied depending on the dither threshold value or a prescribed threshold value. A switching circuit 8 selects either an organic dither threshold value memory 6 or a prescribed threshold value memory 7 as the threshold value for binarization based on the result of the decision of the deciding circuit 5. The binarization circuit 4 compares either threshold value data in the memories 6, 7 with the density level of each picture element in the memory 3 and outputs the result of comparison as a binary signal.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical field to which the invention pertains) The present invention distinguishes between images that require shading expression such as photographs and images that require resolution such as character figures,
Alternatively, the present invention relates to a method and apparatus for converting signals so as to provide good image quality.

(Prior Art) In image areas that require gradation expression, such as photographs, there is little change in density between adjacent pixels. On the other hand, in the case of characters, etc., a large density change occurs at the black-white boundary.

Previously, Japanese Patent Application No. 1983-102057 or IBM T
electricalDisclosure Bullet
in Vol, 19. &9. There are methods to identify individual areas from an image containing a mixture of photographs and text and perform binarization processing suitable for each area, but all of them utilize the magnitude of density changes between adjacent pixels. (identification and processing).

This method gives very good results when the density contrast of the original is large, but if the density contrast of the original is low, good discrimination is not performed).

This is because the change in density is small even at the black-and-white border of the text area, so it cannot be distinguished from areas such as photographs.

As a result, characters and figures with low contrast are processed in the same way as the grayscale image areas, resulting in poor image quality.

(Objective of the Invention) In order to eliminate these drawbacks, the present invention automatically detects the white level and black level on the document, and sets image processing parameters to optimal values based on the automatically detected black and white levels. It is something to do.

Another object of the present invention is to provide a binarization processing method that can satisfactorily express photographic images that require shading and text and graphics that require high resolution.

(Structure of the Invention) The present invention is an application of the present invention to the method described in Japanese Patent Application No. 56-102057.

In the example shown in Figure 1, an image is divided into 4 x 4 blocks of 16 pixels, the maximum and minimum values of the image signal level are determined for each block, and the value of the difference between these maximum and minimum values is calculated. When the value of D is larger than the reference value P, the density difference in this block is large, so binarization processing is performed using a fixed threshold value to improve the resolution, and when the value of D is smaller than P, the threshold value is set depending on the pixel position so that gradation can be expressed. 2 by varying the dithering method.
Switch the threshold value and use it to convert it into a value.

When the present invention is applied, the value of P and the dither threshold value are changed depending on the content of the image signal, and the drawings will be described below.

(Embodiment) FIG. 1 is a circuit diagram of an embodiment showing the configuration of the present invention, and is a block diagram showing an example of a halftone processing circuit.

In the figure, 1 and 2 are image memories, 3 is a block memory, 4 is a binarization circuit, 5 is a region determination circuit, 6 is a systematic dither threshold memory, 7 is a constant threshold memory, and 8 is a threshold memory switching circuit. , 9 and 10 are switches. Reference numerals 12 and 13 indicate latch circuits that output parameter values for halftone processing, which are set to appropriate initial values at the beginning of one screen.

First, when the switches 9 and 10 are in the positions shown in the figure, image information read from a document is stored in the image memory 1 via the a side of the switch 9.

When image information corresponding to 4 scanning lines is stored when one block is composed of 16 pixels of 4 x 4, switch 9 is turned on.
switches from the a side to the b side, and the switch 10 switches from the b side to the a side, writing image information into the image memory 2 and simultaneously processing the contents of the image memory 1 sequentially.

Regarding the contents of the image memory 1, image information corresponding to one block is first transferred to the block memory 3.

Next, based on the contents of the block memory 3, the area determination circuit 5 identifies which pixels in the block have the highest and lowest density levels, and compares the difference with the value P output from the launch circuit 12. Then, it is determined whether to perform binarization using a dither threshold value or a fixed amount value.

The switching circuit 8 selects either the systematic dither threshold value memory 6 or the fixed amount value memory 7 as the binarization threshold value based on the determination result of the area determination circuit 5.

The binarization circuit 4 compares the threshold data in either the threshold memory 6 or 7 selected in this manner with the density level of each pixel in the block memory 3, and assigns a binary code to the comparison result. Output as .

FIG. 2 shows an example of threshold values for binarization processing, in which (a) is a dither threshold value and (b) is a fixed amount value.

In this case, the threshold matrix memory 6 stores a plurality of threshold matrices as shown in FIG. One of them is selected and input to the switching circuit 8.

The fixed amount value memory 7 stores a plurality of types of fixed threshold values as shown in FIG. 2(b), and one of these is selected by the output of the fixed amount value latch circuit 15. Input to the switching circuit.

Thereafter, the contents of the image memory 1 are sequentially processed block by block. During this process, the parameter detection circuit 11 detects the maximum value and minimum value from among the image signals for four scanning lines stored in the image memory 1. Perform the action required.

When all the contents of image memory 1 have been processed and image information corresponding to the next four scanning lines has been stored in image memory 2, switch 17 is activated.
switches from the b side to the a side, and the switch 10 switches from the a side to the b side. At this time, the parameter determination circuit 11 determines the maximum and minimum values of the image signal based on the image signal in the image memory 1.

If we express the white level as a large value and the black level as a small value, these will be the values expected to be the white level and black level for processing the next image signal, respectively. Before determining the level, it is verified whether these can be used as the actual black level and white level.

These verification methods will be described in detail later, but when it is verified that these values are appropriate to be used as new parameters, they are latched into the black level latch circuit 14 and the white level latch circuit 13, respectively, and are used as new parameters.

Also, a new constant threshold value is determined as the average of these values, and is latched into the constant threshold latch circuit 15, and the difference between these values, 172
is latched into the P latch circuit 12 as a new value of P. Subsequently, the image signals are sequentially binarized such that the contents of the image memory 2 are processed using new parameters.

Here, the fixed amount value does not necessarily have to be the average of the black level and the white level, and may be set to be slightly larger than the average value, that is, slightly white, so that characters etc. can be expressed darkly. Further, the value of P is appropriately set to around 1/2 of the difference between the white level and the black level, but it may be set to a slightly smaller value in order to better express the characters.

In addition, the level expected to be white or black was determined as the maximum value or minimum value, respectively, but it is not necessarily the maximum or minimum value, but a value close to the maximum value or close to the minimum value, and white or black, respectively. It is sufficient as long as it is effective when setting the black level.

FIG. 3 is a diagram showing the structure of another embodiment of the present invention, and is an example when the method of Japanese Patent Application No. 56-102057 is applied.

This means that the one-picture signal is input to the four-line memory 20 pixel-by-pixel sequentially, and simultaneously to the maximum value detection circuit 21 and the minimum value detection circuit 22.

Since four pixels belong to the same block for each scanning line, the maximum value memory 23 can store the maximum value of 174 pixels of a certain scanning line.

The maximum value detection circuit 21 receives the fourth (i-1)+j (i=1.
2. .......

j = 1 to 4) When the image signal is input, it is compared with the value of the i-th address of the maximum value memory 23, and if the image signal level is higher, the image signal level is set as the new memory value. Memory at the i-th address.

When processing is performed sequentially from the first scanning line to the fourth scanning line in this way, when the processing of the pixels of the j-th block of the fourth scanning line is completed, the maximum value memory 2
The maximum value of the image signal level of the pixels in the first block is stored at the first address of No. 3.

Similarly, the first address of the minimum value memory 24 contains the first
The minimum value of the image signal level within the block is stored.

Immediately, the area determination circuit 25 calculates the difference between these maximum and minimum values, compares this difference with the value of P output from the latch circuit 12, and determines whether the i-th block has a binary value at the dither threshold. It is determined whether the area to be binarized is an area to be binarized based on a certain value, and the result is stored in the image area memory 26 as a 1-bit signal.

Similarly, in the process of processing the fourth scanning line, the area information of each block is sequentially stored in the image area memory 26.

At the same time, the outputs of the maximum value memory 23 and minimum value memory 24 are input to the maximum value detection circuit 27 and minimum value detection circuit 28. The maximum value detection circuit 27 and the minimum value detection circuit 28 compare the input signal with the output of the memory 29 or 30, and input the larger value or the smaller value to the memory 29 or 30, respectively.

When all the inputs for the fourth scanning line are completed, the maximum and minimum values of the image signal levels of the four scanning lines are stored in the memory 29 and the memory 30, respectively.

These maximum and minimum values represent the expected level of white and black, respectively.

The parameter determination circuit 31 immediately determines the values of each parameter, that is, P, white level, black level, and constant value based on the maximum and minimum values of the memory 29 and memory 30, and applies the values to the latch circuits 12, 13, and 14, respectively. Latch to .15. The image signal stored in the 4-line memory is then compared with a threshold value output from the threshold value memory 32 by a comparator 33 and binarized.

That is, if the image signal level is closer to black than the threshold value, it is binarized as a black signal, and if it is closer to white, it is binarized as a white signal.

The threshold memory 32 stores a plurality of constant threshold values for binarization processing using a constant threshold value, and a plurality of dither threshold values for grayscale expression. The content of the constant threshold value is selected by the value output by the latch circuit engineer 5, and the content of the dither threshold value is selected by the white level and black level values output by the latch circuits 13 and 14.

Further, an address counter (not shown) selects which threshold value matrix to select depending on the position of each pixel.

After the image signal of the fourth scanning line is input, the image signal of the fifth scanning line is inputted, and the above process is repeated.

Note that when inputting the image signal of the fifth scanning line to the 4-line memory, the configuration is such that the image signal of the first scanning line stored in memory is input to the comparator 33 and stored after the binarization process is completed. .

Furthermore, in the above explanation, new parameters are determined using all the image information from the first scanning line to the fourth scanning line.
That's not necessarily necessary.

For example, if the maximum value detection circuit 27 and minimum value detection circuit 28 are operated during the input of the third scanning line, the maximum value and the minimum value among the image signal levels of the first to third scanning lines will be detected at the end of the input of the third scanning line. Since the value can be determined, it is okay to determine each parameter based on this value.

In this case, the parameter determination circuit 31 only needs to obtain these parameters by the end of the input of the fourth scanning line.
The time equivalent to a scanning line can be used, and it is also possible to perform low-speed processing using an element such as a microprocessor.

FIG. 4 shows still another embodiment of the present invention, 41.4
2 is a comparator; 43 and 44 are 4-line memories for storing binarized image signals; 45 is a dither threshold memory for storing dither threshold values; 46 is for storing one of the image signals output from the 4-line memories 43 and 44; The selector 47 is a level detection circuit that operates similarly to the maximum value detection circuit 27 and minimum value detection circuit 28 in FIG.

To operate this, the image signal is input to the maximum value detection circuit 21 and minimum value detection circuit 22, and the image signal is simultaneously input to the comparators 41 and 42 while determining the image area, as in the case of FIG.

The comparator 41 compares the image signal with a value representing a constant threshold value outputted from the latch circuit 15, converts it into a binary value, expresses the binary image signal as 111 II or It Ol#, and stores it in the 4-line memory 43. . The comparator 42 compares the image signal with the threshold in the dither threshold matrix of the dither threshold memory 45 selected by the output signal of the latch circuit 13.14, and converts the image signal into a binary value.
It is stored in the line memory 44.

Furthermore, at the same time, the image signal is input to the level detection circuit 47,
The level a expected to be white and the level b expected to be black are determined, and based on these, each parameter such as P, white level, black level, constant value, etc. is determined and the latch circuit 12 is executed for each predetermined scanning line. Latch to ~15.

When the input of the first to fourth scanning lines is completed, the image area memory 2
6 stores information on whether to binarize each block using a fixed threshold or a dither threshold. Based on this, the selector 46 selects the 4-line memory 43.
and one of the four line memories 44 is selected and output.

After the image signal of the fourth scanning line is input, the image signal of the fifth scanning line is inputted, so the above processing is repeated.

When inputting the image signal of the fifth scanning line to the 4-line memory 43, 44, the points to be performed after the image signal of the first scanning line previously stored in the memory are output to the selector 46 are as follows. This is the same as explained in FIG.

Next, a method for determining parameters will be specifically explained.

FIG. 5 shows the level detection circuit 47 and the parameter judgment circuit 31.
This is a diagram showing the part of 101°102 in more detail.
is a comparator, 103, 104 is a counter, 105° 106.107 is an arithmetic circuit, 108 is a comparator, 1
09 is a counter, 110 is a gate circuit, and 12 to 15 are latch circuits.

To operate this, image signals are input to comparators 101 and 102. Comparator 101 is counter 10
3, the density level expected to be white is detected from among the image signals on one scanning line.

That is, the image signal and the output of the counter 104 are input to the comparator 101 in synchronization with the input of each image signal, and the magnitudes of these are compared.

If the image signal is larger, the output from the comparator 101 becomes High level, so a count pulse is input to the counter 103, and the count value of the counter 103 increases.

When the image signal is smaller, the output of the comparator 101 is at a low level, so the counter value does not change.

When this operation is performed for each image signal, the count value of the counter 103 continues to count up as long as it is smaller than the image signal level. Therefore, if you reset the counter for each scanning line, the expected white level will be reset to 1 for each scanning line.
It can be output as output signal a of 03.

Similarly, the comparator 102 and the counter 104 detect the level expected to be black for each scanning line, and the counter 104 outputs it as b.

For example, image signal level 0 is the blackest possible level,
Assuming 31 is the whitest possible level.

The counter 104 is preset to 31 at the beginning of each scanning line, and thereafter, the count value of the counter 104 is decremented by 1 every time the output of the comparator 102 becomes High level in synchronization with each image signal. The comparator 102 compares the image signal with the output of the counter 104, and is set so that when the image signal is larger, the output becomes Low level, and when it is smaller, the output becomes High level. As a result, as long as the output of the counter 104 is greater than the image signal, the count value is decremented, so that at the end of each line, the counter 104 calculates the expected black level.
4 as a signal.

When the image signal input for a certain scanning line is completed, the counter 103.1
The outputs a and b of 04 represent the expected white level and the expected black level of the scanning line, respectively, and signal a is a new white level candidate.

The signal becomes a candidate for a new black level.

Further, the arithmetic circuit 105 is a circuit for calculating a signal C, which is a candidate for a new threshold value, from the signals a and b.

The value of signal C should be sufficiently smaller than the value of signal a and larger than signal A, but usually it is set to the average value of the values of a and b, or a value slightly whiter than that, so that the original is pale. can also be binarized well.

In determining these a, b, and c as new parameters, the following must be considered.

That is, there are cases where there is no black part at all between one line in a document or the like.

In that case, the output value of the counter 5 will be equal to or close to a, but this is the lowest level value (closer to black) among the white parts of the document and is not the black level.

Further, in photographic originals, there are often only gray areas on one scanning line and not enough black areas. in this case,
It is not appropriate to set the minimum value of the image signal as the black level. The judgment for this purpose is made as follows.

The arithmetic circuit 7 is a circuit that calculates a value Q that is a predetermined value subtracted from the white level obtained from the previous scanning line drawing signal or the level expected to be white.

The comparator compares the Q value and the level of the image signal, and if the level of the image signal is smaller, increases the count value of the counter 109 by 1, which makes the output High.

When the processing of the image signal of a certain scan line is completed, the count value of the counter 109 represents the number of pixels that are closer to black than the level Q. This count value is almost 0 in a blank area of a normal document, and is very large in a photo or the like.

Normally, the value is medium in the part of the document where there are characters and figures.

Therefore, when the count value is greater than a certain predetermined value t1 and smaller than tz, the counter 109 determines the value expected to be black as a new black level, and outputs a high level signal to the gate circuit 110. do.

The arithmetic circuit 106 determines the value of P, and also determines the difference between the signals a and b, that is, the contrast, in order to make the determination more reliable.

If this contrast is less than a predetermined value, it is determined that the area is a blank area, and setting of new parameters is prohibited.

That is, a high level signal is output to the gate circuit 110 only when the contrast is equal to or greater than a predetermined value.

Further, the lower 1 bit of the signal representing the contrast, which is the difference between a and b, is truncated to represent 1/2 of the difference, which is output as a candidate for the new value of P.

The gate circuit 110 controls the settings of each newly determined parameter. That is, when the output from the arithmetic circuit 106, the output from the counter 109, and the line synchronization signal are all at High level, a High level signal is output, and the newly determined white level, threshold value, black level, and value of P are output. are the latch circuits 13 and 15, respectively.
, 14.12.

Even when the line synchronization signal is at High level, if any of the other inputs is at Low level, no latch signal is output, so the white level, threshold, black level, and multiple values of P remain at their previous values.

When the input of the image signal for the next scanning line is completed, the above processing is performed again to set new parameters.

FIG. 6 shows another embodiment of the parameter determination circuit.

As in the case of FIG. 5, counters 103 and 104 output a level a expected to be white and a level b expected to be black for each scanning line, respectively.

In addition, the counter 109 has a count value greater than t□ t2
When it is smaller, the output becomes High level.

“OR” when the output of the counter 109 is High level
Since the output of the circuit 115 becomes High level, the selector 113 selects the output signal a of the counter 103 and inputs it to the arithmetic circuit.

When the output of the counter 109 is Low level, the document may be a photograph or a blank area. Therefore, when the value of the signal a is whiter than the previous white level output to the latch circuit 13, that is, the value is The selector 113 operates to select the signal a only when the signal a is large.

This happens when comparator 111 indicates that signal level a is higher! (Outputs the high level and “OR” circuit 115
The output of is made by going High.

Similarly, the selector 114 indicates that the output of the counter 109 is Hi.
gh level, or when the value of the output signal S of the counter 104 is blacker than the previous black level latched in the latch circuit 14, that is, when the value is smaller, the signal S is selected. Therefore, comparator 1
12 becomes High level when the signal S is smaller.

In this way, for each scanning line, the selector 113 and the selector 114 select the level a', which is expected to be white,
b', which is expected to be black, is output.

Based on this, as in the case of Fig. 5, 2
A threshold value for value conversion and a reference value P for image region determination are determined.

Whether or not these values are latched as new values is determined by the contrast calculated by the calculation circuit 106, that is, the difference between the value of a'' and the value of b', as in the case of FIG. 5, and is controlled by the gate circuit 110. Ru.

Note that in the example of FIG. 6, the white level latch circuit 13 is set to
The case in which the output a' of is latched is shown because the need for the gate circuit 110 is small compared to other parameters.

Further, each parameter is updated every scanning line, but even if the parameters are not changed for a few lines, there is little effect on the image quality, so it may be updated every 2 scanning lines or every 4 scanning lines.

Furthermore, as mentioned above, the parameters are switched every four scanning lines, and the counter 103 for determining this
An operation such as 104 or 109 may be performed in two or three scanning lines.

FIG. 7 is a diagram showing an example of the relationship between the white level, the black level, and the dither threshold value in the case of 32-gradation expression.

In FIG. 7(a), the white level is 31 and the black level is O1, that is,
The threshold value is shown when the contrast is sufficiently large.

When the white level is W and the black level is B, the threshold conversion formula is given as, for example, the following formula.

lJ'z(W,B)=IJ+IX(W B)/31+
B Here, Ull is each threshold value in FIG. 7(a).

W=23. When B=0, the result is as shown in FIG. 7(b). Since the white level is a little gray, the threshold value of 29 or higher is removed to prevent black dots from appearing in the background.

(c) is W=31. When B=4, that is, when the black level is slightly light.

(d) is W=28. White level as an example when B=4.

An appropriate one of these dither threshold values is selected depending on the value of the black level, etc.

Furthermore, in the above explanation, a case has been described in which the method of the present invention is applied to the method of Japanese Patent Application No. 56-102057, but the present invention is not limited to this. This method is applicable to all methods in which the optimum value of the determination parameter depends on the contrast of the document. For example, whether each pixel should emphasize gradation expression or resolution can also be determined as follows.

FIG. 8 shows an example of a pixel configuration for determining whether each pixel should place emphasis on gradation expression or resolution, where 50 is a pixel and 51 to 58 are areas adjacent to pixel 50.

The signal level of the pixel 50 shown in FIG. 8 is set to X, and the pixels 51, 52, . ......58 signal levels a T b + Q + d + e y
When f + g + h, X −−T−(a +
b + c + d + e + f + g +
A method for determining a region based on whether h ) is smaller than a predetermined value ε is described in the IBM Disclosure.

In this case, it is clear that the criterion value ε depends on the contrast of the document. That is, if the contrast is large, ε should also be set large, and if the contrast is small, ε should also be set small.

Generally, such reference values can be calculated if the white level and black level of the document, as determined in FIGS. 5 and 6, are known.

Further, in the above explanation, the case of binary pseudo halftone (binary dither method) that converts a multilevel image signal into white or black pixels has been described, but the present invention is not limited to this, and each It can also be applied to a multi-value dither method that allows expression of three or more values for each pixel.

Also, when the color image is symmetrical, for each color component,
Alternatively, this process can also be performed on a specific component. Alternatively, it is also effective when extracting only a photographic area from a document containing a mixture of text, photographs, etc.

Furthermore, in the above explanation, only one type of black level or white level is set on one scanning line, but two
There may be more than one species.

FIG. 9 is a diagram showing an example in which a photo area and a text area coexist on one scanning line on an image used in the present invention, where 150 is an image, 151 is a photo area, and 152 is a text area. be.

In this way, on one scanning line on the image 150, the area 1 of the photograph is
51 and text area 152, the black level is often not the same in the photo area and the line drawing area such as text and graphics.

In that case, it is effective to set the black level independently for the photo area and text area.

FIG. 10 shows an embodiment in which two black levels are set on each scanning line and are switched between them in the present invention.

In this case, the second region determination circuit 201 determines in a simple manner whether each image signal has a high probability of belonging to the first region or the second region.

One of the first and second areas may be a text area and the other a photo area, or they may be a text area with high density and a text area with low density.

This determination may be made based on, for example, whether there are more or fewer blocks for which the dither threshold is to be selected than a predetermined number, or whether there are many or fewer pixels close to the white level, for processed blocks or pixels in the vicinity of the pixel in question. I can do it.

This determination result is stored in the memory 202, and the black level and white level are determined separately for each area divided by this determination, and based on these, the value of P and the value of the fixed amount are determined individually. is required. The result is also output from the parameter determination circuit.

12.13, 14, 15 are 212, 21 in the first area
Numerals 3, 214, and 215 are latch circuits for P, white level, black level, and constant value, respectively, in the second area.

216, 217, 218, and 219 are selector circuits for selecting the output of the latch circuit in either the first area or the second area as a parameter, and are controlled for each pixel position according to the contents of the memory 202. .

(Effects of the Invention) As explained above, according to the method of the present invention, the black level is automatically identified and the parameters are set to optimal values, so areas such as photographs that require gradation expression and areas where resolution is important can be distinguished. This allows for good classification.

Therefore, especially when applied to pseudo-halftone expression using the dither method, text and photographs can be processed in a manner suitable for each, and good image quality can be obtained.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of one embodiment showing the configuration of the present invention, FIG. 2 is an example of threshold values for binarization processing, and FIG. 3 is a diagram showing the configuration of another embodiment of the present invention. FIG. 4 is a diagram showing still another embodiment of the present invention, FIG. 5 is a diagram showing the level detection circuit and parameter determination circuit in more detail, and FIG. 6 is a diagram showing another embodiment of the parameter determination circuit in the present invention. Figure 7 shows an example of the relationship between the white level, black level, and dither threshold in the case of 32-gradation expression. Figure 8 shows whether each pixel should focus on gradation expression and resolution. FIG. 9 is a diagram showing an example of a pixel configuration for determining whether the image is correct or not; FIG. FIG. 10 shows an embodiment of the present invention in which two black levels are set on each scanning line and are used selectively. 1.2...image memory, 3...block memory, 4...binarization circuit, 5...area determination circuit,
6... Dither threshold value memory, 7... Fixed amount value memory, 8... Threshold value memory switching circuit, 9.10... Switch, 11... Parameter judgment circuit, 12... Parameter P for area judgment latch circuit, 13
...White level latch circuit, 14...Black level latch circuit, 15...Constant value latch circuit, 20.43.44...4 line memory. 21.27...Maximum value detection circuit, 22.28...Minimum value detection circuit, 23...Maximum value memory, 24...Minimum value memory, 2
5... Area determination circuit, 26... Image area memory, 2
9.30... Memory, 31... Parameter determination circuit, 32... Threshold memory, 33.41, 42, 101, 102, 108, 111,
112... Comparator, 45... Dither threshold memory, 46.113, 114... Selector, 105.106
, 107... Arithmetic circuit, 103.104, 109...
·counter. 110...Gate circuit. Patent applicant: Nippon Telegraph and Telephone Corporation Figure 2 (0) Teijijianj value (b)
- Moxibustion stomach (1 prayer ≧ 1 fortune “゛Figure 7 (a) (
b) (c)
(d) Figure 8 Figure 9, 150 pixels Gomi 501 = Haruka cedar hard woven derebe I

Claims (5)

[Claims] (1) In an image processing method that has a function of distinguishing areas in an image that are grayscale images and areas in images such as characters and figures, the expected level of black on the image is determined for each predetermined area of the image; When the level expected to be black satisfies a predetermined condition, this is used to obtain new parameters for the image processing, and the location of the image signal to be processed in a predetermined area of the image or thereafter is determined. An image processing method characterized in that quantification is processed using the parameters, and the parameters are sequentially updated each time the parameters are newly determined. (2) means for determining the expected level of black on the original image for each predetermined number of scanning lines in an image processing circuit that performs predetermined image signal conversion and outputs the image signal based on the input image signal; means for verifying that the expected black level calculated for each of the predetermined number of scanning lines reflects the density of a black portion on the document; or a means for selecting whether to use the amount calculated from this as a new parameter or to use the old parameter as is, and according to the selected parameter, the image signal of the predetermined number of scanning lines or after that. An image processing circuit comprising means for processing an image signal to be processed. (3) Set a predetermined level l based on a predetermined or automatically detected white level, and
The image processing circuit according to claim (2), wherein one of the means for verifying is that the number of pixels closer to black within a predetermined scanning line is within a predetermined range. . (4) One of the verification means is that the difference between a predetermined or automatically detected white level and the expected level of black is a predetermined value or more. The image processing circuit described in (2). (5) One or more of the individual parameters are set in plurality and used by switching depending on the pixel position.
The image processing method and image processing circuit according to item 3) or item (4).