JPS62176989A - Production of semiconductor single crystal - Google Patents
Production of semiconductor single crystalInfo
- Publication number
- JPS62176989A JPS62176989A JP1673186A JP1673186A JPS62176989A JP S62176989 A JPS62176989 A JP S62176989A JP 1673186 A JP1673186 A JP 1673186A JP 1673186 A JP1673186 A JP 1673186A JP S62176989 A JPS62176989 A JP S62176989A
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- gaas
- semiconductor
- base plate
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 title claims abstract description 36
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 239000010703 silicon Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 16
- 230000002401 inhibitory effect Effects 0.000 claims abstract 4
- 239000000758 substrate Substances 0.000 claims description 30
- 150000001875 compounds Chemical class 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 23
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 5
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 abstract description 2
- 239000012159 carrier gas Substances 0.000 abstract description 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 abstract description 2
- 238000010438 heat treatment Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 21
- 239000010409 thin film Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- -1 oxygen ions Chemical class 0.000 description 3
- 229910000673 Indium arsenide Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000005424 photoluminescence Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910005091 Si3N Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体単結晶薄膜の製造方法に関するもので
ある。さらに詳しくは、シリコン基板を用いたｍ−ｖ族
化合物半導体の単結晶薄膜又はその混晶の単結晶薄膜か
ら成る半導体単結晶の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor single crystal thin film. More specifically, the present invention relates to a method for manufacturing a semiconductor single crystal made of a single crystal thin film of an m-v group compound semiconductor or a single crystal thin film of a mixed crystal thereof using a silicon substrate.
シリコン基板上にＧａＡｓやＡｆｆｉＧａＡｓの■−■
族化合物半導体や混晶半導体をエピタキシャル成長させ
、それを用いて作製した半導体装置については、従来よ
りいくつかの報告があり、例えば、アプライド・フィジ
ックス・レターズ（静ｐｔ。■-■ of GaAs or AffiGaAs on a silicon substrate
There have been several reports on semiconductor devices fabricated by epitaxially growing group compound semiconductors and mixed crystal semiconductors, such as those published in Applied Physics Letters.
Ｐｈｙｓ、 Ｌｅｔｔｅｒｓ） 、 １９８４．４５−
１０．１１０７には電界効果型トランジスタの例、ジャ
パニーズ・ジャーナル・オプ・アプライド・フィジック
ス（Ｊｐｎ、 Ｊ。Phys, Letters), 1984.45-
10.1107 includes examples of field-effect transistors, Japanese Journal of Applied Physics (Jpn, J.
Ａｐｐｌ、 Ｐｈｙｓ、 ） 、 １９８５．２４−
８． Ｌ６６６には半導体レーザの例が記載されている
。Appl, Phys, ), 1985.24-
8. L666 describes an example of a semiconductor laser.
上記のいずれの報告においても、半導体装置の動作確認
はなされているが、その特性は実用に供するのには不十
分なものであった。これは、ＳｉとＧａＡｓやＡｊ！Ｇ
ａＡｓの熱膨張係数が大きく異なるために、成長温度で
うまく互いの格子定数不整合を調整するようにエピタキ
シャル成長しても、室温に下がった時の格子定数の違い
により、ＧａＡｓやＡＩＧａＡＳのエピタキシャル成長
薄膜が歪を受けた状態でいるためであった。つまり、こ
のような状態では、ＧａＡｓの単結晶薄膜はひっばり応
力を受けており、膜厚が６μｍ以上ある場合にはひび割
れが入るなど、信頼性のある半導体装置を製作しえる状
況ではなかった。In all of the above reports, although the operation of the semiconductor device was confirmed, its characteristics were insufficient for practical use. This is Si, GaAs and Aj! G
Because the thermal expansion coefficients of aAs are greatly different, even if epitaxial growth is done to adjust the lattice constant mismatch between them at the growth temperature, the difference in lattice constants when the temperature drops to room temperature will cause the epitaxially grown thin film of GaAs or AIGaAS to This was to remain in a distorted state. In other words, under these conditions, the GaAs single crystal thin film was under intense stress, and if the film was thicker than 6 μm, it would crack, making it impossible to manufacture reliable semiconductor devices. .
［問題点を解決するための手段〕
このような問題点を解決するために本発明は、シリコン
基板上に化合物半導体または混晶半導体をエピタキシャ
ル成長させる半導体単結晶の製造方法において、シリコ
ン基板の一部にエピタキシャル成長を妨げる手段を施し
て、シリコン基板上にエピタキシャル成長を行なうよう
にするものである。[Means for Solving the Problems] In order to solve these problems, the present invention provides a semiconductor single crystal manufacturing method in which a compound semiconductor or a mixed crystal semiconductor is epitaxially grown on a silicon substrate. In this method, epitaxial growth is performed on a silicon substrate by applying means to prevent epitaxial growth.
本発明を適用して製造された半導体単結晶には、ひび割
れが入るなどの不具合を生じることがない。Semiconductor single crystals manufactured by applying the present invention do not suffer from defects such as cracks.
本発明に係わる半導体単結晶の製造方法の一実施例につ
いて説明する。シリコン基板上に有機金属気相法により
ＧａＡｓ単結晶薄膜を成長させるために、その上に２μ
ｍ間隔で２μｍ幅のＳｉ３Ｎ４が付着しているＳｉ基板
を用意する。このためには、（００１）シリコン基板上
の全面にＣＶＤ法により５ｆｉＮａを０．３μｍ付着さ
せホトリソグラフィーによりシリコン基板の＜１１０＞
方向からある角度θの方向に２μｍ間隔で２μｍ幅を持
つストライプ状のレジストマスクを作り、エツチングに
より、第１図に示すようなストライプ状のＳｉ：ｌＮ４
膜２をシリコン基板１上に得る。An embodiment of the method for manufacturing a semiconductor single crystal according to the present invention will be described. In order to grow a GaAs single crystal thin film on a silicon substrate by an organometallic vapor phase method, a 2μ
A Si substrate on which Si3N4 with a width of 2 μm is attached at m intervals is prepared. For this purpose, 0.3 μm of 5fiNa is deposited on the entire surface of the (001) silicon substrate by the CVD method, and the <110>
A striped resist mask with a width of 2 μm is made at 2 μm intervals in the direction of a certain angle θ from the etching direction, and etched to form a striped resist mask of Si:lN4 as shown in Fig. 1.
A membrane 2 is obtained on a silicon substrate 1.
上記ストライプ状のＳｉ、Ｎ、膜２が形成されたシリコ
ン基板１を基板としてＧａＡｓを成長させると、Ｓｉ、
Ｎ、膜２の上では結晶成長しないで、結晶核はマイグレ
ートしてＳｉ、ＩＮ、膜２のないシリコン基板ｌ上にだ
け結晶成長する。この際に結晶成長条件を適切に選んで
やると、ＧａＡｓエピタキシャル１１３は、第１図に示
すように、Ｓｉ３Ｎ４膜２上におおいかぶさるように成
長し、１μｍ以上成長した後は平坦な膜が得られる。な
お、第１図のＧａＡｓエピタキシャル膜３は、一部を切
断除去したものを示す。When GaAs is grown using the silicon substrate 1 on which the striped Si, N, film 2 is formed as a substrate, Si,
Crystals do not grow on the N, film 2, but the crystal nuclei migrate and grow only on the silicon substrate 1 without the Si, IN, film 2. If the crystal growth conditions are appropriately selected at this time, the GaAs epitaxial layer 113 will grow to cover the Si3N4 film 2, as shown in FIG. It will be done. Note that the GaAs epitaxial film 3 shown in FIG. 1 is shown after being partially cut and removed.
上記成長条件の中で特に大切なものは、基板の成長温度
とＳｉ３Ｎ４膜２が基板＜１１０＞方向からなす角度θ
とであり、この場合、６３０℃。Among the above growth conditions, the most important ones are the growth temperature of the substrate and the angle θ that the Si3N4 film 2 makes from the <110> direction of the substrate.
In this case, the temperature is 630°C.
３０度に設定した。角度としては２０〜４５度であれば
よい。また、原料にはトリメチルガリウムとアルシンを
用い、そのモル分率は、それぞれ、３．２Ｘ １０−’
／ｍ ｉ ！−１と１．７Ｘ １０−”７ｍ ｉ ｎと
し、水素のキャリアガス４／／ｍｉｎで成長室に送り込
んだ。It was set at 30 degrees. The angle may be 20 to 45 degrees. In addition, trimethyl gallium and arsine are used as raw materials, and their molar fractions are 3.2X 10-'
/mi! -1 and 1.7 x 10-''7min, and were fed into the growth chamber with a hydrogen carrier gas of 4/min.
もう１つの大切な手法は、成長初期にまず基板温度を３
５０℃〜４００℃にして、アモルファス状のＧａＡｓを
２００人成長させ、次に基板温度を６３０℃として上記
アモルファス状ＧａＡｓを単結晶させた後、成長を続け
ることである。Another important method is to first increase the substrate temperature to 3.
The method is to grow 200 pieces of amorphous GaAs at a temperature of 50° C. to 400° C., then raise the substrate temperature to 630° C., make the amorphous GaAs a single crystal, and then continue the growth.
このようにして得た厚さ３μｍのＧａＡｓ単結晶膜の７
７にのホト・ルミネッセンスを第２図の特性曲線ＩＯに
示す。第２図において、横軸は波長、縦軸はホト・ルミ
ネッセンス強度である。特性曲線１０で示すように、ピ
ーク波長は８１７ｎｍで通常のＧａＡｓのそれと同じ値
であり、従来行なわれてきたシリコン基板上に成長させ
たＧａＡｓのピーク波長８４０ｎｍ（特性曲線２０）と
異なっている。また、その強度も強い。これは、従来の
手法では、ＳｉとＧａＡｓの熱膨張係数の違いに起因す
る歪がＧａＡｓ層に残っているため、本来の値からずれ
ていたものであり、本実施例により歪のない良質のＧａ
Ａｓ膜が得られていることがわかる。また、本実施例で
８μｍ厚のＧａＡｓ膜を成長させても、できた膜にひび
割れ等は生ぜず、半導体装置にこの膜を使用するとこと
により、信頼性のある装置を作ることができる。7 of the GaAs single crystal film with a thickness of 3 μm thus obtained.
The photoluminescence of 7 is shown in the characteristic curve IO in FIG. In FIG. 2, the horizontal axis is wavelength and the vertical axis is photoluminescence intensity. As shown by characteristic curve 10, the peak wavelength is 817 nm, which is the same value as that of ordinary GaAs, and is different from the peak wavelength of 840 nm (characteristic curve 20) of GaAs grown on a conventional silicon substrate. Also, its strength is strong. This is because in the conventional method, the strain caused by the difference in thermal expansion coefficient between Si and GaAs remains in the GaAs layer, which deviates from the original value, but with this example, it was possible to obtain a high-quality strain free of strain. Ga
It can be seen that an As film was obtained. Further, even if a GaAs film with a thickness of 8 μm is grown in this example, no cracks or the like will occur in the formed film, and by using this film in a semiconductor device, a reliable device can be manufactured.
第３図は本発明に係わる半導体単結晶の製造方法の他の
実施例を説明するための構成図であり、第１図の例と同
様に、２μｍ幅、２μｍ間隔のストライプ状のＳｉ３Ｎ
、膜をシリコン基板１上に残した後、酸素イオンを５０
ｋｅＶでｌＸｌ０”／ｃｍ”イオン注入し、Ｓｉ３Ｎ、
膜をエツチングにより除去することにより、２μｍ幅、
２μｍ間隔の酸素イオン注入ストライプ領域４を持つシ
リコン基板１を得る。この基板１を用いて、第２図と同
じ結晶成長条件でＧａＡｓを成長させると、イオン注入
された部分は、Ｓｉの結晶性がそこなわれているため、
その上に結晶成長しないで、結晶核はマイグレートして
注入された原子のないシリコン基板１上にだけ成長する
。そして１μｍ以上成長した後は平坦な膜が得られる。FIG. 3 is a block diagram for explaining another embodiment of the method for manufacturing a semiconductor single crystal according to the present invention, in which, like the example in FIG.
, after leaving the film on the silicon substrate 1, 50% of oxygen ions were added.
Si3N,
By removing the film by etching, the width of 2μm,
A silicon substrate 1 having oxygen ion implantation stripe regions 4 at intervals of 2 μm is obtained. When GaAs is grown using this substrate 1 under the same crystal growth conditions as shown in FIG. 2, the crystallinity of Si is impaired in the ion-implanted areas, so
No crystal grows thereon, but the crystal nucleus migrates and grows only on the silicon substrate 1 without implanted atoms. After growing to a thickness of 1 μm or more, a flat film is obtained.
なお本実施例では、材料をＧａＡｓ、ＡｆＧａＡｓにつ
いて記したが、これに限らず、シリコン基板上のＧａ
ＩｎＡｓ、Ａｆ ＩｎＡｓ、ｌ ｎｐ等の他の化合物、
混晶でも同様の利点があることはいうまでのない。また
、成長を妨げる物質や混入させる異物質についても本実
施例に限らず、ＳｉＯ□等の他の絶縁膜又はタングステ
ン等の金属。In this example, materials such as GaAs and AfGaAs are described, but the materials are not limited to these.
Other compounds such as InAs, Af InAs, l np,
Needless to say, mixed crystals have similar advantages. Further, the substances that inhibit growth and the foreign substances to be mixed are not limited to those in this embodiment, but may include other insulating films such as SiO□ or metals such as tungsten.
タングステン等の合金、タングステンシリサイド等の半
導体又は金属の化合物、混合物でもよいことも当然であ
る。It goes without saying that alloys such as tungsten, semiconductors such as tungsten silicide, or compounds or mixtures of metals may also be used.
以上説明したように本発明は、シリコン基板のＬ部にエ
ピタキシャル成長を妨げる手段を施して、シリコン基板
上にエピタキシャル成長を行なうことにより、良質の歪
のない単結晶膜を得ることができる効果がある。従って
、この単結晶膜もしくはこの単結晶膜上に成長したＡ
Ｉ Ｇ ａ Ａ ｓ ／ Ｇ ａＡｓヘテロ接合を用い
て、半導体レーザ、発行ダイオード、電界効果トランジ
スタ、方向性結合器等の半導体装置を製作すると、品質
のよい信鎖性のあるものを得られる効果がある。As explained above, the present invention has the effect that a high-quality strain-free single crystal film can be obtained by applying a means to prevent epitaxial growth to the L portion of the silicon substrate and performing epitaxial growth on the silicon substrate. Therefore, this single crystal film or the A grown on this single crystal film
When semiconductor devices such as semiconductor lasers, light emitting diodes, field effect transistors, and directional couplers are manufactured using IGaAs/GaAs heterojunctions, it is effective to obtain products with good quality and reliability. be.
第１図は本発明に係わる半導体単結晶の製造方法の一実
施例を説明するための一部断面斜視図、第２図は本発明
を適用して製造した半導体単結晶の特性を示す特性図、
第３図は他の実施例を示す一部断面斜視図である。
１・・・・シリコン基板、２・・・・５ｉ３Ｎ４膜、３
・・・・ＧａＡｓエピタキシャル膜、４・・・・酸素イ
オン注入ストライプ領域。FIG. 1 is a partially cross-sectional perspective view for explaining an embodiment of the method for manufacturing a semiconductor single crystal according to the present invention, and FIG. 2 is a characteristic diagram showing the characteristics of a semiconductor single crystal manufactured by applying the present invention. ,
FIG. 3 is a partially sectional perspective view showing another embodiment. 1...Silicon substrate, 2...5i3N4 film, 3
...GaAs epitaxial film, 4...Oxygen ion implantation stripe region.
Claims (5)
をエピタキシャル成長させる半導体単結晶の製造方法に
おいて、前記シリコン基板の一部にエピタキシャル成長
を妨げる手段を施して、シリコン基板上にエピタキシャ
ル成長を行なうことを特徴とする半導体単結晶の製造方
法。(1) A method for manufacturing a semiconductor single crystal in which a compound semiconductor or a mixed crystal semiconductor is epitaxially grown on a silicon substrate, characterized in that the epitaxial growth is performed on the silicon substrate by applying a means to prevent epitaxial growth to a part of the silicon substrate. A method for manufacturing a semiconductor single crystal.
板の一部に覆われた物質であることを特徴とする特許請
求の範囲第１項記載の半導体単結晶の製造方法。(2) The method for manufacturing a semiconductor single crystal according to claim 1, wherein the means for inhibiting epitaxial growth is a substance covering a part of the silicon substrate.
２、Ｓｉ＿３Ｎ＿４等の絶縁膜であることを特徴とする
特許請求の範囲第２項記載の半導体単結晶の製造方法。(3) The material covered in a part of the silicon substrate is SiO_
2. The method for manufacturing a semiconductor single crystal according to claim 2, wherein the insulating film is made of Si_3N_4 or the like.
板の一部に混入された異物質であることを特徴とする特
許請求の範囲第１項記載の半導体単結晶の製造方法。(4) The method for manufacturing a semiconductor single crystal according to claim 1, wherein the means for inhibiting epitaxial growth is a foreign substance mixed into a part of the silicon substrate.
注入されたシリコン以外の元素であることを特徴とする
特許請求の範囲第４項記載の半導体単結晶の製造方法。(5) The method for manufacturing a semiconductor single crystal according to claim 4, wherein the substance mixed into a part of the silicon substrate is an element other than ion-implanted silicon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1673186A JPS62176989A (en) | 1986-01-30 | 1986-01-30 | Production of semiconductor single crystal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1673186A JPS62176989A (en) | 1986-01-30 | 1986-01-30 | Production of semiconductor single crystal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62176989A true JPS62176989A (en) | 1987-08-03 |
Family
ID=11924406
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1673186A Pending JPS62176989A (en) | 1986-01-30 | 1986-01-30 | Production of semiconductor single crystal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62176989A (en) |
-
1986
- 1986-01-30 JP JP1673186A patent/JPS62176989A/en active Pending
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