JPS62175911A - Storage information reproducing circuit - Google Patents

Storage information reproducing circuit

Info

Publication number
JPS62175911A
JPS62175911A JP1718886A JP1718886A JPS62175911A JP S62175911 A JPS62175911 A JP S62175911A JP 1718886 A JP1718886 A JP 1718886A JP 1718886 A JP1718886 A JP 1718886A JP S62175911 A JPS62175911 A JP S62175911A
Authority
JP
Japan
Prior art keywords
signal
delay
filter
noise
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1718886A
Other languages
Japanese (ja)
Inventor
Toshiki Okubo
俊樹 大久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1718886A priority Critical patent/JPS62175911A/en
Publication of JPS62175911A publication Critical patent/JPS62175911A/en
Pending legal-status Critical Current

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  • Digital Magnetic Recording (AREA)

Abstract

PURPOSE:To obtain a recording information reproducing circuit for generating no data error caused by noise, by providing an adjusting means for generating a delay signal which has given a prescribed delay to an output of an amplifying/ filter means, executing an addition of this delay signal and that which gives no delay, and outputting its result to a differential means. CONSTITUTION:A reproducing signal (a) which has been read from a magnetic head is amplified by an amplifier 1, and thereafter, a regular noise is eliminated through a filter 2, and said signal becomes a filter signal (b). A delaying circuit 3 delays the filter signal (b) by a prescribed time Td, and thereafter, inputs it as a delay signal (c) to an adder circuit 4. The adder circuit 4 adds the filter signal (b) and the delay signal (c), but the large noise which exists in the filter signal (b) becomes the noise whose phase is opposite to that of the delay signal (c), and after adding them, the unevenness becomes pretty small. Accordingly, in a differential signal (e), the noise which is lowered to a zero crossing point by only the filter signal (b) becomes uneven a little by adding the delay signal (c), and does not reach the zero crossing point, therefore, even after it has been inputted to a comparator, a data (g) can be detected normally.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、フロッピーディスク装置に関し、特にその記
憶情報再生回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a floppy disk device, and particularly to a stored information reproducing circuit thereof.

〔概要〕〔overview〕

本発明は、磁気記憶手段からの再生信号を増幅・ろ波す
る増幅・ろ波手段および微分信号を生成する微分手段を
含み、データを再生する記憶情報再生回路において、 上記増幅・ろ波手段の出力に所定の遅延を与えた遅延信
号を生成し、この遅延信号と遅延をあたえないもとの上
記出力との加算を行いその結果を上記微分回路へ出力す
る調整手段を設けることにより、 ノイズによる読取り誤りをなくすようにしたものである
The present invention provides a storage information reproducing circuit for reproducing data, including an amplifying/filtering means for amplifying and filtering a reproduced signal from a magnetic storage means and a differentiating means for generating a differential signal. By providing an adjustment means that generates a delayed signal by giving a predetermined delay to the output, adds this delayed signal to the above-mentioned original output without giving the delay, and outputs the result to the above-mentioned differentiating circuit, it is possible to eliminate noise caused by noise. This is to eliminate reading errors.

〔従来の技術〕[Conventional technology]

従来、この種のフロッピーディスク装置の記憶情報再生
回路は、磁気ヘッドからの再生信号を増幅器で増幅した
後、フィルタでノイズを除去し、これを微分回路に通し
た後、コンパレータ等で再生信号のピークを検出しデー
タを再生していた。
Conventionally, the stored information reproducing circuit of this type of floppy disk device amplifies the reproduced signal from the magnetic head with an amplifier, removes noise with a filter, passes it through a differentiating circuit, and then converts the reproduced signal with a comparator or the like. The peak was detected and the data was reproduced.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記の従来の記憶情報再生回路は静電気または電気的ノ
イズにより、再生信号に大きなノイズが入り、再生信号
かわれたような状態になった場合、これをピークとして
検出しデータ誤りを発生する欠点があった。
The conventional storage information reproducing circuit described above has the disadvantage that if large noise is introduced into the reproduced signal due to static electricity or electrical noise, and the reproduced signal becomes distorted, this will be detected as a peak and a data error will occur. there were.

本発明の目的は、上記の欠点を除去することにより、ノ
イズによるデータ誤りを生じない記憶情報再生回路を提
供することにある。
An object of the present invention is to provide a stored information reproducing circuit that does not cause data errors due to noise by eliminating the above-mentioned drawbacks.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、磁気記憶手段からの再生信号を増幅ろ波する
増幅・ろ波手段および微分信号を生成する微分手段とを
含み、データを再生する記憶情報再生回路において、上
記増幅・ろ波手段の出力に所定の遅延を与えた遅延信号
を生成しこの遅延信号と遅延を与えないもとの上記出力
との加算を行いその結果を上記微分手段へ出力する調整
手段を設けたことを特徴とする。
The present invention provides a storage information reproducing circuit for reproducing data, which includes an amplifying/filtering means for amplifying and filtering a reproduced signal from a magnetic storage means and a differentiating means for generating a differential signal. The invention is characterized in that an adjustment means is provided for generating a delayed signal by giving a predetermined delay to the output, adding the delayed signal to the original output without giving the delay, and outputting the result to the differentiating means. .

(作用) 本発明は、増幅・ろ波手段により増幅およびろ波された
再生信号を、調整手段により所定の遅延を与えた遅延信
号を生成し、この遅延信号と遅延させないもとの出力と
の加算を行いその結果を微分手段へ出力する。この加算
された結果は、同一波形を所定の時間ずらして逆相とし
て加算したものとなり、再生信号に大きなノイズが加わ
った波形であっても、ノイズの位相にもよるが、相互に
そのピーク値を相殺して、再生信号本来のピーク値より
も小さくできる。従って、たとえ大きなノイズがあった
としても、正しいピーク値による微分信号が得られ、デ
ータ誤りの発生を防止することが可能となる。
(Function) The present invention generates a delayed signal by giving a predetermined delay to the reproduced signal that has been amplified and filtered by the amplification/filtering means, and combines this delayed signal with the original output that is not delayed. Addition is performed and the result is output to the differentiating means. The result of this addition is the same waveform shifted by a predetermined time and added as an opposite phase. Even if the waveform has a large noise added to the reproduced signal, its peak value will differ depending on the phase of the noise. can be made smaller than the original peak value of the reproduced signal. Therefore, even if there is large noise, a differential signal with a correct peak value can be obtained, and data errors can be prevented from occurring.

〔実施例〕〔Example〕

以下、本発明の実施例について図面を参照して明する。 Embodiments of the present invention will be explained below with reference to the drawings.

第1図は本発明の一実施例の構成を示すブロック図であ
る。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

本実施例は、磁気記憶手段としての磁気ヘッドからの再
生信号aは増幅・ろ波する増幅・ろ波手段としての増幅
器1およびフィルタ2と、フィルタ2からのフィルタ信
号すに所定の遅延を与えた遅延信号Cを生成する遅延回
路3と、遅延信号Cとフィルタ信号すとの加算を行い加
算信号dを出力する加算回路4と、(ここで遅延回路3
と加算回路4とは調整手段を構成する。)加算信号dを
微分し微分信号eを出力する微分手段としての微分回路
5と、微分信号eを所定の基準信号(図示していない)
と比較し、比較信号fを出力する比較回路と、比較信号
を整形して所定のフオームのデータgを出力するデータ
整形回路7とを含んでいる。
In this embodiment, a reproduced signal a from a magnetic head as a magnetic storage means is amplified and filtered by an amplifier 1 and a filter 2 as amplification/filtering means, and a filter signal from the filter 2 is given a predetermined delay. a delay circuit 3 that generates a delayed signal C; an adder circuit 4 that adds the delayed signal C and the filter signal d and outputs an added signal d;
and the addition circuit 4 constitute adjustment means. ) A differentiating circuit 5 as a differentiating means for differentiating the added signal d and outputting a differentiated signal e, and a differentiating circuit 5 as a differentiating means for differentiating the added signal d and outputting the differentiated signal e, and a predetermined reference signal (not shown) for the differentiated signal e.
The data shaping circuit 7 includes a comparison circuit that compares the comparison signal with a comparison signal f and outputs a comparison signal f, and a data shaping circuit 7 that formats the comparison signal and outputs data g in a predetermined form.

本発明の特徴は、第1図において遅延回路3および加算
回路4を設けたことにある。
The feature of the present invention is that the delay circuit 3 and the adder circuit 4 are provided in FIG.

次に、本実施例の動作について第2図に示す動作タイミ
ングチャートを参照して説明する。磁気ヘッドより読み
取られた再生信号aは、増幅器1で増幅された後、フィ
ルタ2を通して通常のノイズが除去され、フィルタ信号
すとなる。遅延回路3はフィルタ信号すを一定時間Td
遅延させた後、遅延信号Cとして加算回路4に入力させ
る。加算回路4はフィルタ信号すと遅延信号Cを加算す
るが第2図からも明らかなように、フィルタ信号すに存
在していた大きなノイズは、遅延信号Cと逆相のノイズ
となり、加算した後には、ノイズの位相にもよるが凸凹
はかなり小さくなる。従って、微分信号eにおいては、
フィルタ信号すのみでは0クロス点まで下げるほどのノ
イズが、遅延信号Cを加算することにより、小さな凸凹
となるため0クロス点まで到達しないため、これをコン
パレータに入力した後も正常にデータgの検出が可能と
なる。
Next, the operation of this embodiment will be explained with reference to the operation timing chart shown in FIG. The reproduced signal a read by the magnetic head is amplified by an amplifier 1, and then passed through a filter 2, where normal noise is removed and a filtered signal S is obtained. The delay circuit 3 outputs the filter signal for a certain period of time Td.
After being delayed, the signal is input to the adder circuit 4 as a delayed signal C. The adder circuit 4 adds the delayed signal C to the filter signal, but as is clear from FIG. Although it depends on the phase of the noise, the unevenness becomes considerably smaller. Therefore, in the differential signal e,
If only the filter signal is used, the noise is enough to bring it down to the 0 cross point, but by adding the delayed signal C, it becomes small irregularities and does not reach the 0 cross point. Therefore, even after inputting this to the comparator, the data g does not reach the zero cross point. Detection becomes possible.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、微分回路の間に遅延回路
と加算回路からなる調整手段を接続することにより、再
生信号にのった大きなノイズを除去し、ノイズによる読
取り誤りをなくすことができる効果がある。
As explained above, in the present invention, by connecting an adjusting means consisting of a delay circuit and an adder circuit between the differentiating circuits, it is possible to remove large noises on the reproduced signal and eliminate reading errors caused by noises. effective.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の構成を示すブロック図。 第2図はその動作タイミングチャート。 ■・・・増幅器、2・・・フィルタ、3・・・遅延回路
、4・・・加算回路、5・・・微分回路、6・・・コン
パレータ、7・・・データ整形回路、a・・・再生信号
、b・・・フィルタ信号、い・・遅延信号、d・・・加
算信号、e・・・微分信号、f・・・コンパレータ信号
、g・・・データ。 特許出願人 日本電気株式会社、/−1,:、、” ’
。 代理人  弁理士 井 出 直 孝:(1゛■2 実施例 第2 データg 図
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Figure 2 is an operation timing chart. ■...Amplifier, 2...Filter, 3...Delay circuit, 4...Addition circuit, 5...Differentiating circuit, 6...Comparator, 7...Data shaping circuit, a... - Reproduction signal, b...filter signal, i...delay signal, d...addition signal, e...differential signal, f...comparator signal, g...data. Patent applicant: NEC Corporation, /-1,:,,” '
. Agent Patent Attorney Nao Takashi Ide: (1゛■2 Example 2 Data g Figure

Claims (1)

【特許請求の範囲】[Claims] (1)磁気記憶手段からの再生信号を増幅・ろ波する増
幅・ろ波手段(1、2)および微分信号を生成する微分
手段(5)とを含み、データを再生する記憶情報再生回
路において、 上記増幅・ろ波手段の出力に所定の遅延を与えた遅延信
号を生成しこの遅延信号と遅延を与えないもとの上記出
力との加算を行いその結果を上記微分手段へ出力する調
整手段(3、4)を 設けたことを特徴とする記憶情報再生回路。
(1) In a stored information reproducing circuit for reproducing data, including amplifying/filtering means (1, 2) for amplifying and filtering a reproduced signal from a magnetic storage means and a differentiating means (5) for generating a differential signal. , adjustment means for generating a delayed signal by adding a predetermined delay to the output of the amplification/filtering means, adding the delayed signal to the original output without the delay, and outputting the result to the differentiating means; A stored information reproducing circuit characterized by providing (3, 4).
JP1718886A 1986-01-28 1986-01-28 Storage information reproducing circuit Pending JPS62175911A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1718886A JPS62175911A (en) 1986-01-28 1986-01-28 Storage information reproducing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1718886A JPS62175911A (en) 1986-01-28 1986-01-28 Storage information reproducing circuit

Publications (1)

Publication Number Publication Date
JPS62175911A true JPS62175911A (en) 1987-08-01

Family

ID=11936962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1718886A Pending JPS62175911A (en) 1986-01-28 1986-01-28 Storage information reproducing circuit

Country Status (1)

Country Link
JP (1) JPS62175911A (en)

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