JPS62173925A - Static overcurrent detector - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a static overcurrent detection device that generates an operation time limit using a microcomputer, and in particular to improving the accuracy of its pickup characteristics. ] FIG. 5 shows a conventional static overcurrent detection device disclosed in Japanese Patent Laid-Open No. 60-32211.

When a fault current flows through the AC line, current transformers 21, 22, and 23 corresponding to each phase induce an output current on the secondary side.

Each of these output currents is a full-wave rectifier circuit 31, 32.3.
3, the corresponding burden circuits 41, 42.4
3 is supplied. Each burden circuit 41, 42.4
The output signals of 3 are sent to signal conversion circuits 91, 92.9 for each phase.
3 into signals corresponding to their effective values or average values. This effective value or average value is determined by the OR circuit 16.
0 to the A/D conversion circuit 100, and the microcomputer 1 receives it as a digital signal.
10. The microcomputer 110 executes level determination of this digital input signal according to a predetermined program. Furthermore, based on the result of this level determination, one operation is performed for a predetermined time period l) and an output signal is generated from the output port 116. That is, the microcomputer 110
is the output port 11 of the microcomputer 110, which functions as a first level determination means and a first time limit generation means.
The output signal generated by 6 is applied to the gate of thyristor 120. The thyristor 120 is triggered by this signal and turns on, driving the release type electromagnetic exception device 8o. Therefore, the release type electromagnetic exception device 8o is the opening contact 2.
01, 202 and 203 are opened, and the electric path is cut off.

On the other hand, the fault current is large and the necessary force is required to shut it off instantly! A second time limit generation means is provided for certain cases.

A voltage signal corresponding to the fault current induced in the load circuits 41, 42, and 43 is input to an OR circuit 130 made up of diodes 131, 132, and 133. The output side of the OR circuit 130 is connected via a Zener diode 140 to a time limit generation circuit 150, which is a second time limit generation means.

Therefore, when the output level of the OR circuit 130 exceeds the Zener voltage of the Zener diode 140, a signal is input to the time generator circuit 150.

The time limit generation circuit 150 performs a predetermined time limit operation based on this signal, triggers the gate of the iris register 120, and drives the release type electromagnetic exception device 8o. Therefore, the electric path is quickly cut off.

[Problems to be solved by the invention] In the conventional static overcurrent detection device as described above,
The operation of the second time limit generation means depends on the Zener voltage of the Zener diode, and there are large variations depending on the element, so when trying to adjust the threshold value, it is difficult to determine the level with high precision. there were. Furthermore, since the Zener diode has temperature-dependent characteristics, it is necessary to add a correction circuit to compensate for this, making the circuit complicated.

An object of the present invention is to solve the above-mentioned problems and provide a static overcurrent detection device having i0i precision and stable pickup characteristics.

[Means for Solving the Problems] A static overcurrent detection device according to the present invention includes an fASl, a second level determining means, first and second time generating means, and is controlled by a microcomputer J11. The D/A conversion output value is used as a threshold value of the second level determining means.

[Operation] The second time limit generating means operates based on the output of the second level determining means. The output of the second level determining means is determined by the threshold value from the stable/A converter circuit, and stable pickup 9.v characteristics can be realized.

[Example] An example of the present invention is shown in FIG. The output of the microcomputer 110 is input to a comparator 142 via a D/A conversion circuit 141. Comparator 14
The output of the OR circuit 130 is connected to the other input of the circuit 2. The comparator 142 and the D/A conversion circuit 141 constitute a second level determining means 140. The output of the comparator 142 is connected to a time limit generation circuit 150, which is a second time limit generation means.

When a fault current flows through the AC line, the current transformers 21, 22, and 23 corresponding to each phase induce an output current on the secondary side.

Each of these output currents is a full-wave rectifier circuit 31, 32.3.
3, the corresponding burden circuits 41, 42.4
3, respectively. Each burden circuit 41, 42.43
Signal conversion circuits 91, 92.9 for each phase
3 into signals corresponding to their effective values or average values. This effective value or average value is determined by the OR circuit 16.
0 to the A/D conversion circuit 100, and the microcomputer 1 receives it as a digital signal.
10. - The ficrocomputer 110 executes level determination of this digital input signal according to a predetermined program. Further, based on the result of this level determination, a predetermined time-limited operation is performed and an output signal is generated from the output port 116. That is, the microcomputer 110 functions as a first level determining means and a first time generating means. Output port 116 of microcomputer 110
The output signal emitted from the thyristor 120 is applied to the gate of the thyristor 120. The thyristor 120 is triggered by this signal and turns on to drive the release type electromagnetic tripping device 80. Therefore, the release type electromagnetic tripping device 80 is the opening contact 201.
．． 202 and 203 are opened, and the electric path is cut off.

On the other hand, the voltage fR corresponding to the fault current induced in the burden circuits 41, 42, 43 is
The signal is input to an OR circuit 130 consisting of 33 elements. OR circuit 1
The output of 30 is input to one input terminal of comparator 142. When this input exceeds the threshold Vt applied to the other of comparator 142, comparator 1
The output of 42 is inverted and a signal is input to the time limit generating circuit 150. Here, the above-mentioned threshold value Vt is obtained by converting the digital output preset to the output port 117 by the microcomputer 110 into an analog voltage value via the D/A conversion circuit 141.
performs a predetermined time-limited operation based on the inverted signal of the comparator 142 and triggers the gate of the thyristor 120. Then, the tripping device 80 is activated and the electric circuit is cut off. The time-limited operation in this case is performed, for example, along the instantaneous characteristic in the characteristic curve of FIG.

Note that in other embodiments, the OR circuits 130, 160
Instead, a multiplexer may be used to select the signals in a time-division manner.

Next, the configuration of the fibrocomputer 110 is shown in FIG. 3, and the output 117 of the I10 port Al2O is input to the D/A conversion circuit 141. Also, I10 boat 1
The output of 19 is connected to thyristor 120. R.O.
A program for executing predetermined signal processing is stored in M 114, and CPU 111 executes this program.

The signal processing process in the microcomputer 110 is shown in the flowchart of FIG. 4. When the microcomputer 110 is started, the system is initialized (I10 port setting, flag setting, reset, etc.) in step 1001.

Next, a D/A conversion output is executed to generate a predetermined threshold value Vt necessary for the instantaneous trip characteristic (step 1002), that is, a predetermined digital value is output to the output terminal 117 of the I10 board. be done.

Next, we enter the heat storage routine. Signal conversion circuit 91°92
．． The maximum value of the signal output from 93 is the A/D conversion circuit 1.
00 and output it as a digital signal to RAM 11.
5 is written. In step 1003, it is determined whether this digital signal indicates an overcurrent.

If there is no overcurrent, the heat storage routine is exited and the process returns to the A/D conversion process. If there is an overcurrent, first set the heat storage flag H to zero, and use the register in the CPU III or the RAM 115 to perform a timekeeping operation at a predetermined time interval according to the level of the input signal. The number of heat storage bits is added to the second number of heat storage bits.
At the 0th order, which is selected to realize a time-limited operation along the characteristic curve shown in the figure, it is determined whether the added number of heat storage bits has reached a value corresponding to a predetermined time limit.

As a result, if the added bit number has not reached the value corresponding to the predetermined time limit, the process returns to the A/D conversion process. Also, if the predetermined value is reached, 110 baud 1-1
19, the thyristor 120 is triggered to drive the release type '81 magnetic tripping device 80, which is an output means.

If the A/D converted data falls below a predetermined level when the heat storage flag H is set and the time-limited timing operation has progressed to a certain extent, the following operation is performed. In this case, the heat storage routine is interrupted and a judgment is made as to whether or not the heat storage flag H is set.
Return to /D conversion processing. When flag H is set, the number of heat dissipation bits is subtracted every predetermined unit time from the number of bits added and counted in the heat treatment routine.

As a result of this subtraction, if the count value of the bit becomes O, the heat storage flag () is reset and the process returns to the A/D conversion process.Also, if the count value of the bit is not completely reset, A/D without resetting heat storage flag H
Return to the conversion process. In this way, optimum thermal properties are achieved.

Note that D/ outputted from the microcomputer 110,
The digital output for In' conversion can also be tffia so that a predetermined setting input code by a changeover switch or the like is determined and a respective digital output is output for each setting value. In this way, the threshold value of the instantaneous trip characteristic can be varied.

[Effects of the Invention] The static overcurrent detection device according to the present invention uses the D/A 9 conversion output value controlled by a microcomputer as the threshold value of the second level determining means.

Therefore, highly accurate and stable pickup characteristics can be obtained. Furthermore, since the threshold value can be easily changed, the shutoff time can be freely selected. Furthermore, it can easily accommodate changes in the threshold value in the case of high-mix, low-volume production.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing the fusing characteristics of the electric circuit and upper fuse, and the operating characteristics of the static overcurrent detection device, and FIG. 3 is a diagram showing the static overcurrent detection device of FIG. 1. A diagram showing the configuration of a microcomputer applied to the current detection device, FIG. 4 is a diagram showing the flowchart 1 of the basic operation of the static overcurrent detection device of the present invention, and FIG. 5 is a diagram showing the conventional static overcurrent detection device. FIG. 2 is a block diagram showing the device. 101.102,103. is the power supply side terminal, 201, 20
2, 203 is an open 1ii1i contact, 301, 302, 30
3 is the load side t111, 21, 22, 23 are current transformers, 3
1, 32, 33 are full wave rectifier circuits, 41, 42, 43 are negative 11i circuits, 80 are open type electromagnetic exception devices, 91, 92
．． 93 is a signal conversion circuit, 110 is a microcomputer, 141 (JI)/A conversion circuit, 142 is a comparator, and 150 is a time generation circuit. Note that the same reference numerals in each figure indicate the same or equivalent parts.

Claims (2)

[Claims] (1) It consists of a contact that can be opened by a releasable device and is inserted into the electrical circuit, an actuating device that releases the releasable device, a current sensor means that detects the fault current flowing in the electrical circuit, and a microcomputer. a first level determining means for determining the level of the secondary output of the sensor means; a first time limit configured of a microcomputer and performing a predetermined timed operation corresponding to the level selected by the first level determining means; generating means, second level determining means for determining the level of the secondary output of the current sensor means, using the D/A conversion output controlled by the microcomputer as a threshold value; selected by the second level determining means; It is characterized by comprising: a second time limit generation means for performing a predetermined time limit operation corresponding to the level; and an output means that operates in response to the time limit operations of the first and second time limit generation means to operate the actuating device. A static overcurrent detection device. (2) The static overcurrent detection device according to claim 1, wherein the second time limit generating means is configured to realize an instantaneous tripping characteristic.