JPS62170923A - Focusing control method - Google Patents

Abstract

PURPOSE:To easily control the driving of a motor by forming pulse width by counting up the number of signals synchronizing with spot light driving signals and controlling the pulse width of a driving source during the operation of a spot light projecting means. CONSTITUTION:A pulse signal SYNC synchronized with a pulse emitted from a light emitting diode 22 is applied to a synchronism detecting circuit 29 and a potential difference between a light non-emitting time and a light emitting time is outputted to the succeeding integrating circuit 30. When a mode is transferred to 'CLEAR' by a 'MODE' pulse, both the circuits 29, 30 do not generate any output and are initialized and infrared-ray driving also is not executed. The size relation between integrated outputs Va and Vb is latched until the mode is transferred to 'HOLD' mode again and a motor 50 is driven by pulse width control based upon a duty ratio through, a motor driving circuit 48, so that a photographing lens can be approached to the focusing direction. Thus, motor driving can be easily controlled.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is used in photographic devices such as video cameras and still cameras, and in particular, projects a sub-light (e.g., infrared light) onto a subject. The present invention relates to a so-called active focusing control method in which reflected light is received by a pair of light receiving elements to obtain a focus detection signal.

[Prior Art] A conventional example in which focus is adjusted based on the difference in output from a pair of light receiving elements in such an active automatic focusing system will first be described with reference to FIGS. 4 to 6.

In FIG. 4, spot light is projected onto a subject S from a light emitting element 2 pulse-driven by a pulse oscillator l, and the reflected light reflected by the subject S passes through a condensing lens 3 to a pair of light receiving elements 4a and 4b. incident on . In this case, the light receiving elements 4a and 4b are movable as shown by the arrows along with the movement of a photographic lens (not shown). Light receiving element 4
a.

The respective outputs from 4b are passed through amplifiers 5a and 5b, and unnecessary external light components are removed by synchronous detection circuits 6a and 6b that are synchronized with the pulse oscillator l, and the outputs are sent to primary stage integrators 7a and 7.
b.

The outputs Sa and Sb of the integrators 7a and 7b are shown in FIG.
As shown in a), it gradually increases as time t passes.

In this case, as shown in the figure, for example, the light intensity of the spot light incident on the light receiving element 4b satisfies Sa<Sb, and the light intensity of the spot light entering the light receiving element 4a
If it is much larger than that of the spot light incident on it, it is out of focus.

In addition, in the focused state, there is almost no difference between the outputs Sa and Sb (Sa:Sb).The outputs S from the integrators 7a and 7b
a and Sb are an adder 8 that further adds both, and a re-output S
It is input to a subtracter 9 that calculates the absolute value of the difference between a and Sb,
The outputs of the adder 8 and subtracter 9 are connected to a comparator 10 having predetermined threshold values v1 and V2 (Vl>V2), respectively.
．． The outputs of these comparators 10 and 11 are respectively connected to an arithmetic processing circuit 12.

FIG. 5(b) shows the output of the adder 8, and this output Sa+
Sb gradually increases with time t, and at time t1 when it reaches the threshold v1, the comparator 10 outputs an H level. (C) is the output of the subtractor 9, and the output l Sa −S
bl gradually increases with time t, and at time t2 when it reaches the threshold value v2, the comparator 11 outputs an H level. These H level outputs are used in the arithmetic processing circuit 12 to determine which time is inputted earlier or how much earlier it is inputted.

For example, the time t2 (
7) is input earlier than time, tl, then 5
When the relationship a=Sb is broken, that is, it is in an out-of-focus state. Also, before l 5a-sbl = v2, Sa
If the time tl at which +Sb=Vl is earlier,
It can be determined that the state is close to Saki sb and close to the in-focus state.

The above explanation can also be restated as follows. That is, as shown in FIG. 6, the time t1 at which Sa+Sb reaches the threshold value v1 is first detected, and 1sa- at this time tl is detected.
Determine the level of Sbl. And 1Sa-5bl>
If V2 tear tL is out of focus, l Sa −Sb l
When <V2, it is determined that the lens is in focus.

The in-focus state is determined by such a method, and if the in-focus state is maintained, no control signal is given to the motor that controls the movement of the photographic lens so that the in-focus state is maintained as it is. If the object is out of focus, the motor will be controlled depending on the direction and amount of out-of-focus.

As for the speed control method, there are two simple methods using a tacho generator or the like: a method in which the voltage applied to the motor is varied, and a method in which the duty ratio is varied while keeping the voltage constant. That is, the former has four speeds of the motor, for example HSPEED, LISPEED, L2SPE.
To realize ED, L3SPEED, O port for stop, 19PEED for VHS bolt, LISP
EE[l HAVL1po)Lt ), L2SPEE[l
ttVL2PoJL/), L3SPEED is a method in which the voltage corresponding to VL3Port is determined in advance, and the voltage applied to the motor is switched based on the result when the speed is determined as described above. Also, the latter uses the duty ratio instead of the voltage, l5PEED is A%, L l5PE
In this method, ED is determined as B%, L2SPEED as 0%, L3SPEED as D%, and stop as 0%, and the duty ratio applied to the motor is changed based on the determined value of speed.

Each method has its advantages and disadvantages, but the former method is simple but requires a circuit to switch the voltage.

[Object of the Invention] An object of the present invention is to provide a focusing control method that allows easy control of motor drive in an active focusing device by pulse width control using a duty ratio.

[Summary of the Invention] The gist of the present invention for achieving the above-mentioned object is to provide a light projecting means for projecting a spot light modulated at a predetermined period toward a subject, and a light projecting means for projecting a spot light modulated at a predetermined period toward a subject, and a light projecting means for projecting light reflected from the spot light from the subject. A light receiving means for receiving light, a means for performing focus detection calculation based on the output of the light receiving means, and a drive source for moving the photographing lens and controlling the focusing state based on the output from the focus detection calculation means. In the apparatus, the drive source is controlled by pulse width control, the pulse width is formed by counting a predetermined number of signals synchronized with the drive signal of the subo-nod light, and the projection for projecting the spot light is performed. The focus control method is characterized in that the pulse width of the driving source is controlled while the optical means is in operation.

[Embodiments of the Invention] The present invention will be described in detail based on embodiments illustrated in FIGS. 1 to 3.

In FIG. 1, 21 is a photoelectric detector, which is composed of two divided light receiving elements 21a and 21b, and has the necessary sensitivity to the emission wavelength of the infrared light emitting diode 22. The photocurrents obtained by the light receiving elements 21a and 21b are the first and second photocurrents, respectively.
It is added to the second signal processing circuit 23,24. Since the signal processing circuits 23 and 24 are exactly the same circuit, only the first signal processing circuit 23 is shown in FIG.
4 is represented by a dotted line. The output of the light receiving element 21a is input to the sensor amplifier 25, which converts the photocurrent from the light receiving element 21a into voltage. The position of this sensor amplifier 25 is easily affected by noise, so it is desirable to place it as close to the photoelectric detector 21 as possible.In addition, the light input to the photoelectric detector 21 should be such that the desired infrared signal component is Many other unnecessary external light components are also included, so in order to prevent the output of the sensor amplifier 25 from being saturated by these components, bypass frequency characteristics are provided, and circuits that remove photocurrent due to external light components are devised. is being done as necessary. The DC component of the voltage output from the sensor amplifier 25 is removed by a capacitor 26 and then applied to a preamplifier 27 . The preamplifier 27 has a gain that is switched to three levels, for example, 1, 8, and 64, ensuring a sufficient dynamic range for the input signal. The DC component of the output of the preamplifier 27 is cut off again by the capacitor 28 and is applied to the synchronous detection circuit 29. This synchronous detection circuit 29 is supplied with a pulse signal 5YNC synchronized with the light emission pulse from the 1 light emission guide 22, and the potential difference between the non-emission state and the light emission state is output to the next stage integration circuit 30. . Integrating circuit 30
Then, the detected output voltage is integrated and stored in the capacitor 31.

The output from the offset tl' automatic adjustment circuit 32 is connected to the integrating circuit 30, and the input offset voltage of the differential amplifier used in the integrating circuit 30 is stored in a capacitor 33, and zero integral output is set for zero input. It is functioning as such. Note that the above description of the second signal processing circuit 24 is also omitted since it is completely the same.

1st. The outputs Va, Vb of the two integration circuits 30 of the second signal processing circuit 23, 24 are given to the adder 4o, and the outputs Va, Vb (7) average value (Va+Vb)/2 are obtained.

Average value (Va+Vb)/2 +f:I comparator 4
1,42 (7) is added to the negative input terminal and the charging circuit 43. On the other hand, constant voltages VL and VH are applied to the positive input terminals of the comparators 41 and 42, and these voltages VL and VH serve as threshold voltages for determining the completion of integration.

The comparator 44 has integral outputs Va and Vb applied to its minus input terminal and plus input terminal, respectively, and the output Va
, Vb are compared in magnitude. Average value (Va+Vb
)/2 is input to the charging circuit 43, the step signal ST from the logic circuit 45 is also applied, and the input voltage (Va+Vb)
A voltage is added stepwise to /2, and this voltage is applied to the negative input terminal of the comparator 46. On the other hand, the comparator 46 has two positive input terminals, and integral outputs Va and Vb are applied to each of them. This comparator 46 makes it possible to compare the output Va or vb with the (Va+Vb)/2-step voltage, and depending on the number of steps and the timing of inversion of the comparator 46, the integrated output Va or
, Vb potential difference can be measured.

The logic circuit 45 includes four comparators 41, 42, 44.
．． The logic circuit 45 outputs signals to the charging circuit 43, the integrating circuit 30, the synchronous detection circuit 29, the infrared light drive circuit 47, and the motor drive circuit 48. Furthermore, the logic circuit 45 is connected to the microcomputer 49 through five digital signal input/output lines.

The infrared light drive circuit 47 drives the light emitting diode 22.

A motor drive circuit 48 drives a motor 50 that moves the photographic lens.

When this focus control method is used, for example, in a video camera, since the distance to the subject changes from moment to moment, it is necessary to constantly perform focus detection and continuously adjust the photographic lens to the in-focus state. For this purpose, focus detection is performed using IDLE and INT.
Transitions between the four modes EG, HOLD, and CLEAR are performed while repeating them in sequence.

Clock pulse signal CL from the microcomputer 49
K, a mode signal MODE, and a gain signal GAIN are sent to a logic circuit 45, which generates signals IRED, CLR, and a gain switching signal by combining these signals. Signal CLK is infrared light drive signal I
RED, synchronization signal 5YNC1 is used to generate a step signal ST to the charging circuit 43. Also, the signal MODE is 1
During the ranging period, there are four modes IDLE as mentioned above.
→ Perform the INTEG -HoLD-CLEAR transition,
Moreover, the flip-flop FLL in the logic circuit 45,
The output of FHH is input to the microcomputer 49 via signal lines LL and )IH.

FIG. 2 shows each control signal of the configuration diagram shown in FIG. 1. First, when the signals CLK and MODE go to H level, the signal processing circuit 2324 is reset and turned to the IDLE mode.In the IDLE mode', both the first-period detection circuit 29 and the integration circuit 30 have no output. The infrared light drive circuit 47 is rotated by the pulse of the signal CLK and operates according to the signal IRED. While this mode continues for the required time, the signal GAIN switches the gain of the preamplifier 27, sets the maximum gain when the signal processing circuits 23 and 24 are reset, and each time a pulse of the signal GAIN is applied, the preamplifier 27 changes the gain. 27, the integration circuit 30 is turned off, and the set automatic adjustment circuit 32 performs automatic offset adjustment and stabilization of the infrared light output.

Next, when the pulse of the signal MODE is output, the mode changes to I.
Transition to NTEC. In this mode, the integration circuit 30 starts integration, and the synchronous detection circuit 29 detects the light receiving element 21a by the signal 5YNC synchronized with the infrared light drive signal I RED.
Performs synchronous detection of the received light signal from. The integrating circuit 30 integrates when there is an input from the synchronous detection circuit 29 synchronized with the signal 5YNC, and the integral outputs Va and vb fall at a falling rate proportional to the signal strength.

The average value (Va+Vb)/2 of the integrated outputs of the first and second signal processing circuits 23.24, which is the output from the adder 40, is compared with two thresholds VL and VH in comparators 41.42, respectively. When (Va+vb)/2 reaches this threshold value VL, V)I, the following changes occur. That is, the flip-flop FLL in the logic circuit 45
and F)IH are set to H level by reset, but change to L level by the outputs of comparators 41 and 42 when (Va+Vb)/2 crosses thresholds VL and V)l, respectively.

The output of flip-flop F) IH is always connected to the output line HH,
Flip-flop FLL is output to output line LL only in the INTEG mode. By checking the digital signals from these flip-flops FHH and FLL, the microcomputer 49 can check the integral amount with two threshold values VL and VH. Threshold value V)l
determines the end of the integral operation, that is, the INTEG mode, and when the flip-flop FLL changes to L level, the infrared light drive and synchronous detection operations are forcibly stopped. Note that the flip-flop FHH is (Va+Vb)/2
even if it does not reach the threshold vH.

) +0 Automatically changes to L level when transitioning to LD mode.

Subsequently, the mode is changed to HOLD by the MODE pulse. In this mode, the integration circuit 30 continues to be able to perform integration, but the synchronous detection circuit 29 and the infrared light drive circuit 47 become inactive. During this period, the signal processing circuit 23
．． 24 integral, output Va, Vb holds each voltage value,
The difference between one of the outputs and the average value (Va+Vb)/2 is detected, and the signal CLK changes in frequency and contributes to the generation of the step signal ST in this mode. In the previous INTEG mode, the output of the charging circuit 43 is the output of the adder 40 as it is, and the average value of the integral outputs Va and Vb (
Valb)/2, but in the HOLD mode, it is charged by a step signal ST having a constant period and having a constant amount of power output in accordance with the signal CLK, and falls at a constant speed, as shown by the signal Vc. Then, eventually the integral output Va
, crosses the lower voltage level of either Vb,
At this time, flip-flop FHH returns to H level again. Since this change is output to the output line H)I, the potential difference between the integral outputs Va and Vb can be determined by measuring the time interval during which the flip-flop FHH was at the L level. The focus state can be determined from the potential difference between the integral outputs Va and Vb, and the smaller the potential difference, the closer to focus. Moreover, the charging circuit 43 in this case
Charging at can also be considered discharging depending on the choice of sign.

Furthermore, the mode changes to CLEAR by the MODE pulse. In this mode, as in the IDLE mode, both the synchronous detection circuit 29 and the integration circuit 30 are initialized with no output, and no infrared light drive is performed. The magnitude relationship between the integral outputs Va and vb is latched until the mode transits to the HOLD mode again, and the motor 50 is driven by pulse width control based on the duty ratio via the motor drive circuit 48 to move the photographing lens closer to the focusing direction. become. Note that this focusing direction can be obtained by the positive or negative sign of the output of the comparator 44.

Next, a pulse width setting method for motor drive will be explained using the program shown in FIG. 3 and Table 1. First, as shown in Table 1) ISPEED, Ll~L3SPEED
0. For example, H9=0. Ll= l, L2= 2, L3=
By storing a value such as 3.5TOP=4, it is possible to determine what the current speed of the motor 50 is.

Table 1 M (SPDM) On Off H9PEED HS (-0) F F 0
LISPEED Ll(-1) 33 13L
2SPEED L2 (禦2) 2323L3SPEED
L3(-3) 15 31STOP 5
TOP-(-4) OF F In this embodiment, the basic cycle of duty ratio control is one cycle of the ranging program shown in FIG. (DUTM)
Use to count by subtraction. Therefore, memory M(mouth UT
If an appropriate value is entered in M), the carry flag CF can be output at every predetermined cycle of the program, and the flag CF can be used to turn on and off the voltage of one motor 50 and set the duty ratio to an arbitrary value. For example, as shown in Table 1, L1 on = 33. When setting L1 off = 13, the motor 50 is on for 34 cycles and off for 14 cycles, that is, the duty ratio is 70.8%.
control is performed. Furthermore, in this example, 1 cycle is about 120Ji, S, so 120X48=576
Speed control is performed at a frequency of 01LS, that is, approximately 173.6Hz. Similarly, L2SPEED, L3S
PEED is set at a duty ratio of 50% and 33.3%. It goes without saying that the duty ratio can be freely set by changing the off ratio of Ll-L3, and the frequency can be freely changed by changing the sum.

The state of the duty ratio control described above will be explained using the program shown in FIG. First, in step 443, the light emitting diode 22 is turned on, and in step 444, the memory M (DUT
Subtract 1 from M). Step 445-r memo + JM (
DUTM) When the output power is 1, it is necessary to switch the motor 50 from on to off or from off to on for duty ratio control.

In step 446, the motor 50 is turned on→off or off→
Memory M (DRVM) is added to the ACC to determine whether the
Transfer the contents of When the motor 50 is currently off, the memory M (DRVM) is 0, and when the motor 50 is being driven, 1 or 2 is stored. If ACC=0 in step 446, that is, the motor 50 is off, it is necessary to switch the motor 50 on. The direction signal is stored in memory M (DIRM) based on the previous result, and in step 448 this value is stored in memory M (DRV
Move to M).

In step 449, the contents of memory M (SPDM) are ACCed.
, it is determined whether the current speed is LISPEED or not. When ACC=1, it is determined as LISPEED, and in step 470, L is stored in memory M (DUTM).
l on is memorized. Similarly in step 451, ACC=
2, it is determined to be L2SPEED, and step 469
Then, L2 ON is stored in memory M (DUTM). A.C.
C#l, ACCC2O4 is determined to be L3SPEED, and in step 452, L3 ON is stored in memory M (DUTM).

The motor 5o is controlled by turning off the light emitting diode 22 in step 453 and outputting the contents of the memory M (DRVM) in step 454. Step 455
Then, the average value of integral outputs Va and Vb (Va+Vb)/2
In order to obtain information about the value of from the electric circuit, the state of the flip-flop FHH is taken into ACC, and the average value (Va+Vb
)/2 has reached the threshold VH, that is, the output H1(of the flip-flop FH)I is at the L level. If it is at the L level, the integration is complete, and the program returns to the main program. .

If the number of blinking times of the light emitting diode 22, that is, the output of the signal CLK has reached 256 times in step 457, the program is similarly completed. In step 457, if the distance measurement is not completed, the process returns to the first step 443, and the light emitting diode 22 is repeatedly turned on to continue the distance measurement.

When it is determined in step 446 that the motor 50 is on, it is necessary to proceed to step 462 and turn the motor 50 from on to off, and steps 469 to 468 are replaced by step 449.
~470.

The process proceeds to step 460 when the motor 5 is
This is a case where it is determined that there is no need to switch on/off the 0. However, even if there is no need to switch,
Stop or ISPEED without the need for duty ratio control
It is necessary to distinguish between two cases: a case where duty ratio control is being performed but the count has not yet reached the switching point. When stopped or HSPEED in step 460, ACC = 0, so in step 461, memory M (DUTM) is set to FF in hexadecimal so that even if memory M (DUTM) is always -1, CF = 1 is not set. Remember. When ACC=O, the contents of memory M (DUTM) are stored with the value decremented by 1 in step 444, and when CF=1 in memory M (DUTM), motor 50 is stored in the flow starting from step 446. switching is performed.

In this way, the motor 50 is driven in synchronization with the light emission of the light emitting diode 22, and the required speed control is executed by creating the on state and off state by duty ratio control as shown in Table 1. It turns out.

Although the above-mentioned embodiment relates to the time when the light emitting diode 22 is blinking, the speed control can also be carried out during the period when the light emitting diode 22 is not blinking by using the program shown in FIG. I can do it.

[Effects of the Invention] As explained above, according to the focusing control method according to the present invention, the drive control of the motor is based on the duty ratio.
Device configuration can be simplified.

[Brief explanation of drawings]

1 to 3 show an embodiment of the focusing control method according to the present invention, FIG. 1 is a block circuit diagram thereof, FIG. 2 is a signal waveform diagram, and FIG. 3 is a distance measuring method. FIG. 4 is a block circuit diagram of a conventional signal processing circuit, and FIGS. 5 and 6 are explanatory diagrams of its operation. Reference numeral 21 is a photoelectric detector, 21a and 21b are light receiving elements, 2
2 is an infrared light emitting diode, 23.24 is a signal processing circuit,
25 is a sensor amplifier, 27 is a preamplifier, 29 is a synchronous detection circuit, and 30 is an integration circuit. 32 is an automatic offset adjustment circuit, and 4o is an adder. 41, 42, 44, 46 are comparators, 43 is a charging circuit, 45 is a logic circuit, 47 is an infrared light drive circuit, 48 is a motor drive circuit, 49 is a microcomputer, and 50 is a motor.

Claims (1)

[Claims] 1. A light projecting means for projecting a spot light modulated at a predetermined period toward a subject, and a light receiving means for receiving reflected light of the spot light from the subject, the light receiving device In an apparatus having means for performing focus detection calculation based on the output of the focus detection calculation means, and a drive source for moving the photographing lens and controlling the focusing state based on the output from the focus detection calculation means, the control of the drive source is performed using a pulse. width control, the pulse width is formed by counting a predetermined number of signals synchronized with the drive signal of the spot light using a counting means, and the pulse width of the drive source is controlled while the light projecting means for projecting the spot light is in operation. A focusing control method characterized by performing the following. 2. The focusing control method according to claim 1, wherein the predetermined number counted by the counting means is set to a different value for each predetermined speed of the photographing lens.