JPS62152526U - - Google Patents
Info
- Publication number
- JPS62152526U JPS62152526U JP4097286U JP4097286U JPS62152526U JP S62152526 U JPS62152526 U JP S62152526U JP 4097286 U JP4097286 U JP 4097286U JP 4097286 U JP4097286 U JP 4097286U JP S62152526 U JPS62152526 U JP S62152526U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- muting
- radio receiver
- control signal
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001934 delay Effects 0.000 claims 1
- 238000001514 detection method Methods 0.000 claims 1
- 230000005236 sound signal Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Noise Elimination (AREA)
Description
第１図は本考案の一実施例を示す図、第２図は
第１図各部波形を示す図、第３図は他の実施例を
示す図である。
７……コントローラ、１０……微分回路、１１
，１２……ミユーテイング用トランジスタ、２１
……遅延回路、２２……レベル減衰回路。
FIG. 1 is a diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing waveforms of various parts of FIG. 1, and FIG. 3 is a diagram showing another embodiment. 7... Controller, 10 ... Differential circuit, 11
, 12...mutating transistor, 21
...delay circuit, 22 ...level attenuation circuit.
Claims (1)
するべくラジオ受信機を制御し、且つ少くとも選
局指令に基づいてミユーテイング制御信号を出力
するコントローラと、このコントローラからのミ
ユーテイング制御信号に基づき音声信号線路を側
路するミユーテイング回路とを備えたラジオ受信
機において、すくなくとも前記ミユーテイング制
御信号を微分する微分回路を含む制御回路を設け
、前記微分回路の出力に基づいて所定期間だけ前
記ミユーテイング回路を駆動せしめるようにした
ことを特徴とするラジオ受信機。 (2) 制御回路が微分回路と、コントローラから
のミユーテイング制御信号を所定時間遅延させる
遅延回路と、この遅延回路の出力に基づき検波出
力信号のレベルを減衰するレベル減衰回路とを含
んでいる実用新案登録請求の範囲第(1)項記載の
ラジオ受信機。[Scope of Claim for Utility Model Registration] (1) A controller that controls a radio receiver to vary the reception frequency based on a manual tuning command and outputs a muting control signal based on at least the tuning command; In a radio receiver equipped with a muting circuit that bypasses an audio signal line based on a muting control signal from a controller, a control circuit including at least a differentiating circuit that differentiates the muting control signal, and based on the output of the differentiating circuit 1. A radio receiver, wherein the muting circuit is driven for a predetermined period of time. (2) A utility model in which the control circuit includes a differentiating circuit, a delay circuit that delays a mutating control signal from the controller for a predetermined period of time, and a level attenuation circuit that attenuates the level of the detection output signal based on the output of this delay circuit. A radio receiver according to registered claim (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4097286U JPS62152526U (en) | 1986-03-19 | 1986-03-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4097286U JPS62152526U (en) | 1986-03-19 | 1986-03-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62152526U true JPS62152526U (en) | 1987-09-28 |
Family
ID=30855540
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4097286U Pending JPS62152526U (en) | 1986-03-19 | 1986-03-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62152526U (en) |
-
1986
- 1986-03-19 JP JP4097286U patent/JPS62152526U/ja active Pending
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