JPS62150941A - Agc control circuit of optical receiver - Google Patents

Agc control circuit of optical receiver

Info

Publication number
JPS62150941A
JPS62150941A JP60291655A JP29165585A JPS62150941A JP S62150941 A JPS62150941 A JP S62150941A JP 60291655 A JP60291655 A JP 60291655A JP 29165585 A JP29165585 A JP 29165585A JP S62150941 A JPS62150941 A JP S62150941A
Authority
JP
Japan
Prior art keywords
differential amplifier
diode
control circuit
voltage source
agc control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60291655A
Other languages
Japanese (ja)
Inventor
Atsushi Iwaoka
岩岡 篤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60291655A priority Critical patent/JPS62150941A/en
Publication of JPS62150941A publication Critical patent/JPS62150941A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To make the folded point of two control signal being outputs of an AGC control circuit with an optional input level by adopting a constitution that two differential amplifiers are switched by a diode and one differential amplifier keeps a constant output while the other is operated linearly. CONSTITUTION:When an input signal 21 is larger than the value E5 of a voltage source 29, a diode 28 is conducted, the differential amplifier 25 is operated linearly and the output of the differential amplifier 26 is zero. On the other hand, when the input signal 21 is smaller than the value E5 of the voltage source 29, the diode 28 is cut off, the output of the differential amplifier 25 is zero, while the differential amplifier 16 is operated linearly. Thus, the folded points of the 1st control signal 22 and the 2nd control signal 23 are always made coincident with each other and the folded point is matched to an optional input level by only adjusting the value E5 of the voltage source 29.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は光通信等に使用する光受信器のAGC”制御回
路に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an AGC control circuit for an optical receiver used in optical communications and the like.

従来の技術 従来光受信器では、第2図に示すようにアバランシェフ
ォトダイオード(以下人PDと略す。)1で光信号を取
り出し、プリアンプ2、AGCアンプ3で増幅の上で等
化器4を経由して出力する2 ページ 一方で、出力レベルをレベル検出回路5で検出し、AG
C制御回路6によシ、第4図、第5図に示す2種類のA
GC制御電圧を発生させ、それぞれAGCアンプ3及び
DC/DC変換器7を介してADPIに印加して、光入
力レベルに対する受信器利得が右下がりの特性になるよ
うに制御するに際して、第6図に示す回路構゛成のAG
C制御回路を用いて来た。
2. Description of the Related Art In a conventional optical receiver, as shown in FIG. On the other hand, the output level is detected by the level detection circuit 5 and the AG
The two types of A shown in FIGS. 4 and 5 are provided by the C control circuit 6.
When generating a GC control voltage and applying it to ADPI via the AGC amplifier 3 and DC/DC converter 7, respectively, to control the receiver gain with respect to the optical input level to have a downward-sloping characteristic, as shown in FIG. AG with the circuit configuration shown in
A C control circuit was used.

第6図で、11はAGC制御回路人力信号、12はA’
GCアンプ制御信号、13はDC/DC変換器制御信号
であり、14及び15は差動増幅器、16及び17は抵
抗器、18及び19は順方向電圧以下の無視できる理想
的なダイオード、E1〜E4は電圧源を示している。
In Fig. 6, 11 is the AGC control circuit human input signal, 12 is A'
GC amplifier control signal, 13 is a DC/DC converter control signal, 14 and 15 are differential amplifiers, 16 and 17 are resistors, 18 and 19 are ideal diodes whose forward voltage is negligible or less, E1~ E4 indicates a voltage source.

次に上記従来例の動作について説明する。第6図におい
て、AGCアンプの制御電圧12は電圧源E2より高く
なろうとするとダイオード18が導通し、E2にリミッ
トされる。また同様に、DC/DC変換器の制御電圧1
3は電圧源E4より低く々ろうとするとダイオード19
が導通し、電3ペー。
Next, the operation of the above conventional example will be explained. In FIG. 6, when the control voltage 12 of the AGC amplifier attempts to become higher than the voltage source E2, the diode 18 becomes conductive and is limited to E2. Similarly, the control voltage 1 of the DC/DC converter
3 becomes lower than the voltage source E4, the diode 19
is conductive and electricity is 3 pages.

圧源E4にリミットされる。上記以外の出力電圧範囲で
は線形動作を行い第3図に示す特性が実現できる。この
ように上記従来のAGC制御回路においても第4図に示
す入出力特性を実現することができる。
It is limited by pressure source E4. In an output voltage range other than the above, linear operation is performed and the characteristics shown in FIG. 3 can be realized. In this way, the input/output characteristics shown in FIG. 4 can also be realized in the conventional AGC control circuit.

発明が解決しようとする問題点 しかしながら、上記従来のAGC制御回路では特定の入
力レベルに対して、第3図(イ)、(ロ)に示す折曲り
点P、Pを設定しようとすると電圧源E1とE3それぞ
れを微妙に調整しなければならないという問題点があっ
た。
Problems to be Solved by the Invention However, in the conventional AGC control circuit described above, when trying to set the bending points P and P shown in FIGS. 3(a) and 3(b) for a specific input level, the voltage source There was a problem in that each of E1 and E3 had to be delicately adjusted.

本発明はこのような従来の問題点を解決するものであり
、2つの制御電圧の折曲り点P 、 P’を常に一致さ
せたまま、1度の調整で任意の入力レベルに対して折曲
り点を設定できる優れだAGC制御回路を提供すること
を目的とするものである。
The present invention solves these conventional problems, and allows bending for any input level with one adjustment while keeping the bending points P and P' of the two control voltages always the same. The purpose of this invention is to provide an excellent AGC control circuit that can set the points.

問題点を解決するだめの手段 本発明は上記目的を達成するだめに、検出レベルを入力
した増幅器等の出力に抵抗器とダイオードと電圧源の直
列接続を設け、前記抵抗器及びダイオードのそれぞれの
両端の電圧を第1.第2の差動増幅器に入力し、それぞ
れの差動増幅器の出力から第1.第2制御信号を取り出
すように構成したものである。
Means for Solving the Problems In order to achieve the above object, the present invention provides a series connection of a resistor, a diode, and a voltage source at the output of an amplifier or the like into which a detection level is input, and connects each of the resistor and diode in series. The voltage at both ends is 1. input to the second differential amplifier, and from the output of each differential amplifier to the first . It is configured to extract the second control signal.

作用 したがって、本発明によれば入力レベルが電圧源よりも
低いときには、抵抗の両端に電位差が生じ、高い場合に
はダイオードの両端に電位差が生じるため、これらの電
位差をそれぞれ差動増幅することにより、常に入力レベ
ルに対して折れ曲り点がP 、 P’が一致したまま、
動作点を1つの電圧源を調整するだけで設定できる2つ
のAGC制御信号をつくることができるという効果を有
する。
Therefore, according to the present invention, when the input level is lower than the voltage source, a potential difference is generated across the resistor, and when it is higher, a potential difference is generated across the diode, so by differentially amplifying these potential differences, , while the bending points P and P' always match with respect to the input level,
This has the advantage of being able to create two AGC control signals whose operating points can be set simply by adjusting one voltage source.

実施例 第1図は本発明の一実施例の構成を示すものである。同
図で、21はAGC制御回路入力信号、22はAGCア
ンプ3制御用の第1の制御信号、23はDC/DC変換
器7制御用の第2の制御信号であり、24〜26はいず
れも差動増幅器である。
Embodiment FIG. 1 shows the configuration of an embodiment of the present invention. In the figure, 21 is an AGC control circuit input signal, 22 is a first control signal for controlling the AGC amplifier 3, 23 is a second control signal for controlling the DC/DC converter 7, and 24 to 26 are any of the following. is also a differential amplifier.

符号反転用の差動増幅器24の出力に直列に抵抗5ペー
7 27、はぼ理想的な特性のダイオード28、電圧源29
が接地の間に直列接続され、差動増幅器(第1の差動増
幅器)25は抵抗器27の両端の電位差を、また差動増
幅器(第2の差動増幅器)26はダイオード28の両端
の電位差をそれぞれ増幅するように接続されている。
In series with the output of the differential amplifier 24 for sign inversion are resistors 5 and 7 27, a diode 28 with almost ideal characteristics, and a voltage source 29.
are connected in series between the ground, the differential amplifier (first differential amplifier) 25 detects the potential difference across the resistor 27, and the differential amplifier (second differential amplifier) 26 captures the potential difference between the terminals of the diode 28. They are connected to each amplify the potential difference.

次に上記実施例の動作について説明する。上記実施例に
おいて、AGC制御回路の入力信号21が電圧源29の
値E5より大きい時にはダイオード28は導通し、差動
増幅器25は線形動作するが、差動増幅器26は出力ゼ
ロとなる。一方、入GC制御回路の入力信号21が電圧
源29の値E5より小さい時にはダイオード28は遮断
され、差動増幅器25は出力ゼロとなるが差動増幅器2
6は線形動作する。従って第5図に示す入出力特性が実
現できる。
Next, the operation of the above embodiment will be explained. In the above embodiment, when the input signal 21 of the AGC control circuit is larger than the value E5 of the voltage source 29, the diode 28 becomes conductive and the differential amplifier 25 operates linearly, but the output of the differential amplifier 26 becomes zero. On the other hand, when the input signal 21 of the input GC control circuit is smaller than the value E5 of the voltage source 29, the diode 28 is cut off and the differential amplifier 25 has an output of zero, but the differential amplifier 2
6 operates linearly. Therefore, the input/output characteristics shown in FIG. 5 can be realized.

(それぞれバイアス電圧を加えると、第3図と同等) このように上記実施例によれば、第1の制御信号22と
第2の制御信号23の折れ曲り点はP、P’6ページ は常に一致し、電圧源29の値E5を調整するだけで、
折れ曲り点P 、 P’を任意の入力レベルに合わせる
ことができるという効果を有する。
(If a bias voltage is applied to each, it is equivalent to FIG. 3) According to the above embodiment, the bending points of the first control signal 22 and the second control signal 23 are always P and P'6 pages. match, just by adjusting the value E5 of the voltage source 29,
This has the effect that the bending points P and P' can be adjusted to any input level.

発明の効果 本発明は上記実施例より明らかなように、はぼ理想的な
特性のダイオードのスイッチングにより2つの差動増幅
器を切換え、一方が線形動作している間、他方は一定値
出力を保つように構成しているので、AGC制御回路出
力の2つの制御信号の折れ曲り点を任意の入力レベルに
対して一致させることが出来るので、折れ曲り点を個々
に設定することが不要となり調整が簡素化出来る利点を
有する。
Effects of the Invention As is clear from the above embodiments, the present invention switches two differential amplifiers by switching diodes with almost ideal characteristics, and while one operates linearly, the other maintains a constant output value. With this configuration, the bending points of the two control signals output from the AGC control circuit can be made to match for any input level, making it unnecessary to set the bending points individually and making adjustments easier. It has the advantage of being simple.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例における光受信器のAGC制
御回路の回路図、第2図は光受信器の構成を示すブロッ
ク図、第3図は同AGC制御回路の特性図、第4図は同
光受信器の特性図、第5図は第1図の特性図、第6図は
従来のAGC制御回□路の回路図、第7図は同特性図で
ある。 7ペーノ゛ 21・・・入力信号、22・・・第1の制御信号、23
・・・第2の制御信号、24〜26・・・差動増幅器、
27・・・抵抗器、28・・・ダイオード、29・・・
電圧源。 代理人の氏名  弁理士 中 尾 敏 男 ほか1名第
1図 −)/:ハtタイ )り、・峯tqlり少澄ダ 第3図 第4図 大 光入欠しΔ゛ンし 第5図 第6図 [上ロニ/イヮ、/″ 第7図 A6C呵岬藺路 ゝ′
FIG. 1 is a circuit diagram of an AGC control circuit of an optical receiver in an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of the optical receiver, FIG. 3 is a characteristic diagram of the AGC control circuit, and FIG. 5 is a characteristic diagram of the same optical receiver, FIG. 5 is a characteristic diagram of FIG. 1, FIG. 6 is a circuit diagram of a conventional AGC control circuit, and FIG. 7 is a characteristic diagram of the same. 7 pages 21... Input signal, 22... First control signal, 23
... second control signal, 24-26 ... differential amplifier,
27...Resistor, 28...Diode, 29...
voltage source. Name of agent Patent attorney Toshio Nakao and 1 other person Figure 1 Figure 6 [Ueroni/Iwa,/'' Figure 7

Claims (1)

【特許請求の範囲】[Claims] 光受信器出力のレベルを検出し、前記レベルを抵抗とダ
イオードと電圧源との直列接続の一端に接続すると共に
他端を接地し、前記抵抗とダイオードの両端の電位差を
それぞれ差動増幅器を経由して取り出し、前記レベルの
変化に対し折れ曲り点の一致した2組のAGC制御信号
を得るようにした光受信器のAGC制御回路。
The level of the optical receiver output is detected, the level is connected to one end of a series connection of a resistor, a diode, and a voltage source, and the other end is grounded, and the potential difference between the ends of the resistor and diode is measured through a differential amplifier. An AGC control circuit for an optical receiver, which obtains two sets of AGC control signals whose bending points coincide with each other with respect to the change in level.
JP60291655A 1985-12-24 1985-12-24 Agc control circuit of optical receiver Pending JPS62150941A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60291655A JPS62150941A (en) 1985-12-24 1985-12-24 Agc control circuit of optical receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60291655A JPS62150941A (en) 1985-12-24 1985-12-24 Agc control circuit of optical receiver

Publications (1)

Publication Number Publication Date
JPS62150941A true JPS62150941A (en) 1987-07-04

Family

ID=17771752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60291655A Pending JPS62150941A (en) 1985-12-24 1985-12-24 Agc control circuit of optical receiver

Country Status (1)

Country Link
JP (1) JPS62150941A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5980032A (en) * 1982-10-29 1984-05-09 Fujitsu Ltd Identification level setting system of identifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5980032A (en) * 1982-10-29 1984-05-09 Fujitsu Ltd Identification level setting system of identifier

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