JPS62149280U - - Google Patents

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Publication number
JPS62149280U
JPS62149280U JP3481086U JP3481086U JPS62149280U JP S62149280 U JPS62149280 U JP S62149280U JP 3481086 U JP3481086 U JP 3481086U JP 3481086 U JP3481086 U JP 3481086U JP S62149280 U JPS62149280 U JP S62149280U
Authority
JP
Japan
Prior art keywords
output
circuit
switching element
pulse width
width modulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3481086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3481086U priority Critical patent/JPS62149280U/ja
Publication of JPS62149280U publication Critical patent/JPS62149280U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案を適用した直流電源装置の回
路例を示す図、第2図及び第3図はこの考案の動
作を説明するための図、第4図は従来の直流電源
装置の回路図、第5図及び第6図は従来の直流電
源装置の動作を説明するための図である。 図中1は1次電源、2はスイツチング素子、3
は高周波トランス、4は整流回路、5は平滑回路
、6は負荷、7は基準電圧発生回路、8は誤差増
幅器、9は位相補償回路、10は三角波発振回路
、11はパルス幅変調回路、12はドライバ、1
3は乗算器である。なお、図中同一あるいは相当
部分には同一符号を付してある。
Figure 1 is a diagram showing a circuit example of a DC power supply to which this invention is applied, Figures 2 and 3 are diagrams for explaining the operation of this invention, and Figure 4 is a circuit diagram of a conventional DC power supply. , FIG. 5, and FIG. 6 are diagrams for explaining the operation of a conventional DC power supply device. In the figure, 1 is the primary power supply, 2 is the switching element, and 3
is a high frequency transformer, 4 is a rectifier circuit, 5 is a smoothing circuit, 6 is a load, 7 is a reference voltage generation circuit, 8 is an error amplifier, 9 is a phase compensation circuit, 10 is a triangular wave oscillation circuit, 11 is a pulse width modulation circuit, 12 is the driver, 1
3 is a multiplier. In addition, the same reference numerals are given to the same or corresponding parts in the figures.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 1次電源からの電力をスイツチングするスイツ
チング素子と、前記スイツチング素子の出力を整
流する整流回路と、前記整流回路の出力を平滑す
る平滑回路と、前記平滑回路の出力を基準電圧信
号と比較し負荷への供給電圧を制御するための信
号を発生する誤差増幅器と、上記1次電源の出力
及び上記誤差増幅器の出力とを乗算する乗算器と
、前記乗算器の出力及び三角波信号とによりパル
ス信号に変換して負荷への供給電圧の制御を行う
パルス幅変調回路と、前記パルス幅変調回路の出
力を電力増幅すると共に上記スイツチング素子を
制御するドライバとを備えたことを特徴とする直
流電源装置。
a switching element that switches power from a primary power source; a rectifier circuit that rectifies the output of the switching element; a smoothing circuit that smoothes the output of the rectifier circuit; an error amplifier that generates a signal for controlling the voltage supplied to the circuit; a multiplier that multiplies the output of the primary power source and the output of the error amplifier; A DC power supply device comprising: a pulse width modulation circuit that converts and controls a voltage supplied to a load; and a driver that amplifies the power of the output of the pulse width modulation circuit and controls the switching element.
JP3481086U 1986-03-11 1986-03-11 Pending JPS62149280U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3481086U JPS62149280U (en) 1986-03-11 1986-03-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3481086U JPS62149280U (en) 1986-03-11 1986-03-11

Publications (1)

Publication Number Publication Date
JPS62149280U true JPS62149280U (en) 1987-09-21

Family

ID=30843711

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3481086U Pending JPS62149280U (en) 1986-03-11 1986-03-11

Country Status (1)

Country Link
JP (1) JPS62149280U (en)

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