JPS62147366A - Frequency measuring circuit - Google Patents
Frequency measuring circuitInfo
- Publication number
- JPS62147366A JPS62147366A JP28883885A JP28883885A JPS62147366A JP S62147366 A JPS62147366 A JP S62147366A JP 28883885 A JP28883885 A JP 28883885A JP 28883885 A JP28883885 A JP 28883885A JP S62147366 A JPS62147366 A JP S62147366A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- counter
- output
- signal
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は周波数測定回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a frequency measurement circuit.
従来例を示す第2図において、3はフリップフロップ回
路、4はnビットカウンタ、5は2ビツトカウンタ、6
は周波数カウンタ、7はラッチ、8はリードオンリメモ
リを示す。被測定信号は、基準クロックによりフリップ
フロップ回路1により同期がとられる。被測定信号をク
ロックとするnビ・ソI−カウンタ4は、nビットに1
回キャリーが出力され、その信号が出力された時だけ周
波数カウンタ6は動作する。またフリップフロップ回路
3の出力をクロック入力とする2ビットカウンタ5は、
2ビツトに1回キャリー出力が出力し、そのキャリーの
出力の間に、基準クロックが何回入いるか周波数カウン
タ6でカウントし、その値をラッチ回路7にラッチし、
出力をアドレスとするリードオンリメモリ8で周波数の
値に変換し、測定する。この方法は、被測定信号の周波
数fXが基準クロックf rerより十分小さい時は有
効である。In FIG. 2 showing a conventional example, 3 is a flip-flop circuit, 4 is an n-bit counter, 5 is a 2-bit counter, and 6 is a flip-flop circuit.
is a frequency counter, 7 is a latch, and 8 is a read-only memory. The signal under test is synchronized by the flip-flop circuit 1 using a reference clock. The n-bi-so I-counter 4, which uses the signal under test as a clock, sets 1 to n bits.
The frequency counter 6 operates only when the carry signal is output. Furthermore, the 2-bit counter 5 which uses the output of the flip-flop circuit 3 as a clock input,
A carry output is output once every 2 bits, and the frequency counter 6 counts how many times the reference clock is input during the carry output, and the value is latched in the latch circuit 7.
The read-only memory 8, which uses the output as an address, converts it into a frequency value and measures it. This method is effective when the frequency fX of the signal under test is sufficiently smaller than the reference clock frer.
しかし、上述した従来の回路では、被測定信号の周波数
fxが基準タロツク周波数f rerに比べて十分小さ
くない時は、精度が悪くなり、周波数測定カウンタ6の
使用率はホさいという欠点があった。However, the above-mentioned conventional circuit has the disadvantage that when the frequency fx of the signal under test is not sufficiently smaller than the reference tally clock frequency frer, the accuracy deteriorates and the usage rate of the frequency measurement counter 6 is low. .
本発明は、被測定信号の周波数が基準クロックに比べて
、十分小さくない時は、被測定信号を周波数測定カウン
タの使用率の高くなるまで分周し、擬似被測定信号を作
り、基準クロックに比べて十分小さい信号を作成し、結
果的に被測定信号周波数を測定するものである。According to the present invention, when the frequency of the signal under test is not sufficiently small compared to the reference clock, the signal under test is frequency-divided until the usage rate of the frequency measurement counter becomes high, a pseudo signal under test is created, and the signal is used as the reference clock. This method creates a signal that is sufficiently small compared to the conventional one, and as a result measures the frequency of the signal under test.
〔実施例〕 次に、本発明について図面を参照して説明する。〔Example〕 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例を示す。第1図において、1
は分周器、2はセレクタ、3.は71717071回路
、4はnピッ1〜カウンタ、5は2ビットカウンタ、6
は周波数カウンタ、7はラッチ、8はリードオンリメモ
リである。分周器1は、被測定信号を同種類かの周波数
信号に分周し、その信号の1つが、セレクタ2によって
出力され、フリップフロップ回路3により基準タロツク
により同期がとられる。被測定信号をタロツクとするn
ビットカウンタ4は、周波数の測定間隔を決めn回に1
回のキャリー出力によりその出力が出た時のみ周波数カ
ウンタ6は動作する。また2ビツトカウンタ5は被測定
信号をタロツクとし、その2ビツトカウンタ5のキャリ
ー出力は被測定信号の1クロック分を示し2ピツ)〜カ
ウンタ5の出力により、周波数カウンタ6のスタートか
らスl〜ツブまでの時間が決まる。その時間の間に基準
クロックが何回カラン1−シたかを周波数カウンタ6は
カウントし、その値をラッチ7はラッチする。そのラッ
チ7の出力をアドレスとするリードオンリメモリ8は入
力のカウンタの値に対応する周波数の値を出力する。こ
の時、出力のiビットが、セレクタ2を制御し、カウン
タの値が小さい時、セレクタ2の出力の信号の分周比を
高くし、被測定信号周波数fXの値を基準タロツク周波
数f refに比して十分小さくし、同様に測定し精度
の高い測定を実現する。FIG. 1 shows an embodiment of the invention. In Figure 1, 1
2 is a frequency divider, 2 is a selector, 3. is a 71717071 circuit, 4 is an n-pitch 1~counter, 5 is a 2-bit counter, 6
is a frequency counter, 7 is a latch, and 8 is a read-only memory. A frequency divider 1 divides the signal under test into frequency signals of the same type, one of the signals is outputted by a selector 2, and synchronized by a flip-flop circuit 3 with a reference tarlock. n where the signal under test is tarokku
The bit counter 4 determines the frequency measurement interval and measures the frequency once every n times.
The frequency counter 6 operates only when that output is produced by the carry output. In addition, the 2-bit counter 5 uses the signal under test as a tarock, and the carry output of the 2-bit counter 5 indicates one clock of the signal under test. The time to reach the whelk is determined. The frequency counter 6 counts how many times the reference clock has cycled 1 during that time, and the latch 7 latches this value. The read-only memory 8 whose address is the output of the latch 7 outputs a frequency value corresponding to the input counter value. At this time, the i bit of the output controls the selector 2, and when the counter value is small, the frequency division ratio of the output signal of the selector 2 is increased, and the value of the measured signal frequency fX is set to the reference tally clock frequency f ref. It is made sufficiently small compared to the actual size and measured in the same way to achieve highly accurate measurements.
「発明の効果〕
本発明は被測定周波数を適当に分周し、高い精度で周波
数を測定することができる効果がある。[Effects of the Invention] The present invention has the advantage that the frequency to be measured can be appropriately divided and the frequency can be measured with high accuracy.
第1図は本発明の一実施例のブロック図、第2図は従来
例のブロック図である。
1・・・分周器、2・・・セレクタ、3・・・フリツア
フロ・・ノブ回路、4・・・nビットカウンタ、5・・
・2ビットカウンタ、6・・・周波数カウンタ、7・・
・う・・lチ、8・・・リードオンリメモリ、FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional example. 1... Frequency divider, 2... Selector, 3... Fritz Aflo knob circuit, 4... n-bit counter, 5...
・2-bit counter, 6... Frequency counter, 7...
・U...lchi, 8...Read-only memory,
Claims (1)
記分周器の出力の1本をセレクトするセレクタと、前記
セレクタの出力と基準クロックと同期をとるフリップフ
ロップ回路と、前記フリップフロップ回路の出力をカウ
ンタクロック入力とし、1回の測定と次の測定との間の
時間を決めるnビットカウンタと、前記フリップフロッ
プ回路の出力をカウンタクロック入力とし、周波数測定
のスタートとストップを決める2ビットカウンタと、前
記nビットカウンタのキャリー出力でクリア入力が制御
され、前記2ビットカウンタのキャリー出力でイネーブ
ル入力が制御され、基準クロックでカウンタクロックの
制御される周波数測定用カウンタと、前記カウンタの出
力をラッチするラッチ回路と、前記ラッチ回路の出力を
アドレスとし、カウンタの値により、前記セレクタを制
御する信号を出力し、また、カウンタ出力から周波数の
値に変換するリードオンリメモリより構成したことを特
徴とする周波数測定回路。a frequency divider that divides the frequency to be measured by several types of frequency division ratios; a selector that selects one of the outputs of the frequency divider; a flip-flop circuit that synchronizes the output of the selector with a reference clock; The output of the flip-flop circuit is used as a counter clock input to determine the time between one measurement and the next measurement, and the output of the flip-flop circuit is used as the counter clock input to start and stop frequency measurement. a 2-bit counter for determining a frequency, a clear input being controlled by a carry output of the n-bit counter, an enable input being controlled by a carry output of the 2-bit counter, and a frequency measuring counter having a counter clock controlled by a reference clock; Consists of a latch circuit that latches the output of the counter, and a read-only memory that uses the output of the latch circuit as an address, outputs a signal that controls the selector based on the counter value, and converts the counter output into a frequency value. A frequency measurement circuit characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28883885A JPS62147366A (en) | 1985-12-20 | 1985-12-20 | Frequency measuring circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28883885A JPS62147366A (en) | 1985-12-20 | 1985-12-20 | Frequency measuring circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62147366A true JPS62147366A (en) | 1987-07-01 |
Family
ID=17735399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28883885A Pending JPS62147366A (en) | 1985-12-20 | 1985-12-20 | Frequency measuring circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62147366A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6577072B2 (en) | 1999-12-14 | 2003-06-10 | Takion Co., Ltd. | Power supply and LED lamp device |
JP2006313727A (en) * | 2005-04-08 | 2006-11-16 | Toshiba Lighting & Technology Corp | Compact bulb type lamp |
JP2010086972A (en) * | 2005-04-08 | 2010-04-15 | Toshiba Lighting & Technology Corp | Self-ballasted lamp |
US8441612B2 (en) | 2009-06-30 | 2013-05-14 | Hitachi High-Technologies Corporation | LED light source, its manufacturing method, and LED-based photolithography apparatus and method |
JP2016156666A (en) * | 2015-02-24 | 2016-09-01 | 横河電機株式会社 | Frequency counter, and field apparatus incorporating frequency counter |
-
1985
- 1985-12-20 JP JP28883885A patent/JPS62147366A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6577072B2 (en) | 1999-12-14 | 2003-06-10 | Takion Co., Ltd. | Power supply and LED lamp device |
JP2006313727A (en) * | 2005-04-08 | 2006-11-16 | Toshiba Lighting & Technology Corp | Compact bulb type lamp |
JP2010086972A (en) * | 2005-04-08 | 2010-04-15 | Toshiba Lighting & Technology Corp | Self-ballasted lamp |
JP2010086973A (en) * | 2005-04-08 | 2010-04-15 | Toshiba Lighting & Technology Corp | Self-ballasted lamp |
US8441612B2 (en) | 2009-06-30 | 2013-05-14 | Hitachi High-Technologies Corporation | LED light source, its manufacturing method, and LED-based photolithography apparatus and method |
JP2016156666A (en) * | 2015-02-24 | 2016-09-01 | 横河電機株式会社 | Frequency counter, and field apparatus incorporating frequency counter |
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