JPS6214460B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for detecting thread knots and thread breaks.

When yarn is continuously supplied to a knitting machine, if the yarn breaks, the knitting yarn must be stopped. The thread may also have a knot.

If there are knots, it is better to reduce the speed of the knitting machine. If you knit at the same speed, thread breakage is likely to occur.

Conventionally, only yarn breakage was detected.

In other words, a thread was passed between the light receiver and the light emitter, and an increase in the absolute value of the amount of light received was detected, and this was used as a thread breakage signal.

However, this method can only detect thread breaks. What is desired is something that can also detect knots.

A knot only momentarily reduces the amount of light received, but the amount of light received returns to its original level immediately. Therefore, it is difficult to simply track increases and decreases in the absolute value of the amount of received light.

The present invention distinguishes thread breaks and knots by differentiating the amount of received light and detecting whether the differentiation is positive or negative. In the case of a knot, a negative pulse and a positive pulse appear consecutively, but when the first pulse is detected, a knot signal is simultaneously output and the positive pulse is prohibited from being input to the output holding circuit.

This way, you won't confuse a knot with a thread break.

Hereinafter, the configuration, operation, and effects of the present invention will be explained with reference to the drawings.

FIG. 1 is an electronic circuit system diagram showing the configuration of the present invention.

The yarn abnormality detection device of the present invention includes a detector 1, a differentiation circuit 2, an amplifier 3, an upper limit comparator 4, a lower limit comparator 5,
It consists of an A output holding circuit 6, a B output holding circuit 7, etc.

The detector 1 has a light projecting section 8 and a light receiving section 9 facing each other.

The thread 10 is sent to pass between the light projecting section 8 and the light receiving section 9.

Abnormal conditions such as thread breakage M and knot N may occur in the thread 10. Two abnormalities M and N are detected by a combination of a light projecting section 8 and a light receiving section 9.

If there is a thread breakage M, the amount of light received will increase.

When knot N is reached, the amount of light received drops for a moment.

The light projecting section 8 can use any light emitting body such as a light emitting diode, a laser, or a lamp.

The light receiving section 9 includes a photodiode, a phototransistor, an avalanche diode, a photocell,
Use an appropriate light-receiving element such as a phototube or photomultiplier tube.

Differentiator circuit 2 differentiates detector signal a. If the thread is normal, the output of the differential circuit is a constant value.

FIG. 2 shows signal waveforms for thread breakage M, and FIG. 3 shows signal waveforms for knot N.

In the case of thread breakage, the detector signal a increases stepwise. In the case of a knot, the detector signal a drops momentarily and quickly recovers.

Amplifier 3 amplifies the output of differential circuit 2.

In the case of thread breakage, the amplifier signal b becomes one sharp positive pulse. In the case of a knot, a negative pulse appears first, followed by a positive pulse.

The upper limit comparator 4 discriminates whether the voltage V of the signal b of the amplifier 3 is above or below a certain upper limit voltage Vu.

If V<Vu, the output signal c of the upper limit comparator 4 is "0".

Conversely, when V>Vu, the comparator output signal c is "1" (high voltage).

The lower limit comparator 5 detects that the output voltage V of the amplifier is V＞Vw When , the comparator output d becomes “0”, V＜Vw When this happens, the comparator output d becomes "1".

In other words (i) When V>Vu c=1, d=0 (ii) When Vu>V>Vw c=0, d=0 (iii) When Vw>V c=0, d=1 becomes.

(ii) is normal. (i) corresponds to thread breakage. In the case of a knot, (iii) and (i) appear successively.

Waveforms c and d in FIGS. 2 and 3 show this.

When the outputs c and d of the upper and lower limit comparators 4 and 5 are "0", the A and B output holding circuits 6 and 7 hold the outputs e and f.
Give “0” to

When the comparator output is "1", the output holding circuits 6 and 7 output "1" to outputs e and f, and hold this state for a certain period of time.

This is displayed as a thread breakage signal or a knot signal, or is designed to give an alarm. In the case of thread breakage, the operation of the device is often automatically stopped.

In the case of knots, the speed of the interlacing machine should be reduced, for example, by about 0.5 seconds to 2 seconds.

The two output holding circuits 6 and 7 are provided with priority circuits 11 so as to cross each other, and when the output e or f of either one reaches "1", signal input to the other output holding circuit is prohibited. It is becoming more and more like this.

In case of thread breakage, since V>Vu, upper limit comparator 4
The output c produces a sharp pulse. Therefore, the output e of the A output holding circuit 6 generates a thread breakage signal pulse having a constant time width.

In the case of knots, as shown in Figure 3 c and d,
A pulse output is generated at the lower limit comparisons 4 and 5, but first the B output holding circuit 7 outputs an output signal f=1. As a result, input to the A output holding circuit 6 is prohibited, and the output e=0 is maintained. No pulse appears at the output e (indicated by a dash-dot line).

f=1 is a knot signal.

In this way, abnormalities in the thread, ie, thread breaks and knots, can be detected.

An embodiment will be explained with reference to FIG.

The light emitting diode 12 is connected to the power supply via the resistor 13.
It is connected between Vcc and earth E and emits light of a constant intensity. This corresponds to the light projecting section 8.

The anode side of the photodiode 14 is grounded via a resistor 15, a capacitor 16, and a capacitor 17. The cathode of photodiode 14 is directly grounded. This corresponds to the light receiving section 9.

Photodiode 14 detects the intensity of the light from light emitting diode 12 as it passes through the thread. Here, the photodiode 14 generates an electromotive force depending on the light intensity.

Of course, the photodiode may be used in reverse bias.

The junction of capacitors 16 and 17 is connected to a non-inverting input 19 of an amplifier 18.

Resistors 20 and 21 determine the reference voltage Vr of amplifier 18.

Vr=1/2Vcc It is convenient to decide.

Reference voltage Vr is applied to input 19 of amplifier 18 via resistor 22.

The inverting input 23 is connected to the amplifier output via a feedback resistor 24. The inverting input 23 is connected to ground via a resistor 25, a capacitor 26, and a capacitor 27.

The capacitor 16 and the resistor 22 constitute a differentiating circuit 2.

Since the inverting input 23 is cut off in terms of direct current by the capacitor 26, it becomes a voltage follower in terms of direct current. In other words, photodiode 14
When the output of is unchanged, the voltage at output 28 is equal to the voltage at non-inverting input 19. Outputs reference voltage Vr.

In terms of AC, it functions as an amplifier, and the amplification factor is determined by the ratio of the resistors 24 and 25. In this example, it is set to 70dB.

When the electromotive force of the photodiode 14 fluctuates,
It is differentiated by a capacitor 16 and a resistor 22, enters a non-inverting input, is amplified, and appears at an output 28.

Output 28 is the non-inverting input 3 of amplifiers 29, 30
1. Connected to inverting input 32.

The amplifiers 29 and 30 are used as comparators without any feedback resistance. Upper limit voltage Vu and lower limit voltage Vw of upper limit comparators 4 and 29 and lower limit comparators 5 and 30
is applied by dividing Vcc by series resistors 33, 34, and 35.

In this example, Vcc=12V, Vu=9V, and Vw=3V.

Output terminals 36, 37 of amplifiers 29, 30 are input to clock terminals T of flip-flops 38, 39.

The flip-flop has the output of Q, and the output of R, S,
It has D input terminals.

Explain part of the truth table.

Since the S input is grounded, only S=0 will be discussed.

When R=1, regardless of D, Q=0,=
It is 1.

When R=0, when a clock pulse is input (i) If D=0, then Q=0,=1. (ii) If D=1, then Q=1,=0.

The outputs of flip-flops 38 and 39 are connected to the other D input. This is the priority circuit 1 mentioned above.
Corresponds to 1.

The Q outputs of flip-flops 38 and 39 are connected through resistors 40 and 41 to the bases of transistors 42 and 43. The bases of transistors 42 and 43 are protected by resistors 44 and 45.

The anodes of diodes 46 and 47 perform the sum operation of the Q outputs of flip-flops 38 and 39. The cathodes of a resistor 48 and a diode 50 are connected to both cathodes. One end of the capacitor 51 is connected to the anode of the diode 50 and the other end of the resistor 48, and the other end is grounded.

Resistor 48 and capacitor 51 constitute a timing circuit, and this node voltage is connected to non-inverting input 53 of amplifier 52.

The inverting input 54 is supplied with a reference voltage Vr.

In the above configuration, the operation will be explained.

If there is no abnormality in the thread, the output of the photodiode 14 is constant, the non-inverting input 19 of the amplifier 18 is equal to the reference voltage Vr (6V in this example), and the output 28
It has also become VR.

Since this is larger than Vw and smaller than Vn, the outputs of amplifiers 29 and 30 are both "0".

At this time, Q=0, D=1, and R=0. Unless a pulse is input to the T input terminal (clock), Q=
Keep 0. Then, both transistors 42 and 43 are non-conductive. There is no abnormal signal.

When there is a thread breakage M, the electromotive force of the photodiode 14 increases, and a positive pulse differentiated by the capacitor 16 is amplified by the amplifier 18.

Since the voltage V at the output 28 exceeds the upper limit voltage Vu, the output 36 of the amplifier (comparator) 29 produces a positive pulse, which causes the T of the flip-flop 38 to rise.
Enter the input terminal.

Since R=0 and D=1, the flip-flop 38 changes to Q=1=0 by the clock. Transistor 42 becomes conductive.

= 0, the D input of the other flip-flop 38 is set to 0 through the priority circuit 11.

Since the transistor 42 is conductive, the yarn breakage condition is displayed externally, or an alarm is generated or the knitting machine is stopped.

On the other hand, since Q=1, the capacitor 51 is charged through the diode 46 and the resistor 48. The potential of the capacitor 51 gradually increases and eventually reaches the reference voltage.
Exceeds Vr (6V in this example).

Since the non-inverting input 53 of amplifier 52 exceeds the inverting input 54, the output 55 of amplifier 52 goes from "0" to "1".

Then, the R input becomes "1". Flip-flops 38 and 39 have Q=0, =
It becomes 1. In other words, it will be reset.

The thread breakage signal also ends. The signal retention time t depends on the values of the resistor 48 and capacitor 51.

= 1, so return to D = 1.

Since Q=0, the anode voltages of diodes 46 and 47 decrease. The charge on the capacitor 51 is instantaneously discharged via the shorting diode 50 and the resistor 49.

Since the non-inverting input 53 of the amplifier 52 goes down, the output 55 also instantaneously changes to "0". In other words, R=“0”
Return to Since D=1, the next clock input can be received.

When knot N is reached, amplifier 18 first produces a negative pulse and then a positive pulse.

The amplifier 30 (comparator) first gives a pulse to the flip-flop 39 (corresponding to the B output holding circuit 7).

The output Q of the flip-flop 39 becomes "1" and the transistor 43 becomes conductive. A knot signal is emitted.

= 0, so the other flip-flop 3
The D input of No. 8 becomes "0". As mentioned earlier, D
Even if a clock pulse is input to the flip-flop 38 when Q = 0, it will only result in Q = 0 and = 1. In other words, it remains as it was. In fact, a clock pulse is applied to the T input terminal of flip-flop 38 with a slight delay, but Q remains unchanged.

Similarly, after a certain period of time, the potential of the capacitor 51 rises, and the R input becomes R=1 by the amplifier 52, and is reset.

Then the knot signal disappears and Q=0,=1
Then, D=1 and R=0 are returned.

The same procedure is repeated below.

As explained above in detail, the present invention differentiates the signal from the detector, inputs it into the upper and lower limit comparators, discriminates between yarn breaks and knots, and transfers the signal from the circuit that initially held the output to the other output holding circuit. and stops the movement of the other circuit.

It is extremely convenient because it can detect not only thread breaks but also knots.

In this example, the priority circuit 11 is constructed by applying it to the D input of a flip-flop. but,
Even if the flip-flop is simply a JK flip-flop or a simple R-S flip-flop, a gate circuit (NAND, NOR, OR, AND) is inserted in the front stage of the flip-flop, and the output Q or output of the other flip-flop is input to the gate circuit. good.

In this example, the amplifier 3 is provided after the differentiating circuit 2, but an amplifier may also be provided before the differentiating circuit. The photodiode 14 may be used with its anode and cathode reversed and reverse biased. This way the response speed is faster.

[Brief explanation of the drawing]

FIG. 1 is an electronic circuit system diagram showing the configuration of the present invention.
FIG. 2 is an output waveform diagram of each element in response to thread breakage. FIG. 3 is an output waveform diagram of each element for a knot. Fourth
The figure is a circuit diagram showing an embodiment. 1...Detector, 2...Differential circuit, 3...Amplifier, 4...
Upper limit comparator, 5... Lower limit comparator, 6... A output holding circuit, 7... B output holding circuit, 8... Light emitting section, 9... Light receiving section, 10... Thread, 11... Priority circuit.

Claims (1)

[Claims] 1. A detector 1 consisting of a light projecting section 8 and a light receiving section 9, which are provided to sandwich the path of the thread 10; a differentiating circuit 2 that differentiates the output of the detector 1; an amplifier 3 that amplifies the output of the differentiating circuit; an upper limit comparator 4 which compares the output of the amplifier 3 with the upper limit voltage Vu and outputs an output when the former is larger than the latter; compares the output of the amplifier 3 with the lower limit voltage Vw and outputs an output when the former is smaller than the latter a lower limit comparator 5; an A output holding circuit 6 that holds the output of the upper limit comparator 4 for a certain period of time and outputs a signal indicating the breakage M of the thread 10; and an A output holding circuit 6 that holds the output of the lower limit comparator 5 for a certain period of time and A B output holding circuit 7 outputs a signal indicating the knot N of the thread 10; priority is given to inhibiting the output change of the other output holding circuit by the output holding signal of either one of the A output holding circuit 6 and the B output holding circuit 7; A yarn abnormality detection device characterized by comprising a circuit 11.