JPS62144387A - Semiconductor light-emitting device - Google Patents
Semiconductor light-emitting deviceInfo
- Publication number
- JPS62144387A JPS62144387A JP60286231A JP28623185A JPS62144387A JP S62144387 A JPS62144387 A JP S62144387A JP 60286231 A JP60286231 A JP 60286231A JP 28623185 A JP28623185 A JP 28623185A JP S62144387 A JPS62144387 A JP S62144387A
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- active layer
- layer
- approximately
- superlattice structure
- energy level
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Abstract
Description
【発明の詳細な説明】
〔概要〕
この発明は、活性層より伝導帯下端が高エネルギー準位
でかつ価電子帯上端が低エネルギー準位である条件に該
当する半導体層によるダブルへテロ接合構造が従来不可
能乃至困難な半導体発光装置の改善にかかり、
前記条件に該当せずかつ少なくとも一つのキャリアに関
して量子力学的井戸形ポテンシャルとして機能する半導
体層により超格子構造を形成して、電子の最低のエネル
ギー準位を活性層の伝導帯下端のエネルギー準位より高
くすること、或いは正孔の最高のエネルギー準位を活性
層の価電子帯上端のエネルギー準位より低くすることの
少なくとも一つを実現し、かつ該超格子構造内の電子と
正孔とのエネルギー準位差を該活性層の禁制帯幅より大
きくすることにより、
電子及び正孔の閉じ込めを可能とし、闇値電流密度、温
度特性等を改善するものである。[Detailed Description of the Invention] [Summary] The present invention provides a double heterojunction structure using a semiconductor layer that satisfies the conditions that the lower end of the conduction band is at a higher energy level and the upper end of the valence band is at a lower energy level than the active layer. In order to improve semiconductor light emitting devices, which was previously impossible or difficult to achieve, a superlattice structure is formed using a semiconductor layer that does not meet the above conditions and functions as a quantum mechanical well potential with respect to at least one carrier. at least one of making the energy level of the hole higher than the energy level of the bottom of the conduction band of the active layer, or making the highest energy level of the hole lower than the energy level of the top of the valence band of the active layer. By realizing this and making the energy level difference between electrons and holes in the superlattice structure larger than the forbidden band width of the active layer, it is possible to confine electrons and holes, and the dark value current density, temperature It improves the characteristics etc.
本発明は半導体発光装置、特に通常のダブルへテロ接合
によるキャリア閉じ込めが困難乃至不可能な活性層につ
いて、キャリア閉じ込めが実現される半導体発光装置に
関する。The present invention relates to a semiconductor light emitting device, and particularly to a semiconductor light emitting device in which carrier confinement is achieved in an active layer in which carrier confinement using a normal double heterojunction is difficult or impossible.
例えばガス検知システムなどに長波長の赤外線光源が必
要とされるが、この帯域の従来の半導体発光装置はキャ
リア閉じ込めの問題が残されており、これを解決して闇
値電流密度等の特性改善を実現することが要望されてい
る。For example, long-wavelength infrared light sources are required for gas detection systems, but conventional semiconductor light-emitting devices for this band still have the problem of carrier confinement, which can be solved to improve characteristics such as dark value current density. It is desired to realize this.
従来行われている半導体発光装置の多くは、目的とする
光の波長に対応する禁制帯幅を有する活性層を、これよ
り禁制帯幅が大きく屈折率が小さいクラッド層で挟んだ
ダブルへテロ接合構造によって、キャリア及び光の閉し
込めを行っている。Most conventional semiconductor light-emitting devices use a double heterojunction, in which an active layer with a forbidden band width corresponding to the target wavelength of light is sandwiched between cladding layers with a larger forbidden band width and a lower refractive index. The structure confines carriers and light.
すなわら例えば第3図に例示する如く、石英系ファイバ
を伝送路とする光通信システムの光源とする波長1.3
〜1.55μm程度の帯域の半導体レーザにおいて、そ
の活性層Aにインジウムガリウム砒素燐(In+−Ja
xAsxP 1−X)、クラッド層Cにインジウム燐(
InP)を用いて、ギヤリアを活性層Aに閉じ込めるバ
リアを、電子については伝導帯下端のエネルギー準位差
、正孔については価電子帯上端のエネルギー準位差によ
って形成している。In other words, for example, as illustrated in FIG.
In a semiconductor laser with a band of about 1.55 μm, the active layer A is made of indium gallium arsenide phosphorus (In+-Ja
xAsxP 1-X), indium phosphorus (
Using InP), a barrier that confines the gear in the active layer A is formed by an energy level difference at the bottom of the conduction band for electrons and an energy level difference at the top of the valence band for holes.
これに対して、アンモニア(NH:1)、メタン(CH
4)等の検知のためにその赤外吸収スペクトルに対応す
る波長8μm程度の帯域の光源とする半導体発光装置に
おいては、従来例えば第4図(alに例示する如く、そ
の活性層Aに鉛錫テルル(Pbo、 9SnQ、 1T
e)、クラッド層Cに鉛テルル(PbTe)が用いられ
ている。On the other hand, ammonia (NH:1), methane (CH
In a semiconductor light-emitting device using a light source with a wavelength band of about 8 μm corresponding to its infrared absorption spectrum for detection of Tellurium (Pbo, 9SnQ, 1T
e) Lead tellurium (PbTe) is used for the cladding layer C.
この構成によれば、正孔については価電子帯上端のエネ
ルギー準位差によってクラッド層Cがバリアとなるが、
伝導帯下端はInGaAsP/InP系とは反対にPb
TeがPbo、 9sno、 +Teより低くなり、電
子についてはバリアが形成されず閉じ込め効果が得られ
ない。この結果、一応レーザ発振状態に到達可能ではあ
るが、無効電流、闇値電流密度、温度上昇が大きいなど
、その特性に問題点が多い。According to this configuration, the cladding layer C acts as a barrier for holes due to the energy level difference at the top of the valence band.
The lower end of the conduction band is Pb, contrary to the InGaAsP/InP system.
Te is lower than Pbo, 9sno, +Te, and no barrier is formed for electrons, resulting in no confinement effect. As a result, although it is possible to reach a laser oscillation state, there are many problems with its characteristics, such as a large reactive current, dark value current density, and a large temperature rise.
更にもし活性層AにPbo、 tssno、 zsTe
、、クラッドlcにPbTeを用いるならば、第4図(
blに例示する如く活性層Aの価電子帯上端はクラッド
層Cの伝蔦導帯下端より上となり、電子、正孔の双方に
ついてバリアが形成されなくなる。Furthermore, if active layer A contains Pbo, tssno, zsTe
,, If PbTe is used for the cladding lc, Fig. 4 (
As illustrated in bl, the upper end of the valence band of the active layer A is above the lower end of the conduction band of the cladding layer C, and no barrier is formed for both electrons and holes.
〔発明が解決しようとする問題点]
半導体発光装置の活性層とクラッド層のダブルへテロ接
合構造には、組成が僅かに異なる組み合わせが従来一般
に用いられている。この構成は、結晶構造、禁制帯幅、
光学的性質等の組み合わせ選択に最も当然な方法であり
、上述の如(InGaAsP/InP、 GaAs/A
lGaAs系等の多くのI[I −V族化合物半導体祠
料について、目的とするキャリアの閉じ込め等の効果が
実現している。[Problems to be Solved by the Invention] For the double heterojunction structure of an active layer and a cladding layer of a semiconductor light emitting device, combinations having slightly different compositions have been generally used. This configuration is based on the crystal structure, forbidden band width,
This is the most natural method for selecting combinations of optical properties, etc., as described above (InGaAsP/InP, GaAs/A
For many I[I-V group compound semiconductor abrasive materials such as IGaAs-based materials, the desired effects such as carrier confinement have been achieved.
しかしながら先に例示したPb5nTe/PbTe等に
ついては、この様に組成が僅かに異なる組み合わせのダ
ブルへテロ接合構造では、キャリアの少なくとも一方に
ついてバリアが形成されないために闇値電流密度、変換
効率、温度特性等が低下しており、その改善が強く要望
されている。However, in the case of Pb5nTe/PbTe, etc., as exemplified above, in a double heterojunction structure with a combination of slightly different compositions, a barrier is not formed for at least one of the carriers, so dark value current density, conversion efficiency, temperature characteristics, etc. etc., and there is a strong demand for improvement.
C問題点を解決するための手段〕
前記問題点は、活性層より伝導帯下端か高エネルギー準
位でかつ価電子帯上端が低エネルギー準位である条件に
該当せず、かつ少なくとも一つのキャリアに関して量子
力学的井戸形ポテンシャルとして機能する半導体層によ
って構成される超格子構造を該活性層の上下に備えて、
該超格子構造の各半導体層における電子と正孔とのエネ
ルギー準位差力q亥活性層の禁制帯幅より大きく、かつ
該超格子構造により少なくとも一つのキャリアの該活性
層への閉じ込めが行われる本発明による半導体発光装置
により解決される。Means for Solving Problem C] The above problem is that the lower end of the conduction band is at a higher energy level than the active layer, and the upper end of the valence band is at a lower energy level, and at least one carrier A superlattice structure constituted by a semiconductor layer functioning as a quantum mechanical well potential with respect to the active layer is provided above and below the active layer,
The energy level difference force q between electrons and holes in each semiconductor layer of the superlattice structure is larger than the forbidden band width of the active layer, and the superlattice structure confines at least one carrier in the active layer. This problem is solved by a semiconductor light emitting device according to the present invention.
本発明によれば、活性層より伝導帯下端が高エネルギー
準位でかつ価電子帯上端が低エネルギー準位である条件
に該当せず、従来通常行われているダブルへテロ接合構
造では電子、正孔双方の閉じ込めが不可能な半導体制料
で、量子井戸形超格子構造を形成して少なくとも一つの
ギヤリアの活性層への閉じ込めを行う。この超格子構造
は、少なくとも電子について量子井戸形ポテンシャルと
なる半導体層と少なくとも正孔について量子井戸形ポテ
ンシャルとなる半導体層とで構成する。According to the present invention, the condition that the lower end of the conduction band is at a higher energy level than the active layer and the upper end of the valence band is at a lower energy level does not apply, and in the conventional double heterojunction structure, electrons, A quantum well type superlattice structure is formed using a semiconductor material in which it is impossible to confine both holes, and confinement is performed in the active layer of at least one gear. This superlattice structure is composed of a semiconductor layer that has a quantum well type potential at least for electrons and a semiconductor layer that has a quantum well type potential for at least holes.
電子について量子井戸形ポテンシャルとする半導体層で
は、電子の最低エネルギー準位、すなわら電子の基底状
態のサブバンドの準位又は厚さが極めて小さくサブハン
ドが形成されない場合ばバリアの準位と価電子帯上端と
のエネルギー準位差、また正孔について量子井戸形ポテ
ンシャルとする半導体層では正孔の同様な最高エネルギ
ー準位と伝導帯下端とのエネルギー準位差を活性層の禁
制帯幅より大きくし、この超格子構造内におけるキャリ
アの再結合を防止する。In a semiconductor layer with a quantum well type potential for electrons, the lowest energy level of the electron, that is, the level of the subband of the ground state of the electron, or the level of the barrier if the thickness is extremely small and no subhand is formed. The energy level difference between the top of the electron band and the bottom of the conduction band, and the energy level difference between the highest energy level of the hole and the bottom of the conduction band in a semiconductor layer with a quantum well potential for holes, can be calculated from the forbidden band width of the active layer. to prevent carrier recombination within this superlattice structure.
前記の電子の最低エネルギー準位が活性層の伝導帯下端
のエネルギー準位より高い構造とすれば電子が活性層に
閉じ込められ、また正孔の最高エネルギー準位が活性層
の価電子帯上端のエネルギー準位より低い構造とすれば
正孔が活性層に閉じ込められる。If the structure is such that the lowest energy level of electrons is higher than the energy level at the bottom of the conduction band of the active layer, electrons will be confined in the active layer, and the highest energy level of holes will be at the top of the valence band of the active layer. If the structure is lower than the energy level, holes will be confined in the active layer.
以下本発明を実施例により具体的に説明する。 The present invention will be specifically explained below using examples.
第1図(a)は本発明の第1の実施例を示す模式側断面
図、同図(blばそのエネルギー準位を示す図である。FIG. 1(a) is a schematic side sectional view showing a first embodiment of the present invention, and FIG. 1(a) is a diagram showing the energy level thereof.
同図において、1はp型PbTe基板、2はn型PbT
e層、3及び5はPI)o、 qsno、 +Te層3
a又は5aとPbo、 tssno、 2STE1層3
b又は5bとからなる超格子構造、4はPb0. 、S
no、 1Te活性層、6はn型PbTe層、7はn型
PbTe埋め込み層、11は例えばPbTeの陽極酸化
膜からなる絶縁層、12はn側電極、13はp側電極で
ある。In the figure, 1 is a p-type PbTe substrate, 2 is an n-type PbT substrate.
e layer, 3 and 5 are PI) o, qsno, +Te layer 3
a or 5a and Pbo, tssno, 2STE1 layer 3
b or 5b, 4 is Pb0. , S
1Te active layer, 6 an n-type PbTe layer, 7 an n-type PbTe buried layer, 11 an insulating layer made of, for example, an anodic oxide film of PbTe, 12 an n-side electrode, and 13 a p-side electrode.
半導体層2乃至6は例えば分子線エビタギシャル成長方
法(MBE法)によってPbTe1板1上に順次成長さ
れ、n型PbTe層2は不純物温度約2×10101B
”、厚さ約3μmとし、超格子構造3はノンドープとし
、全体の厚さ0.3〜0.5μm程度で、例えばpbo
、 qsno、 +Te層3aを厚さ約10nmXPb
o、 7ssno、zsTe層3bを厚ざ約5 nmと
している。またPb@、 qsno、 4e活性層4は
ノンドープで厚さを約0.5μmとし、超格子構造5は
超格子構造3を反転した順序で同様に構成し、n型Pb
Te層6は不純物温度約3 XIO”cm3、厚さ約2
μmとしている。The semiconductor layers 2 to 6 are sequentially grown on the PbTe1 plate 1 by, for example, the molecular beam epitaxy method (MBE method), and the n-type PbTe layer 2 has an impurity temperature of about 2×10101B.
", the thickness is about 3 μm, the superlattice structure 3 is non-doped, the total thickness is about 0.3 to 0.5 μm, for example, pbo
, qsno, +Te layer 3a with a thickness of about 10 nmXPb
o, 7ssno, zsTe layer 3b has a thickness of approximately 5 nm. In addition, the Pb@, qsno, 4e active layer 4 is non-doped and has a thickness of about 0.5 μm, and the superlattice structure 5 is constructed in the same manner as the superlattice structure 3 in reverse order, and is made of n-type Pb
The Te layer 6 has an impurity temperature of about 3XIO”cm3 and a thickness of about 2
It is expressed as μm.
本実施例のPbo、 qsno、 +Te活性層に対し
てPbTe層は伝導帯下端が約40meν(温度77K
)低くて先に述べた如く電子閉じ込め効果が無いが、P
bo、 7ssno。In contrast to the Pbo, qsno, +Te active layers of this example, the conduction band bottom of the PbTe layer is approximately 40 meν (temperature 77K).
) is low and there is no electron confinement effect as mentioned earlier, but P
bo, 7ssno.
z5Te層は伝導帯下端が約60meV高く、これをバ
リア層とするpb、、 qsno、 、Te量子井戸層
では電子の基底状態のサブハンドのエネルギー準位が図
示の如く活性層の伝導帯下端より高くなり、この超格子
構造3.5により電子閉じ込め効果が得られる。The conduction band bottom of the z5Te layer is about 60 meV higher, and in the pb, qsno, Te quantum well layer using this as a barrier layer, the subhand energy level of the electron ground state is higher than the conduction band bottom of the active layer as shown in the figure. This superlattice structure 3.5 provides an electron confinement effect.
また本実施例の正孔の閉じ込め効果は、Pb0. qS
no、 4e活性層に対して価電子帯上端が約90me
V低いPbTe層2.6によって得られる。Moreover, the hole confinement effect of this example is as follows: Pb0. qS
No, the top of the valence band is about 90me for the 4e active layer
Obtained by a low V PbTe layer 2.6.
なお、Pbo、 tssno、 z5Te層は禁制帯幅
が約80meνと狭いが、正孔についてPbo、 、s
no、 1T6層をパ・、17層とする量子井戸を構成
してその最高エネルギー準位をバリア層の伝導帯下端の
エネルギー準位とし、伝導帯下端とのエネルギー準位差
を活性層の禁制帯幅より大きくして、この層でキャリア
再結合が発生することを防止している。Note that the forbidden band width of the Pbo, tssno, z5Te layer is as narrow as about 80 meν, but for holes Pbo, , s
No. A quantum well is constructed with 1T6 layers as 17 layers, and its highest energy level is the energy level at the lower end of the conduction band of the barrier layer, and the energy level difference with the lower end of the conduction band is the upper limit of the active layer. This layer is made larger than the band width to prevent carrier recombination from occurring in this layer.
次に第2図は本発明の第2の実施例のエネルギー準位を
示す図である。同図において、2はn型PbTe層、3
A及び5Aは5nTe層3c又は5cとPbTe層3d
又は5dとからなる超格子構造、4はPbo、 qsn
o、 4e活性層、6ばn型PbTe層である。Next, FIG. 2 is a diagram showing energy levels of a second embodiment of the present invention. In the same figure, 2 is an n-type PbTe layer, 3
A and 5A are 5nTe layer 3c or 5c and PbTe layer 3d
or a superlattice structure consisting of 5d, 4 is Pbo, qsn
o, 4e active layer, and 6ban type PbTe layer.
本実施例と前記実施例との差は、超格子構造を構成する
半導体層が5nTe層3c又は5cとPbTe層3d又
は5dとなっていることである。Pbo、 qsno、
+Te活性層の禁制帯に対して、5nTe層の禁制帯
は蟲かに高準位にあり、PbTe層の禁制帯は僅かに低
準位にあって、この超格子構造によりPbTe層におけ
る電子の基底状態のサブハンドのエネルギー準位を活性
層の伝導帯下端より高< 、5nT4における正孔の基
底状態のサブバンドのエネルギー準位を活性層の価電子
帯上端のエネルギー準位より低くして、前記第1の実施
例より更に優れた電子及び正孔の閉し込め効果を得てい
る。The difference between this example and the previous example is that the semiconductor layers constituting the superlattice structure are a 5nTe layer 3c or 5c and a PbTe layer 3d or 5d. Pbo, qsno,
Compared to the forbidden band of the +Te active layer, the forbidden band of the 5nTe layer is at an extremely high level, and the forbidden band of the PbTe layer is at a slightly lower level, and due to this superlattice structure, the electrons in the PbTe layer are The energy level of the ground state sub-hand is higher than the lower end of the conduction band of the active layer, and the energy level of the hole ground state sub-band in 5nT4 is lower than the energy level of the upper end of the valence band of the active layer. An even better electron and hole confinement effect than the first embodiment is obtained.
以上説明した如く本発明によれば、活性層より伝導帯下
端が高エネルギー準位でかつ価電子帯上端が低エネルギ
ー準位である条件に該当する半導体層を用いて、ダブル
へテロ接合を形成することが困難乃至不可能である場合
にも、電子及び正孔を活性層或いはその近傍に閉じ込め
ることが可能となり、闇値電流密度、変換効率、温度特
性等の特性向上を達成することができる。As explained above, according to the present invention, a double heterojunction is formed using a semiconductor layer that satisfies the conditions that the lower end of the conduction band is at a higher energy level and the upper end of the valence band is at a lower energy level than the active layer. Even when it is difficult or impossible to confine electrons and holes in the active layer or its vicinity, it is possible to improve properties such as dark value current density, conversion efficiency, and temperature characteristics. .
第1図(alは本発明の第1の実施例の模式側断面図、
第1図(b)はそのエネルギー準位を示す図、第2図は
本発明の第2の実施例のエネルギー準位を示す図、
第3図はInGaAsP/ InP系レーザのエネルギ
ー準位を示す図、
第4図(a)、(b)は従来のPb5nTe/I’bT
e系レーザのエネルギー準位を示す図である。
図において、
1はp型PbTe3板、 2はn型PbTe層、
3.3A、5及び5Aは超格子構造、
3a及び5aはPbo、 qSno、 +Te層、3b
及び5bはPbo、 7ssno、 2sTe層、3c
及び5cば5nTei、
3d及び5dはPbTe層、
4はPbo、 Jno、 +Te活性層、6はn型Pb
Te層、7はn型PbTe埋め込み層、11は絶縁層、
12はn側電極、 13はn側電極を示す。
茅10Cb)
華2の実騰餘flJO)工寥ルギニ渾4ゲE才・W口年
20FIG. 1 (al is a schematic side sectional view of the first embodiment of the present invention, FIG. 1(b) is a diagram showing its energy level, and FIG. 2 is a diagram showing the energy level of the second embodiment of the present invention. Figure 3 is a diagram showing the energy levels of InGaAsP/InP lasers. Figure 4 (a) and (b) are conventional Pb5nTe/I'bT lasers.
FIG. 2 is a diagram showing energy levels of an e-based laser. In the figure, 1 is a p-type PbTe3 plate, 2 is an n-type PbTe layer,
3.3A, 5 and 5A are superlattice structures, 3a and 5a are Pbo, qSno, +Te layers, 3b
and 5b is Pbo, 7ssno, 2sTe layer, 3c
and 5c is 5nTei, 3d and 5d are PbTe layers, 4 is Pbo, Jno, +Te active layer, 6 is n-type Pb
Te layer, 7 is an n-type PbTe buried layer, 11 is an insulating layer,
12 represents an n-side electrode, and 13 represents an n-side electrode. Kaya 10Cb) Hana 2 fruit rise fl JO) Technique Lugini 4 game E/W mouth year 20
Claims (1)
電子帯上端が低エネルギー準位である条件に該当せず、
かつ少なくとも一つのキャリアに関して量子力学的井戸
形ポテンシャルとして機能する半導体層によって構成さ
れる超格子構造を該活性層の上下に備えて、該超格子構
造の各半導体層における電子と正孔とのエネルギー準位
差が該活性層の禁制帯幅より大きく、かつ該超格子構造
により少なくとも一つのキヤリアの該活性層への閉じ込
めが行われることを特徴とする半導体発光装置。 2)前記超格子構造における電子の最低のエネルギー準
位が前記活性層の伝導帯下端のエネルギー準位より高く
、電子の該活性層への閉じ込めが行われることを特徴と
する特許請求の範囲第1項記載の半導体発光装置。 3)前記超格子構造における正孔の最高のエネルギー準
位が前記活性層の価電子帯上端のエネルギー準位より低
く、正孔の該活性層への閉じ込めが行われることを特徴
とする特許請求の範囲第1項記載の半導体発光装置。[Claims] 1) Does not meet the conditions that the lower end of the conduction band is at a higher energy level and the upper end of the valence band is at a lower energy level than the active layer;
A superlattice structure composed of semiconductor layers functioning as a quantum mechanical well potential with respect to at least one carrier is provided above and below the active layer, and the energy of electrons and holes in each semiconductor layer of the superlattice structure is reduced. 1. A semiconductor light emitting device, wherein a level difference is larger than a forbidden band width of the active layer, and at least one carrier is confined in the active layer by the superlattice structure. 2) The lowest energy level of electrons in the superlattice structure is higher than the energy level of the lower end of the conduction band of the active layer, and electrons are confined in the active layer. The semiconductor light emitting device according to item 1. 3) A patent claim characterized in that the highest energy level of holes in the superlattice structure is lower than the energy level of the upper end of the valence band of the active layer, and holes are confined in the active layer. The semiconductor light emitting device according to item 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60286231A JPS62144387A (en) | 1985-12-19 | 1985-12-19 | Semiconductor light-emitting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60286231A JPS62144387A (en) | 1985-12-19 | 1985-12-19 | Semiconductor light-emitting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62144387A true JPS62144387A (en) | 1987-06-27 |
Family
ID=17701668
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60286231A Pending JPS62144387A (en) | 1985-12-19 | 1985-12-19 | Semiconductor light-emitting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62144387A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002353569A (en) * | 2001-05-23 | 2002-12-06 | Akihiro Ishida | Semiconductor laser element and semiconductor laser |
JP2010212626A (en) * | 2009-03-12 | 2010-09-24 | Josho Gakuen | Semiconductor light emitting element |
-
1985
- 1985-12-19 JP JP60286231A patent/JPS62144387A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002353569A (en) * | 2001-05-23 | 2002-12-06 | Akihiro Ishida | Semiconductor laser element and semiconductor laser |
JP2010212626A (en) * | 2009-03-12 | 2010-09-24 | Josho Gakuen | Semiconductor light emitting element |
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