JPS62140462A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the areas of base and emitter regions, and to improve density and the degree of integration by forming a pattern for a polycrystalline silicon film and shaping an impurity layer by utilizing the polycrystalline silicon. CONSTITUTION:A polycrystalline silicon film 7 and a tungsten silicide film 6 are removed partially through anisotropic etching by using a mask 8 for a photo-resist. An silicon oxide film 9a is left only on the side surfaces of the polycrystalline silicon film 7 and the tungsten silicide film 6. The main surface of an epitaxial layer 2 is exposed by removal through etching, and a polycrystalline silicon film 11 is grown on the whole surface. An electrode for leading out a base, polycrystalline silicon films 7 and 11b, and an electrode for leading out an emitter, a polycrystalline silicon film 17a, are each formed in a self-alignment manner through such a process. Accordingly, a distance between the electrode and the electrode using the polycrystalline silicon films is fined, thus improving density and the degree of integration.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device using a polycrystalline silicon film as an electrode to achieve miniaturization.

[Conventional technology]

In conventional semiconductor integrated circuit devices, polycrystalline silicon films are used as lead electrodes of elements and wiring for connecting between elements. For example, FIG. 2 shows an example applied to a bipolar transistor, in which a P-type base region 22 is formed in an N-type region 21 serving as a collector, and an N-type emitter region 23 is further formed within this region. The insulating film 25 provided on the substrate has a contact region 24 .of the collector region 21 . Windows are opened at positions corresponding to the base region 22 and emitter region 23, respectively, and polycrystalline silicon films 26, 27, 27, 28 configured in a desired pattern are connected through these windows to form collector electrodes and base electrodes, respectively. , is configured as an emitter electrode.

These types i26, 27, and 28 are usually formed by forming a polycrystalline silicon film on the insulating film 25, and then pattern-etching the film using photolithography or the like.

[Problem that the invention seeks to solve]

In the above-described conventional method of manufacturing an integrated circuit using a polycrystalline silicon thin film as an electrode, each electrode 26, 27, 28
Since the distance between the two is determined by the resolution of the photoetching technique, there is a limit to the miniaturization of the photolithography technique using normal ultraviolet light, and it is difficult to significantly reduce these distances. This makes it difficult to achieve high density and high integration of semiconductor devices.

[Means for solving problems]

The method of manufacturing a semiconductor device of the present invention aims at miniaturizing electrodes using a polycrystalline silicon film and the distance between the electrodes, thereby achieving higher density and higher integration of the semiconductor device.

A method for manufacturing a semiconductor device according to the present invention includes the steps of stacking one or more insulating films and a polycrystalline silicon film on a semiconductor layer of one conductivity type, and removing at least a portion of the polycrystalline silicon film; a step of sequentially forming different types of insulating films on the side surfaces of the portions that have been removed; a step of removing the previously formed insulating film and the one or more insulating films and exposing the semiconductor layer; Filling the removed insulating film with polycrystalline silicon and forming an impurity layer of the opposite conductivity type on the semiconductor layer through the polycrystalline silicon, and exposing the semiconductor layer at the remaining inner position of the insulating film. and filling this with another polycrystalline silicon, and forming an impurity layer of one conductivity type in the opposite conductivity type impurity layer through the other polycrystalline silicon.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(i) are sectional views showing an embodiment of the present invention in the order of steps, and is an embodiment applied to a method of forming an NPN transistor.

First, as shown in the same figure (a), a thick oxide film (field oxide film) 3 for isolation is formed on an N-type epitaxial layer 2 on a P-type silicon substrate 1, and then a thin oxide film 4 is formed on the entire surface of the substrate. . Then, a silicon nitride film 5. A tungsten silicide film 6 and a polycrystalline silicon film 7 are sequentially laminated. Thereafter, a photoresist mask 8 is formed so as to cover areas other than the base and emitter formation areas of the transistor.

Next, as shown in FIG. 2B, using a photoresist mask 8, the polycrystalline silicon film 7 and the tungsten silicide film 6 are selectively etched by anisotropic etching such as reactive ion etching (RIE). , to partially remove them. After removing the photoresist mask 8, a silicon oxide film 9 with good coverage of the stepped portions is formed by LPCVD or the like on the entire surface as shown by the chain line, and this is etched by the RIE method to form a silicon oxide film 9 as shown by the solid line. A silicon oxide film 9a is left only on the side surfaces of the polycrystalline silicon film 7 and tungsten silicide film 6.

Next, a silicon nitride film 10 is formed on the entire surface by the LPCVD method as shown by the chain line in FIG. The nitride film 10a is left.

Next, as shown in FIG. 4(d), the silicon oxide film 9a is removed by etching with buffered hydrofluoric acid, and the underlying silicon nitride film 5 is removed by RIE to expose the silicon oxide film 4. . Then, the silicon oxide film 4 is removed again using buffered hydrofluoric acid to expose the main surface of the epitaxial layer 2. Thereafter, a polycrystalline silicon film 11 is grown over the entire surface as shown by the chain line.

Thereafter, as shown in FIG. 3(e), the polycrystalline silicon film 11 is etched by the RIE method to planarize it, and a part 11a of the polycrystalline silicon film 11 is removed from the polycrystalline silicon film 7.
The other portions 11b of the polycrystalline silicon film 11 on both sides thereof are configured to be integrated with the polycrystalline silicon film 7, and are brought into contact with the epitaxial layer 2. Then, only the emitter formation region is covered with a selectively formed aluminum film 12, and the polycrystalline silicon film 7 is coated with a high concentration (I x 10"cm-2).
Introducing boron.

Subsequently, as shown in FIG. 2F, the aluminum film 12 is removed, and only the polycrystalline silicon lla that does not contain boron is removed by etching. At this time, polycrystalline silicon llb
Boron is diffused through the polycrystalline silicon film 7 and is not etched. Thereafter, the surfaces of polycrystalline silicon film 7.11b and epitaxial layer 2 are oxidized to grow silicon oxide film 13. Then, boron is diffused into the epitaxial layer 2 through the polycrystalline silicon film 7 and llb to form a P-type external base region 14, and boron is further diffused from the substrate surface at a low concentration (~I
10 "Cm-"), the intrinsic base region 1
form 5.

Next, as shown in FIG. 3(g), a silicon nitride film 16 is formed on the silicon oxide film 13 as indicated by a chain line, and RI is applied.
By etching using the E method, the silicon nitride film 16a is left only on the inner side surface of the silicon nitride film 10a.

Thereafter, only the silicon oxide film 13 on the intrinsic base region 15 is removed using buffered hydrofluoric acid or the like to expose the main surface of the epitaxial layer 2, as shown in FIG. A silicon film 17 is formed and arsenic ions are implanted into it.

Thereafter, this polycrystalline silicon film 17 is etched by the RIE method, leaving the polycrystalline silicon film 17a only on the intrinsic base region 15. Arsenic is then diffused into the epitaxial layer 2 to form an N-type emitter region 18.

Furthermore, as shown in the same figure (i), phosphorus silicate glass (PS
G) After forming 19 and opening base and emitter through holes therein, form base and emitter electrodes 20B and 20E from an aluminum film, and connect these to the polycrystalline silicon 7.17a, respectively. This completes the NPN transistor.

Therefore, according to this embodiment, the base lead-out electrodes, ie, the polycrystalline silicon films 7 and llb, and the emitter lead-out electrodes, ie, the polycrystalline silicon film 17a, can be formed in a self-aligned manner. Therefore, the distance between the polycrystalline silicon films 11b and 17a can be formed with a finer dimension than the resolution of photolithography technology. Also,
The areas of the base regions 14, 15 and emitter regions 18 formed through these polycrystalline silicon llb, 17a can be formed finely, and the area of the transistor can be reduced, that is, the element itself can be miniaturized.

In addition, in this embodiment, the lead-out electrode of the base is made of polycrystalline silicon 7 and llb as well as a tungsten silicide film 6.
Since it is integrally formed, it is also effective in reducing base resistance. Of course, other high melting point metals may be used for this tungsten silicide film, or this may be omitted.

Note that photoresist mask 8. The aluminum film 12 and each electrode 20B, 20E are selectively patterned by conventional photolithography technology, but this does not pose an obstacle to achieving the present invention since fine dimensions are not required. .

Here, the invention can be applied to PNP l-transistors as well.

〔Effect of the invention〕

As explained above, the present invention involves patterning a polycrystalline silicon film constituting the base and emitter extraction electrodes by a self-alignment method using the remaining film formed by growing an insulating film and anisotropic etching it as a mask. Since the impurity layer is formed using polycrystalline silicon, the distance between the base and emitter can be formed to a fine dimension that exceeds the resolution of photolithography technology. It is also possible to reduce the area of the base and emitter regions, thereby making it possible to obtain a semiconductor device with high density and high integration.

[Brief explanation of drawings]

FIGS. 1(a) to 1(i) are cross-sectional views showing the manufacturing method of the present invention in the order of steps, and FIG. 2 is a cross-sectional view for explaining problems in the conventional structure. DESCRIPTION OF SYMBOLS 1... P-type silicon substrate, 2... Epitaxial layer, 3... Field oxide film, 4... Oxide film, 5...
・Silicon nitride film, 6... Tungsten silicide film, 7... Polycrystalline silicon film, 8... Photoresist, 9... Silicon oxide film, 10.108... Silicon nitride film, 11, Ila , l1b---Polycrystalline silicon film, 12... Aluminum film, 13... Silicon oxide film, 14... External base region, 15... Intrinsic base region, 16... Silicon nitride film, 17 .17a...
・Polycrystalline silicon film, 18...emitter region, 19・
...PSG, 20B, 20E...electrode, 21...N
Mold region, 22... Base region, 23... Emitter region, 24... Contact region, 25... Insulating film, 2
6.27.28... Polycrystalline silicon film (electrode). Figure 1Figure 1

Claims (1)

[Claims] 1. A step of stacking one or more insulating films and a polycrystalline silicon film on a semiconductor layer of one conductivity type, and removing at least a portion of this polycrystalline silicon film, and a step of depositing a layer on the side surface of the partially removed portion. A process of sequentially forming different types of insulating films,
removing the previously formed insulating film and the one or more insulating films and exposing the semiconductor layer there; and filling at least the removed insulating film with polycrystalline silicon and conducting reverse conduction through the polycrystalline silicon. a step of forming an impurity layer of a type on the semiconductor layer, a step of exposing the semiconductor layer at a position inside the remaining insulating film and filling this with another polycrystalline silicon; A method of manufacturing a semiconductor device, comprising the step of forming an impurity layer of one conductivity type in the impurity layer of opposite conductivity type through silicon.