JPS62131776A - Controller for inverter - Google Patents

Abstract

PURPOSE:To obtain an optimum braking capacity corresponding to a load by selecting and combining several types of stopping voltage patterns stored in a memory device. CONSTITUTION:Several types of voltage patterns for exclusive use for stopping an induction motor are stored in unused areas of ROM 4. A latch circuit 6 of D-type flip-flops is provided between a binary counter 3 and an address input of a data selector 6, and a control signal from CPU 1 and an output signal from the counter 3 are used as its clock signals. The patterns stored in ROM 4 are selected and combined to stop the clock signal of a latch circuit 8 for controlling the selector 6 for forming a 3-phase AC control signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an inverter control circuit that controls the rotation speed of an induction motor using a voltage pattern stored in a memory element.

[Conventional technology]

FIG. 4 is a block diagram of an example of a control h1 path of a conventional inverter. In the figure, 1 is a CPU, which is an 8-bit one-chip microcomputer,
49.2 is a rate multiplier, for example C
D4089.3 is a 12-stage binary counter, for example 4040.4 is a memory element (ROM), and D2764.5 with a capacity of 8 KB is a 4-bit 2-channel data selector, for example 4019.6.
is an 8-pit, 1-channel data selector, and is, for example, 4512.

Next, the operation will be explained. In response to the operation command for the induction motor, the CPU 1 sends 6 voltage commands to the ROM 4.
At the same time as outputting the 8-bit binary signal, it outputs an 8-bit binary signal as a frequency command to the rate multiplier 2. rate multiglayer 2
outputs a frequency signal proportional to an 8-bit binary signal and performs parallel-to-serial conversion of the frequency command.

The binary counter 3 uses this serial frequency signal as a clock and accesses the address of the ROM 4 with a 6-bit count signal. Considering that the voltage command is given in 6 bits, ROM4 can obtain a maximum of 64 voltage patterns, so the inverter's output frequency range is 3 Hz to 6 Hz.
0 Hz, voltage patterns can be stored in IHz increments as shown in FIG. The voltage pattern selected by the voltage command is accessed by a 6-bit access signal from the binary counter 3 and is output in 8 bits. The voltage pattern to be stored is divided into appropriate electrical angles and stored in order to increase the usage efficiency of the storage capacity of the ROM 4. Therefore, the voltage pattern output in 8 bits is the frequency signal divided by the binary counter 3. A three-phase alternating current control signal is formed by a data selector 6 using a frequency signal which is combined by a data selector 5 that operates as a clock and then frequency-divided by a binary counter 3 as a clock.

In the circuit described above, in order to obtain a three-phase AC control signal, only two of the three phases always switch the switching elements of the main circuit of the inverter according to the voltage pattern stored in the ROM4, and the other one phase is in a conductive state or a non-conductive state.

has been completed. The combination of energization of these three phases is switched at intervals of 60 electrical degrees, and the output signal of each phase is changed to the 6th phase.
The phase voltage pattern will be as shown in the figure.

[Problem that the invention seeks to solve]

Since the conventional inverter control circuit is configured as described above, when the induction motor is decelerated to a stop using the inverter device, the induction motor is decelerated to a rotational speed equivalent to 3 Hz and then coasts to a stop. Therefore, for example, when a load with large inertia is connected, there is a problem that the stopping accuracy becomes particularly poor.

This invention was made in order to solve the above-mentioned problems, and aims to provide an inverter control circuit that can obtain the optimum braking ability commensurate with the load even when a load with large inertia is connected. purpose.

[Means for solving problems]

The control circuit for an inverter according to the present invention stores several types of stop-only voltage patterns that form a static magnetic field for the induction motor in a storage element that stores a voltage pattern that controls the rotational speed of the induction motor. The control signal is used to stop the clock that controls the data selector that forms the three-phase AC control signal, and a static magnetic field is obtained for the induction motor by the stop-dedicated voltage pattern from the storage element.

[For production]

In the process of decelerating and stopping the induction motor, the inverter control circuit in this invention stops the clock that combines the lightning and pressure patterns using a control signal from the memory element, and also selects a voltage pattern exclusively for stopping the induction motor. On the other hand, a static magnetic field is formed to obtain the optimum braking capacity corresponding to the load.

〔Example〕

An embodiment of the present invention will be described below.

FIG. 1 shows three types of stop voltage patterns (0(B1(A+)) for the induction motor in an unused area of the ROM 4, which is the memory element shown in FIG. Figure 2 shows a specific circuit configuration of the present invention using a ROM 4 that stores the contents shown in Figure 1.1 is a CPU, which is an 8-bit one-chip microcomputer, such as .2 is a rate multiplier; for example, CD4089.3 is a 12-stage binary counter; and, for example, 4040.4 is a memory element (ROM) with a capacity of 8 KB.
For example, D2764.5 is a 4-bit 2-channel data selector, and 4019.6 is an 8-bit 1-channel data selector.
Channel data selector, for example 4512
, T is a gate re, and 4071.8 is a latch circuit consisting of a multi-input flip-flop, for example 40174.

Next, the operation will be explained.

The basic operation from when the CPU 1 outputs a voltage command and a frequency command until a three-phase AC control signal is obtained is as described in the conventional circuit.

As mentioned above, the features of this circuit are that three types of voltage patterns dedicated to stopping the induction motor are provided in the unused area of the ROM 4, and at the same time, a D-type flip-flop is installed between the binary counter 3 and the address input of the data selector 6. A latch circuit 8 is provided, and the CPU is used as the clock signal.
1 and the output signal of the binary counter 3 are used. It goes without saying that the frequency of the output signal of the binary counter 3 used for the vector clock is higher than the 3-bit output signal from the binary counter 3 inputted to the latch circuit 8.

Now, if we explain the mode in which the induction motor is accelerated from 3 Hz to 60 Hz and then decelerated and then stopped, the CPU 1 outputs a voltage command to select the voltage pattern at 3 Hz due to the acceleration command, and then A voltage pattern is selected at IHz intervals and reaches 60Hz. When the next deceleration command is input, the voltage command changes sequentially from 60H2 to 3Hz. After selecting the voltage pattern at 3Hz, stop voltage pattern tel, (Bl).

(As shown in Fig. 3, the pulse width of Al is set to 1 order narrow (and the output times are configured as tc, tB, tA, and the clock of the latch circuit 8 is stopped by the control signal from the CPU 1. Since the address signal of the data selector 603 bits output from the binary counter 3 is latched, the three-phase AC control signal is fixed at a certain phase.Therefore, the stop voltages from the ROM 4 (c), (
nl, (A) A stationary magnetic field is formed in the induction motor due to K, which causes it to stop.

If this situation is illustrated by the control signal phase pressure pattern of each phase, the third
It will look like the picture. In other words, in the voltage pattern from 3Hz to 60Hz, the pulse width changes over time so that the induction motor rotates smoothly, whereas in the stop-only voltage pattern, the pulse width can be constant and the pulse width does not change over time. The dedicated voltage patterns become narrower in the order of (c), (B), and (A). By combining each stop-only type, pressure pattern (C), fn), (Al pulse width output time t(, tB, tA), optimal stop control corresponding to the load can be realized.

〔Effect of the invention〕

As described above, according to the present invention, the control circuit of the inverter stores several kinds of stop-only voltage patterns in the unused area of the storage element that stores the voltage patterns, and at the same time selects and combines the stop-only voltage patterns. Since the configuration is configured to stop the clock signal of the latch circuit that controls the data selector that forms the three-phase AC control signal, a stationary magnetic field is created for the induction motor, and the optimum braking capacity commensurate with the load can be obtained. 0

[Brief explanation of drawings]

FIG. 1 is a state diagram showing the memory contents of the memory element used in the present invention, and FIG. 2 is a state diagram showing one embodiment of the present invention. FIG. 3 is a signal waveform diagram showing a phase voltage control signal according to the present invention. FIG. 4 is a circuit diagram showing a conventional inverter control circuit. FIG. 5 is a circuit diagram showing a conventional inverter control circuit. FIG. 6 is a state diagram showing the stored contents of the memory element, and FIG. 6 is a signal waveform diagram showing a conventional phase voltage control signal. 1 is a CPU, 2 is a rate multiplier, 13 is a binary counter, 4 is a memory element (ROM), 5.6 is a data selector, and 8 is a latch circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Patent applicant Mitsubishi Electric Corporation Representative Patent attorney 1) Hiroshi Sawa □. (2 other people) Figure 1 swi Figure 6

Claims (2)

[Claims] (1) Convert AC power to DC, use a switching element to generate any frequency and voltage from the converted DC, and divide the voltage pattern into a memory element by predetermined electrical angles. In an inverter control circuit that simultaneously reads out the voltage patterns in parallel, selects the voltage pattern using a clock corresponding to the electrical angle, generates a voltage pattern for one phase, and obtains a three-phase AC control signal, the memory element is A latch circuit is provided between the counter and the address input of the data selector to store a dedicated voltage pattern for stopping, and the clock that combines the voltage patterns is stopped by a control signal from the storage element and simultaneously stored in the storage element. The invention is characterized in that the stop-only voltage pattern, which is different from the voltage pattern that is the basis of the three-phase AC control signal, is selected by latching the data selector to form a static magnetic field for the induction motor. Inverter control circuit. (2) An inverter control circuit according to claim 1, characterized in that several types of stopping voltage patterns are stored in which the strength of the static magnetic field for the induction motor is varied by varying the output time and pulse width. .