JPS62129601U

JPS62129601U -

Info

Publication number: JPS62129601U
Application number: JP1453686U
Authority: JP
Priority date: 1986-02-05
Filing date: 1986-02-05
Publication date: 1987-08-17

Description

[Brief explanation of the drawing]

第１図は実施例の構成を示す説明図である。なお図中、１は第１室温センサ、２は第２室温
センサ、３は第１冷媒温度センサ、４は第２冷媒
温度センサ、５，６，７，８は夫々増幅回路、９
，１０，１２，１３は夫々スイツチ、１１，１４
は夫々平均化回路、１５は設定回路、１７は第１
比較回路、１８はＡＮＤゲート、２０は第２比較
回路である。 FIG. 1 is an explanatory diagram showing the configuration of an embodiment. In the figure, 1 is a first room temperature sensor, 2 is a second room temperature sensor, 3 is a first refrigerant temperature sensor, 4 is a second refrigerant temperature sensor, 5, 6, 7, and 8 are amplifier circuits, respectively, and 9
, 10, 12, 13 are switches, 11, 14 respectively.
are averaging circuits, 15 is a setting circuit, and 17 is a first
A comparison circuit, 18 is an AND gate, and 20 is a second comparison circuit.

Claims

[Scope of utility model registration request]

In addition to providing multiple detectors for each state that individually detect multiple types of states, an amplifier circuit is provided to amplify the output of each detector, and any output from each amplifier circuit is averaged for each state. An averaging circuit is provided, and the output signals of the plurality of averaging circuits are
and a multivariable analog with an averaging circuit, which is characterized by providing a circuit for logically determining the signal from each comparison circuit that compares the averaging circuit output signal and the setting signal, and thereby outputting a control signal. controller.